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https://github.com/golang/go
synced 2025-07-30 00:10:22 +00:00
cmd/internal/obj/ppc64: refactor maskgen64 usage
Converting and verifying a bitmask can be done much quicker and simpler. Since this touches the MD-form opcodes, cleanup their encoding too. Change-Id: I9b1c1fdc4c9622e489ff6cf8181c5b647afae7c9 Reviewed-on: https://go-review.googlesource.com/c/go/+/534017 Reviewed-by: Than McIntosh <thanm@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Paul Murphy <murp@ibm.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
This commit is contained in:
Paul E. Murphy
committed by
Paul Murphy
Paul Murphy
parent
061d77cb70
commit
d580460f07
@@ -2276,10 +2276,6 @@ func OP_RLW(op uint32, a uint32, s uint32, sh uint32, mb uint32, me uint32) uint
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return op | (s&31)<<21 | (a&31)<<16 | (sh&31)<<11 | (mb&31)<<6 | (me&31)<<1
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}
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func AOP_RLDIC(op uint32, a uint32, s uint32, sh uint32, m uint32) uint32 {
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return op | (s&31)<<21 | (a&31)<<16 | (sh&31)<<11 | ((sh&32)>>5)<<1 | (m&31)<<6 | ((m&32)>>5)<<5
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}
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func AOP_EXTSWSLI(op uint32, a uint32, s uint32, sh uint32) uint32 {
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return op | (a&31)<<21 | (s&31)<<16 | (sh&31)<<11 | ((sh&32)>>5)<<1
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}
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@@ -2288,6 +2284,16 @@ func AOP_ISEL(op uint32, t uint32, a uint32, b uint32, bc uint32) uint32 {
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return op | (t&31)<<21 | (a&31)<<16 | (b&31)<<11 | (bc&0x1F)<<6
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}
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/* MD-form 2-register, 2 6-bit immediate operands */
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func AOP_MD(op uint32, a uint32, s uint32, sh uint32, m uint32) uint32 {
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return op | (s&31)<<21 | (a&31)<<16 | (sh&31)<<11 | ((sh&32)>>5)<<1 | (m&31)<<6 | ((m&32)>>5)<<5
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}
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/* MDS-form 3-register, 1 6-bit immediate operands. rsh argument is a register. */
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func AOP_MDS(op, to, from, rsh, m uint32) uint32 {
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return AOP_MD(op, to, from, rsh&31, m)
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}
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func AOP_PFX_00_8LS(r, ie uint32) uint32 {
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return 1<<26 | 0<<24 | 0<<23 | (r&1)<<20 | (ie & 0x3FFFF)
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}
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@@ -2484,6 +2490,21 @@ func (c *ctxt9) symbolAccess(s *obj.LSym, d int64, reg int16, op uint32, reuse b
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return
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}
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// Decompose a mask of contiguous bits into a begin (mb) and
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// end (me) value.
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//
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// 64b mask values cannot wrap on any valid PPC64 instruction.
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// Only masks of the form 0*1+0* are valid.
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//
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// Note, me is inclusive.
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func decodeMask64(mask int64) (mb, me uint32, valid bool) {
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m := uint64(mask)
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mb = uint32(bits.LeadingZeros64(m))
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me = uint32(64 - bits.TrailingZeros64(m))
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valid = ((m&-m)+m)&m == 0 && m != 0
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return mb, me - 1, valid
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}
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/*
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* 32-bit masks
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*/
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@@ -2532,41 +2553,6 @@ func (c *ctxt9) maskgen(p *obj.Prog, v uint32) (mb, me uint32) {
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return m[0], m[1]
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}
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/*
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* 64-bit masks (rldic etc)
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*/
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func getmask64(m []byte, v uint64) bool {
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m[1] = 0
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m[0] = m[1]
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for i := 0; i < 64; i++ {
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if v&(uint64(1)<<uint(63-i)) != 0 {
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m[0] = byte(i)
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for {
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m[1] = byte(i)
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i++
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if i >= 64 || v&(uint64(1)<<uint(63-i)) == 0 {
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break
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}
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}
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for ; i < 64; i++ {
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if v&(uint64(1)<<uint(63-i)) != 0 {
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return false
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}
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}
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return true
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}
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}
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return false
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}
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func (c *ctxt9) maskgen64(p *obj.Prog, m []byte, v uint64) {
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if !getmask64(m, v) {
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c.ctxt.Diag("cannot generate mask #%x\n%v", v, p)
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}
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}
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func loadu32(r int, d int64) uint32 {
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v := int32(d >> 16)
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if isuint32(uint64(d)) {
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@@ -2674,7 +2660,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
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// AROTL and AROTLW are extended mnemonics, which map to RLDCL and RLWNM.
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switch p.As {
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case AROTL:
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o1 = AOP_RLDIC(OP_RLDCL, uint32(p.To.Reg), uint32(r), uint32(p.From.Reg), uint32(0))
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o1 = AOP_MD(OP_RLDCL, uint32(p.To.Reg), uint32(r), uint32(p.From.Reg), uint32(0))
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case AROTLW:
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o1 = OP_RLW(OP_RLWNM, uint32(p.To.Reg), uint32(r), uint32(p.From.Reg), 0, 31)
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default:
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@@ -2804,62 +2790,47 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
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}
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case 14: /* rldc[lr] Rb,Rs,$mask,Ra -- left, right give different masks */
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r := int(p.Reg)
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r := uint32(p.Reg)
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if r == 0 {
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r = int(p.To.Reg)
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r = uint32(p.To.Reg)
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}
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d := c.vregoff(p.GetFrom3())
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var a int
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switch p.As {
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// These opcodes expect a mask operand that has to be converted into the
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// appropriate operand. The way these were defined, not all valid masks are possible.
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// Left here for compatibility in case they were used or generated.
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case ARLDCL, ARLDCLCC:
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var mask [2]uint8
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c.maskgen64(p, mask[:], uint64(d))
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a = int(mask[0]) /* MB */
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if mask[1] != 63 {
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mb, me, valid := decodeMask64(d)
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if me != 63 || !valid {
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c.ctxt.Diag("invalid mask for rotate: %x (end != bit 63)\n%v", uint64(d), p)
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}
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o1 = LOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), uint32(r), uint32(p.From.Reg))
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o1 |= (uint32(a) & 31) << 6
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if a&0x20 != 0 {
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o1 |= 1 << 5 /* mb[5] is top bit */
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}
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o1 = AOP_MDS(c.oprrr(p.As), uint32(p.To.Reg), r, uint32(p.From.Reg), mb)
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case ARLDCR, ARLDCRCC:
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var mask [2]uint8
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c.maskgen64(p, mask[:], uint64(d))
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a = int(mask[1]) /* ME */
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if mask[0] != 0 {
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c.ctxt.Diag("invalid mask for rotate: %x %x (start != 0)\n%v", uint64(d), mask[0], p)
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}
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o1 = LOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), uint32(r), uint32(p.From.Reg))
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o1 |= (uint32(a) & 31) << 6
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if a&0x20 != 0 {
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o1 |= 1 << 5 /* mb[5] is top bit */
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mb, me, valid := decodeMask64(d)
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if mb != 0 || !valid {
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c.ctxt.Diag("invalid mask for rotate: %x (start != 0)\n%v", uint64(d), p)
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}
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o1 = AOP_MDS(c.oprrr(p.As), uint32(p.To.Reg), r, uint32(p.From.Reg), me)
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// These opcodes use a shift count like the ppc64 asm, no mask conversion done
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case ARLDICR, ARLDICRCC:
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me := int(d)
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me := uint32(d)
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sh := c.regoff(&p.From)
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if me < 0 || me > 63 || sh > 63 {
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c.ctxt.Diag("Invalid me or sh for RLDICR: %x %x\n%v", int(d), sh, p)
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}
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o1 = AOP_RLDIC(c.oprrr(p.As), uint32(p.To.Reg), uint32(r), uint32(sh), uint32(me))
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o1 = AOP_MD(c.oprrr(p.As), uint32(p.To.Reg), r, uint32(sh), me)
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case ARLDICL, ARLDICLCC, ARLDIC, ARLDICCC:
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mb := int(d)
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mb := uint32(d)
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sh := c.regoff(&p.From)
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if mb < 0 || mb > 63 || sh > 63 {
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c.ctxt.Diag("Invalid mb or sh for RLDIC, RLDICL: %x %x\n%v", mb, sh, p)
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}
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o1 = AOP_RLDIC(c.oprrr(p.As), uint32(p.To.Reg), uint32(r), uint32(sh), uint32(mb))
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o1 = AOP_MD(c.oprrr(p.As), uint32(p.To.Reg), r, uint32(sh), mb)
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case ACLRLSLDI:
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// This is an extended mnemonic defined in the ISA section C.8.1
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@@ -2871,11 +2842,10 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
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if n > b || b > 63 {
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c.ctxt.Diag("Invalid n or b for CLRLSLDI: %x %x\n%v", n, b, p)
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}
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o1 = AOP_RLDIC(OP_RLDIC, uint32(p.To.Reg), uint32(r), uint32(n), uint32(b)-uint32(n))
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o1 = AOP_MD(OP_RLDIC, uint32(p.To.Reg), uint32(r), uint32(n), uint32(b)-uint32(n))
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default:
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c.ctxt.Diag("unexpected op in rldc case\n%v", p)
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a = 0
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}
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case 17, /* bc bo,bi,lbra (same for now) */
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@@ -3015,7 +2985,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
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// For backwards compatibility with GOPPC64 < 10, generate 34b constants in register.
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o1 = LOP_IRR(OP_ADDIS, REGZERO, REGTMP, uint32(d>>32)) // tmp = sign_extend((d>>32)&0xFFFF0000)
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o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, uint32(d>>16)) // tmp |= (d>>16)&0xFFFF
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o3 = AOP_RLDIC(OP_RLDICR, REGTMP, REGTMP, 16, 63-16) // tmp <<= 16
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o3 = AOP_MD(OP_RLDICR, REGTMP, REGTMP, 16, 63-16) // tmp <<= 16
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o4 = LOP_IRR(OP_ORI, REGTMP, REGTMP, uint32(uint16(d))) // tmp |= d&0xFFFF
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o5 = AOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), REGTMP, uint32(r))
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}
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@@ -3090,7 +3060,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
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o1 = AOP_EXTSWSLI(OP_EXTSWSLI, uint32(r), uint32(p.To.Reg), uint32(v))
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} else {
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o1 = AOP_RLDIC(op, uint32(p.To.Reg), uint32(r), uint32(v), uint32(a))
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o1 = AOP_MD(op, uint32(p.To.Reg), uint32(r), uint32(v), uint32(a))
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}
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if p.As == ASLDCC || p.As == ASRDCC || p.As == AEXTSWSLICC {
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o1 |= 1 // Set the condition code bit
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@@ -3142,78 +3112,51 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
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}
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case 29: /* rldic[lr]? $sh,s,$mask,a -- left, right, plain give different masks */
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v := c.regoff(&p.From)
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sh := uint32(c.regoff(&p.From))
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d := c.vregoff(p.GetFrom3())
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var mask [2]uint8
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c.maskgen64(p, mask[:], uint64(d))
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var a int
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mb, me, valid := decodeMask64(d)
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var a uint32
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switch p.As {
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case ARLDC, ARLDCCC:
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a = int(mask[0]) /* MB */
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if int32(mask[1]) != (63 - v) {
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c.ctxt.Diag("invalid mask for shift: %x %x (shift %d)\n%v", uint64(d), mask[1], v, p)
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a = mb
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if me != (63-sh) || !valid {
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c.ctxt.Diag("invalid mask for shift: %016x (mb=%d,me=%d) (shift %d)\n%v", uint64(d), mb, me, sh, p)
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}
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case ARLDCL, ARLDCLCC:
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a = int(mask[0]) /* MB */
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if mask[1] != 63 {
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c.ctxt.Diag("invalid mask for shift: %x %s (shift %d)\n%v", uint64(d), mask[1], v, p)
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a = mb
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if mb != 63 || !valid {
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c.ctxt.Diag("invalid mask for shift: %016x (mb=%d,me=%d) (shift %d)\n%v", uint64(d), mb, me, sh, p)
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}
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case ARLDCR, ARLDCRCC:
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a = int(mask[1]) /* ME */
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if mask[0] != 0 {
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c.ctxt.Diag("invalid mask for shift: %x %x (shift %d)\n%v", uint64(d), mask[0], v, p)
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a = me
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if mb != 0 || !valid {
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c.ctxt.Diag("invalid mask for shift: %016x (mb=%d,me=%d) (shift %d)\n%v", uint64(d), mb, me, sh, p)
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}
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default:
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c.ctxt.Diag("unexpected op in rldic case\n%v", p)
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a = 0
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}
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o1 = AOP_RRR(c.opirr(p.As), uint32(p.Reg), uint32(p.To.Reg), (uint32(v) & 0x1F))
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o1 |= (uint32(a) & 31) << 6
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if v&0x20 != 0 {
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o1 |= 1 << 1
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}
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if a&0x20 != 0 {
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o1 |= 1 << 5 /* mb[5] is top bit */
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}
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o1 = AOP_MD(c.opirr(p.As), uint32(p.To.Reg), uint32(p.Reg), sh, a)
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case 30: /* rldimi $sh,s,$mask,a */
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v := c.regoff(&p.From)
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sh := uint32(c.regoff(&p.From))
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d := c.vregoff(p.GetFrom3())
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// Original opcodes had mask operands which had to be converted to a shift count as expected by
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// the ppc64 asm.
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switch p.As {
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case ARLDMI, ARLDMICC:
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var mask [2]uint8
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c.maskgen64(p, mask[:], uint64(d))
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if int32(mask[1]) != (63 - v) {
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c.ctxt.Diag("invalid mask for shift: %x %x (shift %d)\n%v", uint64(d), mask[1], v, p)
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}
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o1 = AOP_RRR(c.opirr(p.As), uint32(p.Reg), uint32(p.To.Reg), (uint32(v) & 0x1F))
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o1 |= (uint32(mask[0]) & 31) << 6
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if v&0x20 != 0 {
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o1 |= 1 << 1
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}
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if mask[0]&0x20 != 0 {
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o1 |= 1 << 5 /* mb[5] is top bit */
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mb, me, valid := decodeMask64(d)
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if me != (63-sh) || !valid {
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c.ctxt.Diag("invalid mask for shift: %x %x (shift %d)\n%v", uint64(d), me, sh, p)
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}
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o1 = AOP_MD(c.opirr(p.As), uint32(p.To.Reg), uint32(p.Reg), sh, mb)
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// Opcodes with shift count operands.
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case ARLDIMI, ARLDIMICC:
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o1 = AOP_RRR(c.opirr(p.As), uint32(p.Reg), uint32(p.To.Reg), (uint32(v) & 0x1F))
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o1 |= (uint32(d) & 31) << 6
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if d&0x20 != 0 {
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o1 |= 1 << 5
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}
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if v&0x20 != 0 {
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o1 |= 1 << 1
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}
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o1 = AOP_MD(c.opirr(p.As), uint32(p.To.Reg), uint32(p.Reg), sh, uint32(d))
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}
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case 31: /* dword */
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