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Pinctrl #16

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opened 2025-12-07 14:42:06 +00:00 by merbanan · 13 comments
merbanan commented 2025-12-07 14:42:06 +00:00
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We need a pinctrl driver. In the attached file we have the definitions.

We need a pinctrl driver. In the attached file we have the definitions.
en7523.c
28 KiB
Sirherobrine23 commented 2025-12-07 14:43:04 +00:00
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airoha-en7523-pinctrl.patch

[airoha-en7523-pinctrl.patch](/attachments/3dd56f45-c058-411d-89a1-72e36c8cfdb5)
airoha-en7523-pinctrl.patch
60 KiB
Sirherobrine23 commented 2025-12-07 14:43:41 +00:00
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This is a patch that I think you sent at some point for one people

This is a patch that I think you sent at some point for one people
merbanan commented 2025-12-07 14:49:46 +00:00
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The question is how it should be integrated. We need the code and logic from the existing (pinctrl-airoha.c) driver.

The question is how it should be integrated. We need the code and logic from the existing (pinctrl-airoha.c) driver.
merbanan commented 2025-12-07 15:17:49 +00:00
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The old driver code is not as complete as the new kernel code. The new code has gpio and gpio interrupts.

The old driver code is not as complete as the new kernel code. The new code has gpio and gpio interrupts.
Sirherobrine23 added reference airoha_en7523_pinctrl 2025-12-07 23:12:37 +00:00
Sirherobrine23 commented 2025-12-09 21:59:25 +00:00
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Should I use this as a starting point for pinctrl?

I didn't even have success with pinctrl; I forgot to check the other GPLs with Econet/Airoha

tplink-xx530v_v2/sdk/an7551/openwrt-21.02/openwrt-21.02.1_dev/linux-5.4.55/arch/arm/boot/dts/en7523.dts Lines 17 to 20 in 343249db33
gpio@1fbf0200 {
compatible = "econet,ecnt-gpio";
reg = <0x1fbf0200 0x80>;
};

tplink-xx530v_v2/sdk/an7551/openwrt-21.02/openwrt-21.02.1_dev/linux-5.4.55/arch/arm/mach-econet/ecnt_gpio.c Lines 76 to 108 in 343249db33
#define GPIO_BASE 0x00000000
#define GPIO_CTRL (GPIO_BASE + 0x00)
#define GPIO_DATA (GPIO_BASE + 0x04)
#define GPIO_INT (GPIO_BASE + 0x08)
#define GPIO_OE (GPIO_BASE + 0x14)
#define GPIO_LEDPRD (GPIO_BASE + 0x18)
#define GPIO_LEDCTRL (GPIO_BASE + 0x1C)
#define GPIO_CTRL1 (GPIO_BASE + 0x20)
#define GPIO_SGPIO_LEDDATA (GPIO_BASE + 0x24)
#define GPIO_SGPIO_CLKDIVR (GPIO_BASE + 0x28)
#define GPIO_SGPIO_CLKDLY (GPIO_BASE + 0x2C)
#define GPIO_SGPIO_CFG (GPIO_BASE + 0x30)
#define GPIO_FLASH_MODE_CFG (GPIO_BASE + 0x34)
#define GPIO_RSP_MODE_CFG (GPIO_BASE + 0x38)
#define GPIO_FLASH_PRD_SET0 (GPIO_BASE + 0x3C)
#define GPIO_FLASH_PRD_SET1 (GPIO_BASE + 0x40)
#define GPIO_FLASH_PRD_SET2 (GPIO_BASE + 0x44)
#define GPIO_FLASH_PRD_SET3 (GPIO_BASE + 0x48)
#define GPIO_FLASH_MAP_CFG0 (GPIO_BASE + 0x4C)
#define GPIO_FLASH_MAP_CFG1 (GPIO_BASE + 0x50)
#define GPIO_FLASH_MODE_CFG_EXT (GPIO_BASE + 0x68)
#define GPIO_INT1 (GPIO_BASE + 0x7C)
#define CYCLE_CFG_VALUE0 (GPIO_BASE + 0x98)
#define CYCLE_CFG_VALUE1 (GPIO_BASE + 0x9C)
#define AUTO_FLASH_STEP1_0 (GPIO_BASE + 0xA0)
#define AUTO_FLASH_STEP3_2 (GPIO_BASE + 0xA4)
#define AUTO_FLASH_STEP5_4 (GPIO_BASE + 0xA8)
#define AUTO_FLASH_STEP7_6 (GPIO_BASE + 0xAC)
#define AUTO_FLASH_AMP3_0 (GPIO_BASE + 0xB0)
#define AUTO_FLASH_AMP7_4 (GPIO_BASE + 0xB4)
#define AUTO_FLASH_EN (GPIO_BASE + 0xB8)
#define FAN_EN (GPIO_BASE + 0xBC)

Should I use this as a starting point for pinctrl? I didn't even have success with pinctrl; I forgot to check the other GPLs with Econet/Airoha https://sirherobrine23.com.br/tplink_gpl/tplink-xx530v_v2/src/commit/343249db3372d677fb37a7365a3c2794f303ba51/sdk/an7551/openwrt-21.02/openwrt-21.02.1_dev/linux-5.4.55/arch/arm/boot/dts/en7523.dts#L17-L20 https://sirherobrine23.com.br/tplink_gpl/tplink-xx530v_v2/src/commit/343249db3372d677fb37a7365a3c2794f303ba51/sdk/an7551/openwrt-21.02/openwrt-21.02.1_dev/linux-5.4.55/arch/arm/mach-econet/ecnt_gpio.c#L76-L108
merbanan commented 2025-12-10 09:57:35 +00:00
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I think I left to many blanks to fill in with regards to the pinctrl.

So first, the current gpio driver needs to be removed from the dts. The pinctrl provide gpio support. There is a register offset between the AN7581 and EN7523, thus the following defines are need and references into them:

/* MUX */
#define EN7523_REG_GPIO_2ND_I2C_MODE		0x0210
#define EN7523_REG_GPIO_SPI_CS1_MODE		0x0214
#define EN7523_REG_GPIO_PON_MODE		0x0218
#define EN7523_REG_NPU_UART_EN			0x0220
#define NPU_UART_MODE_MASK			BIT(2)

/* CONF */
/* REG_I2C_SDA_PU */
#define EN7523_SPI_MISO_PU_MASK			BIT(13)
#define EN7523_SPI_MOSI_PU_MASK			BIT(12)
#define EN7523_SPI_CLK_PU_MASK			BIT(11)
#define EN7523_SPI_CS0_PU_MASK			BIT(10)

/* REG_I2C_SDA_PD */
#define EN7523_SPI_MISO_PD_MASK			BIT(13)
#define EN7523_SPI_MOSI_PD_MASK			BIT(12)
#define EN7523_SPI_CLK_PD_MASK			BIT(11)
#define EN7523_SPI_CS0_PD_MASK			BIT(10)

/* REG_I2C_SDA_E2 */
#define EN7523_SPI_MISO_E2_MASK			BIT(13)
#define EN7523_SPI_MOSI_E2_MASK			BIT(12)
#define EN7523_SPI_CLK_E2_MASK			BIT(11)
#define EN7523_SPI_CS0_E2_MASK			BIT(10)

/* REG_I2C_SDA_E4 */
#define EN7523_SPI_MISO_E4_MASK			BIT(13)
#define EN7523_SPI_MOSI_E4_MASK			BIT(12)
#define EN7523_SPI_CLK_E4_MASK			BIT(11)
#define EN7523_SPI_CS0_E4_MASK			BIT(10)

/* LED MAP */
#define EN7523_REG_LAN_LED0_MAPPING			0x0278
#define EN7523_REG_LAN_LED1_MAPPING			0x027c

My initial idea was to somehow keep it as an external object. But I think we should just go with a patch to the original driver and bloat it and see what they say. I do have a pinctrl driver for EN751221 also.

I think I left to many blanks to fill in with regards to the pinctrl. So first, the current gpio driver needs to be removed from the dts. The pinctrl provide gpio support. There is a register offset between the AN7581 and EN7523, thus the following defines are need and references into them: ``` /* MUX */ #define EN7523_REG_GPIO_2ND_I2C_MODE 0x0210 #define EN7523_REG_GPIO_SPI_CS1_MODE 0x0214 #define EN7523_REG_GPIO_PON_MODE 0x0218 #define EN7523_REG_NPU_UART_EN 0x0220 #define NPU_UART_MODE_MASK BIT(2) /* CONF */ /* REG_I2C_SDA_PU */ #define EN7523_SPI_MISO_PU_MASK BIT(13) #define EN7523_SPI_MOSI_PU_MASK BIT(12) #define EN7523_SPI_CLK_PU_MASK BIT(11) #define EN7523_SPI_CS0_PU_MASK BIT(10) /* REG_I2C_SDA_PD */ #define EN7523_SPI_MISO_PD_MASK BIT(13) #define EN7523_SPI_MOSI_PD_MASK BIT(12) #define EN7523_SPI_CLK_PD_MASK BIT(11) #define EN7523_SPI_CS0_PD_MASK BIT(10) /* REG_I2C_SDA_E2 */ #define EN7523_SPI_MISO_E2_MASK BIT(13) #define EN7523_SPI_MOSI_E2_MASK BIT(12) #define EN7523_SPI_CLK_E2_MASK BIT(11) #define EN7523_SPI_CS0_E2_MASK BIT(10) /* REG_I2C_SDA_E4 */ #define EN7523_SPI_MISO_E4_MASK BIT(13) #define EN7523_SPI_MOSI_E4_MASK BIT(12) #define EN7523_SPI_CLK_E4_MASK BIT(11) #define EN7523_SPI_CS0_E4_MASK BIT(10) /* LED MAP */ #define EN7523_REG_LAN_LED0_MAPPING 0x0278 #define EN7523_REG_LAN_LED1_MAPPING 0x027c ``` My initial idea was to somehow keep it as an external object. But I think we should just go with a patch to the original driver and bloat it and see what they say. I do have a pinctrl driver for EN751221 also.
Sirherobrine23 commented 2025-12-20 01:44:34 +00:00
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I'm having trouble with pinctrl, my router is rebooting every time it tries to change the LED state

I'm having trouble with pinctrl, my router is rebooting every time it tries to change the LED state
openwrt_2025-12-19_22-38.log
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merbanan commented 2025-12-20 20:56:16 +00:00
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Are you still getting crashes with the pinctrl driver? If so it could be related to the interrupt handling.

Are you still getting crashes with the pinctrl driver? If so it could be related to the interrupt handling.
merbanan commented 2025-12-20 21:00:32 +00:00
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The shape of the code looks really good. Do you want to send a RFC to the mediatek linux mailing list ?

The shape of the code looks really good. Do you want to send a RFC to the mediatek linux mailing list ?
Sirherobrine23 commented 2025-12-20 21:02:43 +00:00
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Are you still getting crashes with the pinctrl driver? If so it could be related to the interrupt handling.

So I have to restart the device three times before it stabilizes, after which it works normally

The shape of the code looks really good. Do you want to send a RFC to the mediatek linux mailing list ?

It's not ready yet, but apart from en7523, the rest is okay

> Are you still getting crashes with the pinctrl driver? If so it could be related to the interrupt handling. So I have to restart the device three times before it stabilizes, after which it works normally > The shape of the code looks really good. Do you want to send a RFC to the mediatek linux mailing list ? It's not ready yet, but apart from en7523, the rest is okay
merbanan commented 2025-12-20 21:13:26 +00:00
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Are you still getting crashes with the pinctrl driver? If so it could be related to the interrupt handling.

So I have to restart the device three times before it stabilizes, after which it works normally

I am not 100% sure the pinctrl driver is to blame. It could be npu driver. I am quite sure you need to follow the SDK memory reservation for the npu and not an7581 mainline. The npus have access to the memory also and might mess with it. We've had npu issues before and had to memset the npu memory to make sure things worked.

The shape of the code looks really good. Do you want to send a RFC to the mediatek linux mailing list ?

It's not ready yet, but apart from en7523, the rest is okay

ok, anyway I really liked how it turned out, it should be easy for kernel devs to review and come with concrete opinions on how the final form should look like.

In theory I think you should be able to ifdef the includes so you can select the platforms you want and get rid of some tables if you want to slim down the driver.

> > Are you still getting crashes with the pinctrl driver? If so it could be related to the interrupt handling. > > So I have to restart the device three times before it stabilizes, after which it works normally I am not 100% sure the pinctrl driver is to blame. It could be npu driver. I am quite sure you need to follow the SDK memory reservation for the npu and not an7581 mainline. The npus have access to the memory also and might mess with it. We've had npu issues before and had to memset the npu memory to make sure things worked. > > > The shape of the code looks really good. Do you want to send a RFC to the mediatek linux mailing list ? > > It's not ready yet, but apart from en7523, the rest is okay ok, anyway I really liked how it turned out, it should be easy for kernel devs to review and come with concrete opinions on how the final form should look like. In theory I think you should be able to ifdef the includes so you can select the platforms you want and get rid of some tables if you want to slim down the driver.
Sirherobrine23 commented 2025-12-21 01:00:55 +00:00
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I am not 100% sure the pinctrl driver is to blame. It could be npu driver. I am quite sure you need to follow the SDK memory reservation for the npu and not an7581 mainline. The npus have access to the memory also and might mess with it. We've had npu issues before and had to memset the npu memory to make sure things worked.

I disabled the NPU and pinctrl is working fine. Now I need to see what is causing this. It always happens when the NPU configures the CPU cores

> I am not 100% sure the pinctrl driver is to blame. It could be npu driver. I am quite sure you need to follow the SDK memory reservation for the npu and not an7581 mainline. The npus have access to the memory also and might mess with it. We've had npu issues before and had to memset the npu memory to make sure things worked. I disabled the NPU and pinctrl is working fine. Now I need to see what is causing this. It always happens when the NPU configures the CPU cores
merbanan commented 2025-12-21 11:15:11 +00:00
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I am not 100% sure the pinctrl driver is to blame. It could be npu driver. I am quite sure you need to follow the SDK memory reservation for the npu and not an7581 mainline. The npus have access to the memory also and might mess with it. We've had npu issues before and had to memset the npu memory to make sure things worked.

I disabled the NPU and pinctrl is working fine. Now I need to see what is causing this. It always happens when the NPU configures the CPU cores

So the SDK npu binaries have pcie and wifi card specifics in them so I'm not that hopeful that it ever will be possible to use them for wifi acceleration, one might need the same pcie and wifi driver. The WOE looks like a much better target. The NPUs should be possible to use for VXLAN and GRE acceleration though as that is NPU internal and might end up in the AN7581 npu code.

> > I am not 100% sure the pinctrl driver is to blame. It could be npu driver. I am quite sure you need to follow the SDK memory reservation for the npu and not an7581 mainline. The npus have access to the memory also and might mess with it. We've had npu issues before and had to memset the npu memory to make sure things worked. > > I disabled the NPU and pinctrl is working fine. Now I need to see what is causing this. It always happens when the NPU configures the CPU cores So the SDK npu binaries have pcie and wifi card specifics in them so I'm not that hopeful that it ever will be possible to use them for wifi acceleration, one might need the same pcie and wifi driver. The WOE looks like a much better target. The NPUs should be possible to use for VXLAN and GRE acceleration though as that is NPU internal and might end up in the AN7581 npu code.
Sirherobrine23 locked and limited conversation to collaborators 2026-05-16 14:37:41 +00:00
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Gemnon (Csaba) Guilherme-Bember-Duarte (Guilherme Bember Duarte) kvn193 (Kevin Garcia) lilmayofuksu (ayy lmao) merbanan (Benjamin Larsson) mkshevetskiy (Mikhail Kshevetskiy) raphaelgz (Raphael Gozzo) Rondom (Andreas Gnau) Sirherobrine23 (Matheus Sampaio Queiroga)
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Reference: airoha_en7523/kernel#16