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Device: Mikrotik e60iUGS (hex s 2025) #3
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airoha_en7523/kernel
Reference: airoha_en7523/openwrt#3
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Mikrotik e60iUGS (hEX S 2025)
SoC: Airoha EN7562CT
Button: Reset, Mode
Bootloader: RouterBoot v7
LEDs: 9 LEDs
USB: 1x 3.0
RAM: 512Mb (Winbond W634CU6RB)
NAND: 128Mb (Winbond 25N01KVZEIR) -> RouterOS
NOR: 1Mb (GigaDevice 25Q8OESIG) -> RouterBoot
Ethernet:
UART Pins source
Forum helpers:
dts
Extract from test pads:
nor_dump_hjy0ayzn1g_original.bin
fip.fip
now get boot log to kernel linux
U-Boot test for mikrotik
@merbanan how can I solve this problem?
@Sirherobrine23 you dont have to. When you boot without a console cable it will operate in full performance. This is a workaround that makes sure you dont end up with silent system spi-nand corruption. When this happen spi-nand is just a little bit slower.
@merbanan One question, how do we handle the bl2 and bl32 files from the ATF to the an7523? and the problem with snand drive is that we have two memories connected to the spi-control, i don't get that message on the xx230v
Mikrotik e60iUGS (hex s 2025)to Device: Mikrotik e60iUGS (hex s 2025)For nand and nor to be able to handle different cable select pins a specific pinmux needs to be set. from the looks of it gpio9 has an alternative function to handle spi_cs1. One might need to investigate both nand and nor chip select pins by toggling gpio9 manually.
From what I've tested a few times, I was able to switch to NAND, but the NOR stops being identified
Based on the dts it seems that the nor chip uses CS0 and the nand CS1. If it is possible to execute commands in the vendor software the pinmux for enabling CS1 should be dumped from memory to verify that the mode is activated.
I removed RouterBoot and replaced it with uBoot, but the RouterOS ELF file is still in the NAND, and I don't have access to Linux on RouterOS.
0x1FA20214 bit 0 should control this.
In theory if you manually toggle gpio9 it should change the level of CS on the spi-nand chip.
If 0x1FA20214 bit 0 is set the spi hardware should be able to manage chip access with both nor and nand available at the same time.
But it could be that there is another way to handle chip select. If that is the case you have to figure it out. Both chips are connected to the same spi bus and the CS line decides what chip listens and drivers the bus.
I'll take a look at that. The old Econet SPI driver handled three types: NOR, NAND, and parallel, and checked when eMMC was active. But I investigated this further, and when they migrated the SPI driver to their new drivers, Airoha-SNOR and Airoha-SNAND, they completely ignore parallel
with new patches for en8801sn phy (and test for pcs), now fix leds mapping in linux