spi switch cs0 and cs1 #27

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opened 2026-04-10 11:58:00 +00:00 by Sirherobrine23 · 5 comments
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	spi_ctrl: spi_controller@1fa10000 {
		compatible = "econet,ecnt-spi_ctrl";
		reg = <0x1fa10000 0x140>,		//SPI Controller Base
			  <0x00000000 0x1000>;		//SPI Controller auto read interrupt test
		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
	};

	spi_spi2nfi: spi_spi2nfi@1fa11000 {
		compatible = "econet,ecnt-spi2nfi";
		reg = <0x1fa11000 0x160>;	//NFI2SPI
	};

	spi_ecc: spi_ecc@1fa12000 {
		compatible = "econet,ecnt-spi_ecc";
		reg = <0x1fa12000 0x150>;	//NFI ECC
	};

	spi_nor_flash: snor {
		compatible = "econet,ecnt-snor";
		spi-controller = <&spi_ctrl>;
	};

	nand_flash: nand@1fa10000 {
		compatible = "econet,ecnt-nand";
		spi-controller = <&spi_ctrl>;
		spi2nfi = <&spi_spi2nfi>;
		spi-ecc = <&spi_ecc>;
	};	
```dts spi_ctrl: spi_controller@1fa10000 { compatible = "econet,ecnt-spi_ctrl"; reg = <0x1fa10000 0x140>, //SPI Controller Base <0x00000000 0x1000>; //SPI Controller auto read interrupt test interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; }; spi_spi2nfi: spi_spi2nfi@1fa11000 { compatible = "econet,ecnt-spi2nfi"; reg = <0x1fa11000 0x160>; //NFI2SPI }; spi_ecc: spi_ecc@1fa12000 { compatible = "econet,ecnt-spi_ecc"; reg = <0x1fa12000 0x150>; //NFI ECC }; spi_nor_flash: snor { compatible = "econet,ecnt-snor"; spi-controller = <&spi_ctrl>; }; nand_flash: nand@1fa10000 { compatible = "econet,ecnt-nand"; spi-controller = <&spi_ctrl>; spi2nfi = <&spi_spi2nfi>; spi-ecc = <&spi_ecc>; }; ``` - https://sirherobrine23.com.br/tplink_gpl/tplink-xx230v_v1/src/commit/4d76b590398d1e510a2a893f6fc4c69bfedb5768/sdk/en7529/linux-4.4.115/drivers/mtd/chips/newspiflash.c - https://sirherobrine23.com.br/tplink_gpl/xgb830v_v1/src/commit/35cb20be30678b93ab94d3b0d18d35c2b54dc5eb/sdk/an7551/openwrt-21.02/openwrt-21.02.1_dev/feeds/airoha/target/linux/generic/files/drivers/mtd/chips/newspiflash.c
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Owner

on pinctrl i needs use GPIO21 to change to cs1 in spi?

e38acb51e0..8b22a91a1d

on pinctrl i needs use [GPIO21](https://sirherobrine23.com.br/airoha_en7523/docs/src/branch/main/en7562ct.md#:~:text=%3A%20GPIO14%2C%20GPIO15-,SPI%20CS1%3A%20GPIO21,-Audio%20Interfaces) to change to cs1 in spi? https://sirherobrine23.com.br/airoha_en7523/kernel/compare/e38acb51e0a572b58fae651aa99adf98c058232c..8b22a91a1d2e1b8721de315d487832a01edfb376
Owner

You need to enable the function so that the pinctrl sets the correct iomux bit.

The following is what we use with the vendor SDK and the other driver.

        pio: pinctrl {
                compatible = "airoha,en7523-pinctrl";

                pinctrl_uart2: uart2grp {
                        function = "uart2";
                        groups = "uart2_grp";
                };
        };

        uart2: serial@1fbf0300 {
                compatible = "airoha,en7523-uart";
                reg = <0x1fbf0300 0x30>;
                reg-io-width = <4>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                clock-frequency = <7372800>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_uart2>;
                status = "disabled";
        };

Declare group then use it in the target node in the dtsi then enable it in the dts.

You need to enable the function so that the pinctrl sets the correct iomux bit. The following is what we use with the vendor SDK and the other driver. ``` pio: pinctrl { compatible = "airoha,en7523-pinctrl"; pinctrl_uart2: uart2grp { function = "uart2"; groups = "uart2_grp"; }; }; uart2: serial@1fbf0300 { compatible = "airoha,en7523-uart"; reg = <0x1fbf0300 0x30>; reg-io-width = <4>; reg-shift = <2>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <7372800>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "disabled"; }; ``` Declare group then use it in the target node in the dtsi then enable it in the dts.
Author
Owner

I added the pins to the pinctrl of the EN7523, and added them to the DTS, but it still didn't work. I probably mapped them incorrectly within the pinctrl:

spi_pins: spi_pins {
spi_pins {
function = "spi";
groups = "spi";
};
};
spi_cs1_pins: spi_cs1 {
spi_cs1 {
function = "spi";
groups = "spi_cs1";
};
};

&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;

I added the pins to the pinctrl of the EN7523, and added them to the DTS, but it still didn't work. I probably mapped them incorrectly within the pinctrl: https://sirherobrine23.com.br/airoha_en7523/openwrt/src/commit/47f0f4c15d1567e8ab854f39014f8940a833ba84/target/linux/airoha/dts/en7523.dtsi#L297-L309 https://sirherobrine23.com.br/airoha_en7523/openwrt/src/commit/47f0f4c15d1567e8ab854f39014f8940a833ba84/target/linux/airoha/dts/en7523-mikrotik_e60iugs.dts#L156-L159
Owner

Is bit 0 in 0x1FA20214 getting set?

Is bit 0 in 0x1FA20214 getting set?
Sirherobrine23 changed title from ToDO: spi snor to spi switch cs0 and cs1 2026-05-16 12:07:26 +00:00
Author
Owner

@merbanan

Mikrotik hEX S 2025

u-boot:

U-Boot> md 0x1FA20214 8
1fa20214: 00000000 00000000 00000000 00000000  ................
1fa20224: 00000000 00000000 00000000 00000000  ................

Openwrt:

root@OpenWrt:~# devmem 0x1FA20214
0x00000001

TP-Link xx230v

u-boot:

U-Boot> md 0x1FA20214 8
1fa20214: 00000000 00000000 00000000 00000000  ................
1fa20224: 00000000 00000000 00000000 00000000  ................

Openwrt:

root@OpenWrt:~# devmem 0x1FA20214
0x00000000
@merbanan Mikrotik hEX S 2025 u-boot: ``` U-Boot> md 0x1FA20214 8 1fa20214: 00000000 00000000 00000000 00000000 ................ 1fa20224: 00000000 00000000 00000000 00000000 ................ ``` Openwrt: ``` root@OpenWrt:~# devmem 0x1FA20214 0x00000001 ``` ---- TP-Link xx230v u-boot: ``` U-Boot> md 0x1FA20214 8 1fa20214: 00000000 00000000 00000000 00000000 ................ 1fa20224: 00000000 00000000 00000000 00000000 ................ ``` Openwrt: ``` root@OpenWrt:~# devmem 0x1FA20214 0x00000000 ```
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Reference: airoha_en7523/kernel#27