mirror of
https://github.com/jclehner/bcm3390.git
synced 2025-01-31 00:31:35 +00:00
383 lines
8.2 KiB
Plaintext
383 lines
8.2 KiB
Plaintext
/dts-v1/;
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/ {
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model = "Broadcom RG (7145a0)";
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compatible = "brcm,bcm7145a0-rg";
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subsystem = "rg_2nd_core";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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interrupt-parent = <&intc>;
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chosen { /*hand edit at the end of this only*/
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bootargs = "nosmp ubifs_apps jffs2_data debug";
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};
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memory {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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device_type = "memory";
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reg = < 0x10000000 0x06c00000 >;
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region_0: region@16000000 {
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contiguous-region;
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reg = <0x16000000 0x400000>;
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};
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};
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cma-dev@0 {
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#address-cells = <0>;
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#size-cells = <0>;
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compatible = "brcm,cma-plat-dev";
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linux,contiguous-region = <®ion_0>;
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};
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intc: interrupt-controller@ffd00000 {
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compatible = "arm,cortex-a15-gic";
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interrupt-controller;
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#interrupt-cells = <0x3>;
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reg = <0xffd01000 0x1000 0xffd02000 0x2000>;
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};
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pcie@d7800000 {
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reg = <0xd7800000 0x9310>;
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interrupts = <0x0 0x0 0x4>;
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compatible = "brcm,pci-plat-dev";
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device_type = "pcie";
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bus-ranges = <0 255>;
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#address-cells = <3>;
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#size-cells = <2>;
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tot-num-pcie = <2>;
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ranges = <0x02000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0 0 0 1 &intc 36 3
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0 0 0 2 &intc 37 3
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0 0 0 3 &intc 38 3
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0 0 0 4 &intc 39 3>;
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};
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pcie@d7a00000 {
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reg = <0xd7a00000 0x9310>;
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interrupts = <0x0 0x0 0x4>;
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compatible = "brcm,pci-plat-dev";
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device_type = "pci";
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bus-ranges = <0 255>;
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#address-cells = <3>;
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#size-cells = <2>;
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tot-num-pcie = <2>;
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ranges = <0x02000000 0x00000000 0x08000000 0xc8000000 0x00000000 0x08000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0 0 0 1 &intc 43 3
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0 0 0 2 &intc 44 3
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0 0 0 3 &intc 45 3
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0 0 0 4 &intc 46 3>;
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};
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timer {
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compatible = "arm,cortex-a15-timer",
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"arm,armv7-timer";
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interrupts = <1 13 0x0f08>,
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<1 14 0x0f08>,
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<1 11 0x0f08>,
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<1 10 0x0f08>;
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};
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brcm-mbox {
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compatible = "brcm,brcm-mbox";
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read = < 0x0000000F >; /* 0,1,2,3 */
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write = < 0x00000004 >; /* 2 */
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reg = <0xd38f0080 0x7C>,
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<0xd38f0000 0x7C>;
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interrupts = <0 114 0x4>;
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};
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serial@d3802800 {
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compatible = "brcm,buggy-dw-apb-uart", "ns16550a";
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reg = <0xd3802800 0x20>;
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reg-shift = <0x2>;
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reg-io-width = <0x4>;
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interrupts = <0x0 72 0x4>;
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clock-frequency = <81000000>;
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};
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t1 {
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compatible = "brcm,t1";
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};
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t2 {
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compatible = "brcm,t2";
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};
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fpm@0xd3a00000 {
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compatible = "brcm,fpm";
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brcm-resrv;
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reg = <0x1a230000 0x2000000>, /* Free Pool 0 */
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<0xd3a00000 0x20000>; /* Registers */
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init = <0>;
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};
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dqm@d38f0000 {
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compatible = "brcm,dqm";
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reg = <0xd38f0000 0x8000>;
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interrupts = <0 114 0>;
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dev-name = "cpucomm";
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l1-irq-mask-offset = <0x0050>;
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l1-irq-status-offset = <0x0054>;
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l1-irq-dqm-mask = <0x00400000>;
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cfg-offset = <0x0380>;
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lwm-irq-mask-offset = <0x038c>;
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lwm-irq-status-offset = <0x03a0>;
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ne-irq-mask-offset = <0x03cc>;
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ne-irq-status-offset = <0x03e0>;
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ne-status-offset = <0x03e8>;
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q-ctl-base-offset = <0x0400>;
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q-data-base-offset = <0x0800>;
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q-status-base-offset = <0x0b00>;
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q-mib-base-offset = <0x0c00>;
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q-word-count = <4>;
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q-count = <32>;
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cfg-qsm = <0>;
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qsm-size = <0x1000>;
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};
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dqm@d4600000 {
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compatible = "brcm,dqm";
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reg = <0xd4600000 0x200000>;
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interrupts = <0 111 0>;
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dev-name = "gfap";
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l1-irq-mask-offset = <0x1008>;
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l1-irq-status-offset = <0x100c>;
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l1-irq-dqm-mask = <0x00000008 0x02000000>;
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cfg-offset = <0x1800 0x2200>;
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lwm-irq-mask-offset = <0x1808 0x2208>;
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lwm-irq-status-offset = <0x180c 0x220c>;
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ne-irq-mask-offset = <0x1814 0x2214>;
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ne-irq-status-offset = <0x1818 0x2218>;
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ne-status-offset = <0x1820 0x2220>;
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q-ctl-base-offset = <0x1a00 0x2400>;
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q-data-base-offset = <0x1c00 0x2600>;
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q-status-base-offset = <0x1f00 0x2900>;
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q-mib-base-offset = <0x2000 0x2a00>;
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q-word-count = <4>;
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q-count = <64>;
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cfg-qsm = <0>;
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qsm-size = <0x3000>;
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};
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rpcrgstb: rpcrgstb {
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compatible = "brcm,itc-rpc";
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dev-name = "rg-stb";
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dqm = "cpucomm";
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tx-q = <0>;
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rx-q = <1>;
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};
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rpcrgcm: rpcrgcm {
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compatible = "brcm,itc-rpc";
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dev-name = "rg-cm";
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dqm = "cpucomm";
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tx-q = <2>;
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rx-q = <3>;
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};
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vflashclient {
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compatible = "brcm,brcm-vflashclient";
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brcm-resrv;
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reg = <0x16400000 0x400000>;
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client_id = <0>;
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rpc_channel = <&rpcrgstb>;
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};
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qchan0: q-channel0 {
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dev-name = "fap-exception";
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#tx-q-cells = <3>;
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/* DQM device, Q#, Priority */
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tx-q = "gfap", "12", "0", /* RG-->GFAP, hi priority */
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"gfap", "13", "1"; /* RG-->GFAP, lo priority */
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#rx-q-cells = <3>;
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/* DQM device, Q#, Priority */
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rx-q = "gfap", "27", "0", /* GFAP-->RG, hi priority */
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"gfap", "26", "1"; /* GFAP-->RG, lo priority */
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type = "fap-exception";
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q-msg-fmt = "gfap";
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};
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qchan1: q-channel1 {
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dev-name = "stb-private";
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#tx-q-cells = <3>;
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/* DQM device, Q#, Priority */
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tx-q = "cpucomm", "17", "0"; /* RG-->STB */
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#rx-q-cells = <3>;
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/* DQM device, Q#, Priority */
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rx-q = "cpucomm", "16", "0"; /* STB-->RG */
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type = "point-to-point";
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q-msg-fmt = "gfap";
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};
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priv1 { /* RG <--> STB private */
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compatible = "brcm,dqnet";
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channel = <&qchan1>;
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dev-name = "priv1";
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if-id = <0>;
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if-sub-id = <0>;
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demux = "none";
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link-type = "rpc";
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rpc-channel = <&rpcrgstb>;
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};
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stb0 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "stb0";
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if-id = <14>;
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if-sub-id = <0>;
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demux = "subid";
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link-type = "rpc";
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rpc-channel = <&rpcrgstb>;
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};
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stb1 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "stb1";
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if-id = <13>;
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if-sub-id = <0>;
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demux = "subid";
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link-type = "rpc";
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rpc-channel = <&rpcrgstb>;
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};
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eth0: ethernet0 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "eth0";
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if-id = <0>;
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if-sub-id = <0>; /* if-sub-id must match the first column in phy-port node */
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demux = "arl";
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link-type = "switch";
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};
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eth1: ethernet1 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "eth1";
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if-id = <0>;
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if-sub-id = <1>; /* if-sub-id must match the first column in phy-port node */
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demux = "arl";
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link-type = "switch";
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};
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eth2: ethernet2 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "eth2";
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if-id = <0>;
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if-sub-id = <2>; /* if-sub-id must match the first column in phy-port node */
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demux = "arl";
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link-type = "switch";
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};
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eth3: ethernet3 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "eth3";
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if-id = <0>;
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if-sub-id = <3>; /* if-sub-id must match the first column in phy-port node */
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demux = "arl";
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link-type = "switch";
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};
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moca0: moca0 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "moca0"; /* moca[0-based MAC index] */
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if-id = <0>;
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if-sub-id = <7>; /* if-sub-id must match the first column in phy-port node */
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demux = "arl";
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link-type = "switch";
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};
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cm0 {
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compatible = "brcm,dqnet";
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channel = <&qchan0>;
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dev-name = "cm0"; /* cm[0-based index] */
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if-id = <15>;
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if-sub-id = <0>;
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demux = "subid";
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link-type = "rpc";
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rpc-channel = <&rpcrgcm>;
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};
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ethsw@d4e00000 {
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compatible = "brcm,ethsw";
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reg = <0xd4e00000 0x42000>;
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interrupts = <0x0 0x65 0x0>,
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<0x0 0x66 0x0>;
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dev-name = "ethsw";
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phy-port = <0 1>,
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<1 2>,
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<2 3>,
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<3 4>;
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mii-port = <7 0 1000>;
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imp-port = <5 2000>,
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<8 2000>;
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led-map = <0x8f>;
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};
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unimac@d4800000 {
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compatible = "brcm,unimac";
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reg = <0xd4800000 0x20000>;
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mbdma_reg_offset = <0x0>;
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unimac_reg_offset = <0x600>;
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id_string = "unimac0";
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mbdma_use_scb = <0x1>;
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};
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unimac@d4a00000 {
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compatible = "brcm,unimac";
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reg = <0xd4a00000 0x20000>;
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mbdma_reg_offset = <0x0>;
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unimac_reg_offset = <0x600>;
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id_string = "unimac1";
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mbdma_use_scb = <0x1>;
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};
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gfap@d4600000 {
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compatible = "brcm,gfap";
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reg = <0xd4600000 0x1000000>;
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id_string = "gfap";
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gfap_use_scb = <0x1>;
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};
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/*
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bmoca@0xd7c00000 {
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compatible = "brcm,bmoca-instance";
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#address-cells = <1>;
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#size-cells = <1>;
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chip-id = <0x714500a0>;
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reg = <0xd7c00000 0x1ffda0>;
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interrupts = <0 0x15 0>;
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hw-rev = <0x2003>;
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rf-band = <0>;
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enet-id = <1>;
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mac-address = [ 00 10 18 85 71 45 ];
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};
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*/
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};
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