/dts-v1/;

/ {
	model = "Broadcom RG (7145a0)";
	compatible = "brcm,bcm7145a0-rg";
	subsystem = "rg_2nd_core";
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	interrupt-parent = <&intc>;

	chosen { /*hand edit at the end of this only*/
		bootargs = "nosmp ubifs_apps jffs2_data debug";
	};

	memory {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		device_type = "memory";
		reg = < 0x10000000 0x06c00000 >;

		region_0: region@16000000 {
			contiguous-region;
			reg = <0x16000000 0x400000>;
		};
	};

	cma-dev@0 {
		#address-cells = <0>;
		#size-cells = <0>;
		compatible = "brcm,cma-plat-dev";
		linux,contiguous-region = <&region_0>;
	};

	intc: interrupt-controller@ffd00000 {
		compatible = "arm,cortex-a15-gic";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		reg = <0xffd01000 0x1000 0xffd02000 0x2000>;
	};

	pcie@d7800000 {
		reg = <0xd7800000 0x9310>;
		interrupts = <0x0 0x0 0x4>;
		compatible = "brcm,pci-plat-dev";
		device_type = "pcie";
		bus-ranges = <0 255>;
		#address-cells = <3>;
		#size-cells = <2>;
		tot-num-pcie = <2>;
		ranges = <0x02000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0xf800 0 0 7>;
		interrupt-map = <0 0 0 1 &intc 36 3
				 0 0 0 2 &intc 37 3
				 0 0 0 3 &intc 38 3
				 0 0 0 4 &intc 39 3>;
	};

	pcie@d7a00000 {
		reg = <0xd7a00000 0x9310>;
		interrupts = <0x0 0x0 0x4>;
		compatible = "brcm,pci-plat-dev";
		device_type = "pci";
		bus-ranges = <0 255>;
		#address-cells = <3>;
		#size-cells = <2>;
		tot-num-pcie = <2>;
		ranges = <0x02000000 0x00000000 0x08000000 0xc8000000 0x00000000 0x08000000>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0xf800 0 0 7>;
		interrupt-map = <0 0 0 1 &intc 43 3
				 0 0 0 2 &intc 44 3
				 0 0 0 3 &intc 45 3
				 0 0 0 4 &intc 46 3>;
	};


	timer {
		compatible = "arm,cortex-a15-timer",
			     "arm,armv7-timer";
		interrupts = <1 13 0x0f08>,
			     <1 14 0x0f08>,
			     <1 11 0x0f08>,
			     <1 10 0x0f08>;
	};

	brcm-mbox {
		compatible = "brcm,brcm-mbox";
		read = < 0x0000000F >; /* 0,1,2,3 */
		write = < 0x00000004 >; /* 2 */
		reg =   <0xd38f0080 0x7C>,
				<0xd38f0000 0x7C>;
		interrupts = <0 114 0x4>;
	};

	serial@d3802800 {
		compatible = "brcm,buggy-dw-apb-uart", "ns16550a";
		reg = <0xd3802800 0x20>;
		reg-shift = <0x2>;
		reg-io-width = <0x4>;
		interrupts = <0x0 72 0x4>;
		clock-frequency = <81000000>;
	};

	t1 {
		compatible = "brcm,t1";
	};

	t2 {
		compatible = "brcm,t2";
	};

	fpm@0xd3a00000 {
		compatible = "brcm,fpm";
		brcm-resrv;
		reg = <0x1a230000 0x2000000>,	/* Free Pool 0	*/
		      <0xd3a00000 0x20000>;	/* Registers	*/
		init = <0>;
	};

	dqm@d38f0000 {
		compatible = "brcm,dqm";
		reg = <0xd38f0000 0x8000>;
		interrupts = <0 114 0>;

		dev-name = "cpucomm";

		l1-irq-mask-offset	= <0x0050>;
		l1-irq-status-offset	= <0x0054>;
		l1-irq-dqm-mask		= <0x00400000>;

		cfg-offset		= <0x0380>;
		lwm-irq-mask-offset	= <0x038c>;
		lwm-irq-status-offset	= <0x03a0>;
		ne-irq-mask-offset	= <0x03cc>;
		ne-irq-status-offset	= <0x03e0>;
		ne-status-offset	= <0x03e8>;
		q-ctl-base-offset	= <0x0400>;
		q-data-base-offset	= <0x0800>;
		q-status-base-offset	= <0x0b00>;
		q-mib-base-offset       = <0x0c00>;

		q-word-count		= <4>;
		q-count			= <32>;
		cfg-qsm			= <0>;
		qsm-size		= <0x1000>;
	};

	dqm@d4600000 {
		compatible = "brcm,dqm";
		reg = <0xd4600000 0x200000>;
		interrupts = <0 111 0>;

		dev-name = "gfap";

		l1-irq-mask-offset	= <0x1008>;
		l1-irq-status-offset	= <0x100c>;
		l1-irq-dqm-mask		= <0x00000008 0x02000000>;

		cfg-offset		= <0x1800 0x2200>;
		lwm-irq-mask-offset	= <0x1808 0x2208>;
		lwm-irq-status-offset	= <0x180c 0x220c>;
		ne-irq-mask-offset	= <0x1814 0x2214>;
		ne-irq-status-offset	= <0x1818 0x2218>;
		ne-status-offset	= <0x1820 0x2220>;

		q-ctl-base-offset	= <0x1a00 0x2400>;
		q-data-base-offset	= <0x1c00 0x2600>;
		q-status-base-offset	= <0x1f00 0x2900>;
		q-mib-base-offset       = <0x2000 0x2a00>;

		q-word-count		= <4>;
		q-count			= <64>;
		cfg-qsm			= <0>;
		qsm-size		= <0x3000>;
	};

	rpcrgstb: rpcrgstb {
		compatible = "brcm,itc-rpc";
		dev-name = "rg-stb";
		dqm = "cpucomm";
		tx-q = <0>;
		rx-q = <1>;
	};

	rpcrgcm: rpcrgcm {
		compatible = "brcm,itc-rpc";
		dev-name = "rg-cm";
		dqm = "cpucomm";
		tx-q = <2>;
		rx-q = <3>;
	};

	vflashclient {
		compatible = "brcm,brcm-vflashclient";
		brcm-resrv;
		reg = <0x16400000 0x400000>;
		client_id = <0>;
		rpc_channel = <&rpcrgstb>;
	};

	qchan0: q-channel0 {
		dev-name = "fap-exception";

		#tx-q-cells = <3>;
		/*	DQM device,	Q#,	Priority				*/
		tx-q =	"gfap",		"12",	"0",	/* RG-->GFAP, hi priority	*/
			"gfap",		"13",	"1";	/* RG-->GFAP, lo priority	*/
		#rx-q-cells = <3>;
		/*	DQM device,	Q#,	Priority				*/
		rx-q =	"gfap",		"27",	"0",	/* GFAP-->RG, hi priority	*/
			"gfap",		"26",	"1";	/* GFAP-->RG, lo priority	*/

		type = "fap-exception";
		q-msg-fmt = "gfap";
	};

        qchan1: q-channel1 {
                dev-name = "stb-private";

		#tx-q-cells = <3>;
		/*	DQM device,	Q#,	Priority		*/
		tx-q =	"cpucomm",	"17",	"0";	/* RG-->STB	*/
		#rx-q-cells = <3>;
		/*	DQM device,	Q#,	Priority		*/
		rx-q =	"cpucomm",	"16",	"0";	/* STB-->RG	*/

		type = "point-to-point";
		q-msg-fmt = "gfap";
        };

	priv1 { /* RG <--> STB private */
		compatible = "brcm,dqnet";
		channel = <&qchan1>;
		dev-name = "priv1";
		if-id = <0>;
		if-sub-id = <0>;
		demux = "none";
		link-type = "rpc";
		rpc-channel = <&rpcrgstb>;
	};

	stb0 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "stb0";
		if-id = <14>;
		if-sub-id = <0>;
		demux = "subid";
		link-type = "rpc";
		rpc-channel = <&rpcrgstb>;
	};

	stb1 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "stb1";
		if-id = <13>;
		if-sub-id = <0>;
		demux = "subid";
		link-type = "rpc";
		rpc-channel = <&rpcrgstb>;
	};

	eth0: ethernet0 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "eth0";
		if-id = <0>;
		if-sub-id = <0>; /* if-sub-id must match the first column in phy-port node */
		demux = "arl";
		link-type = "switch";
	};

	eth1: ethernet1 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "eth1";
		if-id = <0>;
		if-sub-id = <1>; /* if-sub-id must match the first column in phy-port node */
		demux = "arl";
		link-type = "switch";
	};

	eth2: ethernet2 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "eth2";
		if-id = <0>;
		if-sub-id = <2>; /* if-sub-id must match the first column in phy-port node */
		demux = "arl";
		link-type = "switch";
	};

	eth3: ethernet3 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "eth3";
		if-id = <0>;
		if-sub-id = <3>; /* if-sub-id must match the first column in phy-port node */
		demux = "arl";
		link-type = "switch";
	};

	moca0: moca0 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "moca0"; /* moca[0-based MAC index] */
		if-id = <0>;
		if-sub-id = <7>; /* if-sub-id must match the first column in phy-port node */
		demux = "arl";
		link-type = "switch";
	};

	cm0 {
		compatible = "brcm,dqnet";
		channel = <&qchan0>;
		dev-name = "cm0"; /* cm[0-based index] */
		if-id = <15>;
		if-sub-id = <0>;
		demux = "subid";
		link-type = "rpc";
		rpc-channel = <&rpcrgcm>;
	};

	ethsw@d4e00000 {
		compatible = "brcm,ethsw";
		reg        = <0xd4e00000 0x42000>;
		interrupts = <0x0 0x65 0x0>,
			     <0x0 0x66 0x0>;

		dev-name   = "ethsw";
		phy-port   = <0 1>,
			     <1 2>,
			     <2 3>,
			     <3 4>;
		mii-port   = <7 0 1000>;
		imp-port   = <5 2000>,
			     <8 2000>;

		led-map    = <0x8f>;
	};

	unimac@d4800000 {
		compatible = "brcm,unimac";
		reg = <0xd4800000 0x20000>;
		mbdma_reg_offset = <0x0>;
		unimac_reg_offset = <0x600>;
		id_string = "unimac0";
		mbdma_use_scb = <0x1>;
	};

	unimac@d4a00000 {
		compatible = "brcm,unimac";
		reg = <0xd4a00000 0x20000>;
		mbdma_reg_offset = <0x0>;
		unimac_reg_offset = <0x600>;
		id_string = "unimac1";
		mbdma_use_scb = <0x1>;
	};

	gfap@d4600000 {
		compatible = "brcm,gfap";
		reg = <0xd4600000 0x1000000>;
		id_string = "gfap";
		gfap_use_scb = <0x1>;
	};
/*
	bmoca@0xd7c00000 {
		compatible = "brcm,bmoca-instance";
		#address-cells = <1>;
		#size-cells = <1>;
		chip-id = <0x714500a0>;
		reg = <0xd7c00000 0x1ffda0>;
		interrupts = <0 0x15 0>;
		hw-rev = <0x2003>;
		rf-band = <0>;
		enet-id = <1>;
		mac-address = [ 00 10 18 85 71 45 ];
	};
*/
};