d2f2f1d10c
The QEMU devicetree uses a different order for SMMUv3 interrupt names,
and there isn't a good reason for enforcing a specific order. Since all
interrupt lines are optional, operating systems should not expect a
fixed interrupt array layout; they should instead match each interrupt
to its name individually. Besides, as a result of commit e4783856a2
("dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional"), "cmdq-sync"
and "priq" are already permutable. Relax the interrupt-names array
entirely by allowing any permutation, incidentally making the schema
more readable.
Note that dt-validate won't allow duplicate names here so we don't need
to specify maxItems or add additional checks, it's quite neat.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220916133145.1910549-1-jean-philippe@linaro.org
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2.6 KiB
2.6 KiB