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927fe598db
Add pending patch to make address some workaround needed to make the Aeonsemi AS21xxx PHY working on the Airoha AN7581/AN7583 board. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From 6003da596beb6b8974e61b7ff494476a323fbef5 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Tue, 8 Jul 2025 11:29:49 +0200
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Subject: [PATCH 3/4] net: phy: as21xxx: force C45 OPs for AUTONEG
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With further testing with 2.5G NIC, it was discovered that the PHY
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require the C45 OPs to configure and restart ANEG or speed higher than
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1G doesn't function correctly.
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To force C45 OPs with generic PHY function, clear the C22 bit from
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devices_in_package bitmask.
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Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/net/phy/as21xxx.c | 7 +++++++
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1 file changed, 7 insertions(+)
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--- a/drivers/net/phy/as21xxx.c
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+++ b/drivers/net/phy/as21xxx.c
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@@ -616,6 +616,13 @@ static int as21xxx_probe(struct phy_devi
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if (ret)
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return ret;
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+ /* Even if PHY declare support for Clause 22 register,
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+ * Clause 45 register should be used for ANEG configuration
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+ * and restart. Clear the C22 bit for devices_in_package to
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+ * force C45 generic OPs in generic PHY ANGE OPs.
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+ */
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+ phydev->c45_ids.devices_in_package &= ~BIT(0);
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+
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ret = aeon_ipc_sync_parity(phydev, priv);
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if (ret)
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return ret;
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