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64ed1c74d5
STM32U37/U38x devices have 1Mb flash (split into pages of 4 Kb) Note: add wait for the BSY bit to be cleared in FLASH_SR Change-Id: I8208aa81951b9e2f7b0a6bbfce3f7c8ad0f78ade Signed-off-by: HAOUES Ahmed <ahmed.haoues@st.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8874 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
46 lines
1.3 KiB
INI
46 lines
1.3 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# script for stm32u3x family
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# stm32u3x devices support both JTAG and SWD transports.
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source [find target/swj-dp.tcl]
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source [find mem_helper.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32u3x
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}
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source [find target/stm32x5x_common.cfg]
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# In order to allow the flash program and erase operations,
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# we need to set the voltage scale to range 1
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proc config_voltage_range {} {
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set offset [expr {[stm32x5x_is_secure] ? 0x10000000 : 0}]
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# PWR voltage scaling register
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set PWR_VOSR [expr {0x4003080C + $offset}]
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# PWR supply voltage monitoring control register
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set PWR_SVMCR [expr {0x40030810 + $offset}]
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# RCC AHB1 peripheral clock enable register 2
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# RCC_AHB1ENR2 = PWREN
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mww [expr {0x40030C94 + $offset}] 0x4
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if {(([mrw $PWR_VOSR] & 0x10001) != 0x10001)} {
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# PWR_SVMCR = IO2SV
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mmw $PWR_SVMCR 0x20000000 0
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# PWR_VOSR : R1EN: Voltage scaling range 1
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mmw $PWR_VOSR 1 3
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# while !(PWR_VOSR & R1RDY)
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while {([mrw $PWR_VOSR] & 0x10001) != 0x10001} {}
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# Enable EPOD Booster
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mmw $PWR_VOSR 0x00000100 0
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# while !(PWR_VOSR & BOOSTRDY)
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while {([mrw $PWR_VOSR] & 0x1000000) != 0} {}
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}
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}
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$_TARGETNAME configure -event reset-init {
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config_voltage_range
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}
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