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b68d23da3c
In previous implementation, it was known that it does not perform full reset, and that some peripherals, such as GLB core, which handles among other stuff GPIOs, was not reset. It was presumed, that full reset by software is not possible, although, by accident, even when comment says that CTRL_PWRON_RESET is set to 1, it is not (value written into 0x40000018 supposed to be 0x7, not 0x6). CTRL_PWRON_RESET indeed triggers full "power-on like" reset, so this method is implemented in this commit. There are some workarounds to make reset seamless, without any error messages, which are described in comments of TCL script. Only down-side of this reset is, that chip is halted after reset bit later in BootROM than previous implementation, but it's still good. Change-Id: Ife2cdcc6a2d96a2e24039bfec149705baf046318 Signed-off-by: Marek Kraus <gamelaster@outlook.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8529 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins |
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board | ||
chip | ||
cpld | ||
cpu | ||
fpga | ||
interface | ||
target | ||
test | ||
tools | ||
bitsbytes.tcl | ||
mem_helper.tcl | ||
memory.tcl | ||
mmr_helpers.tcl |