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The Rockchip RK3588 SoC is used in systems such as the GenBook RK3588 open-hardware laptop and the Coolpi CM5 compute module. This patch adds support for debugging those. Tested using the ST-LINK/V2 debug adapter in SWD mode connected to the SDMMC_D2 (SWCLK) and SDMMC_D3 (SWDIO) pins on the 50-pin J17 connector inside the GenBook RK3588 laptop. Change-Id: Ia5da403054b6c9aa41184a4e092a74aa882a267d Signed-off-by: Andreas Dannenberg <andre@miauco.com> Reviewed-on: https://review.openocd.org/c/openocd/+/9013 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
87 lines
2.4 KiB
INI
87 lines
2.4 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Rockchip RK3588 Target
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# https://www.rock-chips.com/a/en/products/RK35_Series/2022/0926/1660.html
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# Andreas Dannenberg <andre@miauco.com>
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME rk3588
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}
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x2ba01477
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}
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adapter speed 4000
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transport select swd
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# Declare the one SWD tap to access the DAP
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swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID
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# Create the DAP
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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# Create target to allow accessing system memory directly
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target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
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# Declare the 8 main application cores (4 little cores + 4 big cores)
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# Little cluster (cores 0..3)
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set _TARGETNAME $_CHIPNAME.lcore
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set $_TARGETNAME.base(0) 0x81004000
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set $_TARGETNAME.base(1) 0x81005000
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set $_TARGETNAME.base(2) 0x81006000
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set $_TARGETNAME.base(3) 0x81007000
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set $_TARGETNAME.cti(0) 0x81014000
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set $_TARGETNAME.cti(1) 0x81015000
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set $_TARGETNAME.cti(2) 0x81016000
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set $_TARGETNAME.cti(3) 0x81017000
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# Big cluster (cores 4..7)
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set _TARGETNAME $_CHIPNAME.bcore
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set $_TARGETNAME.base(4) 0x81024000
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set $_TARGETNAME.base(5) 0x81025000
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set $_TARGETNAME.base(6) 0x81026000
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set $_TARGETNAME.base(7) 0x81027000
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set $_TARGETNAME.cti(4) 0x81034000
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set $_TARGETNAME.cti(5) 0x81035000
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set $_TARGETNAME.cti(6) 0x81036000
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set $_TARGETNAME.cti(7) 0x81037000
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# Build string used to enable SMP mode
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set _smp_command "target smp"
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set _cores 8
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for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
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if {$_core < 4} {
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set _TARGETNAME $_CHIPNAME.lcore
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} else {
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set _TARGETNAME $_CHIPNAME.bcore
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}
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cti create cti$_core -dap $_CHIPNAME.dap -baseaddr [set $_TARGETNAME.cti($_core)] -ap-num 0
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target create ${_TARGETNAME}$_core aarch64 \
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-dap $_CHIPNAME.dap -coreid $_core -cti cti$_core \
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-dbgbase [set $_TARGETNAME.base($_core)]
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if { $_core != 0 } {
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# non-boot core examination may fail
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${_TARGETNAME}$_core configure -defer-examine
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} else {
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# uncomment to use hardware threads pseudo rtos
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# ${_TARGETNAME}$_core configure -rtos hwthread
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}
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set _smp_command "$_smp_command ${_TARGETNAME}$_core"
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}
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eval $_smp_command
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# Set default target to boot core
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targets $_CHIPNAME.lcore0
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