mirror of
https://git.code.sf.net/p/openocd/code
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e6505b0489
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl/ target| while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7027
Tested-by: jenkins
75 lines
1.8 KiB
INI
75 lines
1.8 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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set _ENDIAN big
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME or1k
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}
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if { [info exists TAP_TYPE] } {
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set _TAP_TYPE $TAP_TYPE
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} else {
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puts "You need to select a tap type"
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shutdown
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}
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# Configure the target
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if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
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if { [info exists FPGATAPID] } {
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set _FPGATAPID $FPGATAPID
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} else {
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puts "You need to set your FPGA JTAG ID"
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shutdown
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}
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jtag newtap $_CHIPNAME cpu -irlen 10 -expected-id $_FPGATAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
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# Select the TAP core we are using
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tap_select vjtag
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} elseif { [string compare $_TAP_TYPE "XILINX_BSCAN"] == 0 } {
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if { [info exists FPGATAPID] } {
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set _FPGATAPID $FPGATAPID
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} else {
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puts "You need to set your FPGA JTAG ID"
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shutdown
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}
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jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id $_FPGATAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
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# Select the TAP core we are using
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tap_select xilinx_bscan
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} else {
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# OpenCores Mohor JTAG TAP ID
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set _CPUTAPID 0x14951185
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jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
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# Select the TAP core we are using
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tap_select mohor
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}
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# Select the debug unit core we are using. This debug unit as an option.
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set ADBG_USE_HISPEED 1
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set ENABLE_JSP_SERVER 2
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set ENABLE_JSP_MULTI 4
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# If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
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# on burst reads and writes to improve download speeds.
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# This option must match the RTL configured option.
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du_select adv [expr {$ADBG_USE_HISPEED | $ENABLE_JSP_SERVER | $ENABLE_JSP_MULTI}]
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