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5f6b25aa91
The target supports both SWD and JTAG, but the existing cfg file only supports JTAG. Using the standard [using_jtag] mechanism, the user would now have a choice. Change-Id: Ic6adb68090422812d591f6bf5b945ac10f323c74 Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8020 Reviewed-by: Jörg Wunsch <openocd@uriah.heep.sax.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
45 lines
1.3 KiB
INI
45 lines
1.3 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# SAMA5D2 devices support both JTAG and SWD transports.
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#
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# The JTAG connection is disabled at reset, and during the ROM Code execution.
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# It is re-enabled when the ROM code jumps in the boot file copied from an
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# external Flash memory into the internalSRAM, or when the ROM code launches
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# the SAM-BA monitor, when no boot file has been found in any external Flash
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# memory.
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# For more JTAG related information see, :
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# https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-sheet-ds60001476G.pdf
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#
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# If JTAGSEL pin:
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# - if enabled, boundary Scan mode is activated. JTAG ID Code value is 0x05B3F03F.
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# - if disabled, ICE mode is activated. Debug Port JTAG IDCODE value is 0x5BA00477
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#
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source [find target/swj-dp.tcl]
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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if { [using_jtag] } {
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set _CPUTAPID 0x5ba00477
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} else {
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# SWD IDCODE (single drop, arm)
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set _CPUTAPID 0x5ba02477
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}
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}
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME at91sama5d2
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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# Cortex-A5 target
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set _TARGETNAME $_CHIPNAME.cpu_a5
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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target create $_TARGETNAME.0 cortex_a -dap $_CHIPNAME.dap
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