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mirror of https://git.code.sf.net/p/openocd/code synced 2024-11-24 17:36:22 +00:00
openocd/tcl/fpga/altera-cyclonev.cfg
Daniel Anselmi 9bc7a381b2 pld/intel: remove idcodes from intel.c
Remove list of id codes for all families.
Maintain a list with id, bscan-length and check position
in the tcl config files for each family.

The Intel FPGA Driver option 'family' is not otional anymore.

Change-Id: I9a40a041069e84f6b4728f2cd715756a36759c89
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8083
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:25:05 +00:00

40 lines
1.1 KiB
INI

# SPDX-License-Identifier: GPL-2.0-or-later
# Intel Cyclone 5 FPGA
# see Cyclone V Device Handbook
# Table 9-1: IDCODE Information for Cyclone V Devices
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME cyclonev
}
array set _CYCLONE_5_DATA {
0x02b150dd { 864 163 5CEA2}
0x02d020dd {1485 19 5CSEA6_5CSXC6_5CSTD6}
0x02b040dd {1728 -1 5CGXC9_5CGTD9}
0x02b050dd { 864 163 5CEA4}
0x02b030dd {1488 19 5CGXC7_5CGTD7}
0x02d120dd {1485 -1 5CSEA5_5CSXC5_5CSTD5}
0x02b220dd {1104 19 5CEA5}
0x02b020dd {1104 19 5CGXC5_5CGTD5}
0x02d010dd {1197 -1 5CSEA4_5CSXC4}
0x02b120dd {1104 19 5CGXC4}
0x02b140dd {1728 -1 5CEA9}
0x02b010dd { 720 19 5CGXC3}
0x02b130dd {1488 19 5CEA7}
0x02d110dd {1197 -1 5CSEA2_5CSXC2}
}
set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
foreach id [array names _CYCLONE_5_DATA] {
set cmd [concat "-expected-id" id]
}
eval $jtag_newtap_cmd
source [find fpga/altera_common_init.cfg]
pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cyclonev
jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_5_DATA}"