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659f2e062d
Adding a single file for each different ir-length. Change-Id: Iba3dd55b91c28fdb4d0cafa1ededd939fe61a267 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7715 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
38 lines
1.2 KiB
INI
38 lines
1.2 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# xilinx series 7 (artix, kintex, virtex)
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# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
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# https://bsdl.info/view.htm?sid=08e275a0cd3ac38988ca59b002289d77
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# https://bsdl.info/view.htm?sid=44dae65d3cf9593188ca59b002289d77
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#
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# this config file is for XC7VX1140T and XC7V2000T only.
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# for other virtex-7 devices use xilinx-xc7vh580t.cfg or xilinx-xc7vh870t.cfg or xilinx-xc7.cfg
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME xc7v
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}
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#0x036D5093: XC7VX1140T
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#0x036By093: XC7V2000T
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#y = xx11 = 3, 7, B or F
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jtag newtap $_CHIPNAME tap -irlen 24 -ignore-version \
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-expected-id 0x036B3093 -expected-id 0x036B7093 \
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-expected-id 0x036BB093 -expected-id 0x036BF093 \
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-expected-id 0x036D5093
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#CFG_OUT_SLR0 0x124924
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#CFG_IN_SLR0 0x164924
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#CFG_OUT_SLR1 0x904924
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#CFG_IN_SLR1 0x905924
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#CFG_OUT_SLR2 0x924124
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#CFG_IN_SLR2 0x924164
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#CFG_OUT_SLR3 0x924904
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#CFG_IN_SLR3 0x924905
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pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
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# cfg_out cfg_in jprogb jstart jshutdown
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virtex2 set_instr_codes $_CHIPNAME.pld 0x3FFFFF 0x3FFFFF 0x2CB2CB 0x30C30C 0x34D34D
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