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d654e523ba
Use configurable virtex pld driver to add support for more xilinx fpga families. Change-Id: Iff10c8c511787734fa289bdba15f03131d51e071 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7352 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
36 lines
1.0 KiB
INI
36 lines
1.0 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# xilinx virtex 6
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# https://www.xilinx.com/support/documentation/user_guides/ug360.pdf
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME xc6v
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}
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# the 4 top bits (28:31) are the die stepping. ignore it.
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jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version \
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-expected-id 0x042A2093 \
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-expected-id 0x042A4093 \
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-expected-id 0x042A8093 \
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-expected-id 0x042AC093 \
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-expected-id 0x04244093 \
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-expected-id 0x0424A093 \
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-expected-id 0x0424C093 \
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-expected-id 0x04250093 \
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-expected-id 0x04252093 \
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-expected-id 0x04256093 \
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-expected-id 0x0423A093 \
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-expected-id 0x04286093 \
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-expected-id 0x04288093 \
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-expected-id 0x042C4093 \
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-expected-id 0x042CA093 \
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-expected-id 0x042CC093 \
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-expected-id 0x042D0093
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pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
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# cfg_out cfg_in jprogb jstart jshutdown user1-4
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virtex2 set_instr_codes $_CHIPNAME.pld 0x3C4 0x3C5 0x3CB 0x3CC 0x3CD
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virtex2 set_user_codes $_CHIPNAME.pld 0x3C2 0x3C3 0x3E2 0x3E3
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