mirror of
https://git.code.sf.net/p/openocd/code
synced 2024-11-25 13:26:27 +00:00
573a39b36c
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl | while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: Ief3da306a6e1978de7dfb8f552f9ff23151f9944
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7030
Tested-by: jenkins
93 lines
2.9 KiB
INI
93 lines
2.9 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Peripheral identifiers/interrupts.
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#
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set AT91_ID_FIQ 0 ;# Advanced Interrupt Controller (FIQ)
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set AT91_ID_SYS 1 ;# System Peripherals
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set AT91SAM9261_ID_PIOA 2 ;# Parallel IO Controller A
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set AT91SAM9261_ID_PIOB 3 ;# Parallel IO Controller B
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set AT91SAM9261_ID_PIOC 4 ;# Parallel IO Controller C
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set AT91SAM9261_ID_US0 6 ;# USART 0
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set AT91SAM9261_ID_US1 7 ;# USART 1
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set AT91SAM9261_ID_US2 8 ;# USART 2
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set AT91SAM9261_ID_MCI 9 ;# Multimedia Card Interface
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set AT91SAM9261_ID_UDP 10 ;# USB Device Port
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set AT91SAM9261_ID_TWI 11 ;# Two-Wire Interface
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set AT91SAM9261_ID_SPI0 12 ;# Serial Peripheral Interface 0
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set AT91SAM9261_ID_SPI1 13 ;# Serial Peripheral Interface 1
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set AT91SAM9261_ID_SSC0 14 ;# Serial Synchronous Controller 0
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set AT91SAM9261_ID_SSC1 15 ;# Serial Synchronous Controller 1
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set AT91SAM9261_ID_SSC2 16 ;# Serial Synchronous Controller 2
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set AT91SAM9261_ID_TC0 17 ;# Timer Counter 0
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set AT91SAM9261_ID_TC1 18 ;# Timer Counter 1
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set AT91SAM9261_ID_TC2 19 ;# Timer Counter 2
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set AT91SAM9261_ID_UHP 20 ;# USB Host port
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set AT91SAM9261_ID_LCDC 21 ;# LDC Controller
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set AT91SAM9261_ID_IRQ0 29 ;# Advanced Interrupt Controller (IRQ0)
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set AT91SAM9261_ID_IRQ1 30 ;# Advanced Interrupt Controller (IRQ1)
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set AT91SAM9261_ID_IRQ2 31 ;# Advanced Interrupt Controller (IRQ2)
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#
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# User Peripheral physical base addresses.
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#
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set AT91SAM9261_BASE_TCB0 0xfffa0000
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set AT91SAM9261_BASE_TC0 0xfffa0000
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set AT91SAM9261_BASE_TC1 0xfffa0040
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set AT91SAM9261_BASE_TC2 0xfffa0080
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set AT91SAM9261_BASE_UDP 0xfffa4000
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set AT91SAM9261_BASE_MCI 0xfffa8000
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set AT91SAM9261_BASE_TWI 0xfffac000
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set AT91SAM9261_BASE_US0 0xfffb0000
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set AT91SAM9261_BASE_US1 0xfffb4000
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set AT91SAM9261_BASE_US2 0xfffb8000
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set AT91SAM9261_BASE_SSC0 0xfffbc000
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set AT91SAM9261_BASE_SSC1 0xfffc0000
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set AT91SAM9261_BASE_SSC2 0xfffc4000
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set AT91SAM9261_BASE_SPI0 0xfffc8000
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set AT91SAM9261_BASE_SPI1 0xfffcc000
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set AT91_BASE_SYS 0xffffea00
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#
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# System Peripherals (offset from AT91_BASE_SYS)
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#
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set AT91_SDRAMC 0xffffea00
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set AT91_SMC 0xffffec00
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set AT91_MATRIX 0xffffee00
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set AT91_AIC 0xfffff000
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set AT91_DBGU 0xfffff200
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set AT91_PIOA 0xfffff400
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set AT91_PIOB 0xfffff600
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set AT91_PIOC 0xfffff800
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set AT91_PMC 0xfffffc00
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set AT91_RSTC 0xfffffd00
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set AT91_SHDWC 0xfffffd10
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set AT91_RTT 0xfffffd20
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set AT91_PIT 0xfffffd30
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set AT91_WDT 0xfffffd40
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set AT91_GPBR 0xfffffd50
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set AT91_USART0 $AT91SAM9261_BASE_US0
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set AT91_USART1 $AT91SAM9261_BASE_US1
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set AT91_USART2 $AT91SAM9261_BASE_US2
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#
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# Internal Memory.
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#
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set AT91SAM9261_SRAM_BASE 0x00300000 ;# Internal SRAM base address
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set AT91SAM9261_SRAM_SIZE 0x00028000 ;# Internal SRAM size (160Kb)
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set AT91SAM9261_ROM_BASE 0x00400000 ;# Internal ROM base address
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set AT91SAM9261_ROM_SIZE 0x00008000 ;# Internal ROM size (32Kb)
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set AT91SAM9261_UHP_BASE 0x00500000 ;# USB Host controller
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set AT91SAM9261_LCDC_BASE 0x00600000 ;# LDC controller
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#
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# Cpu Name
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#
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set AT91_CPU_NAME "AT91SAM9261"
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