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- Config files for DAP/JTAG and DAP/SWD systems - Xtensa core config definitions for NXP RT685 with Xtensa HiFi DSP Signed-off-by: Ian Thompson <ianst@cadence.com> Change-Id: I9c3280052073d86e09c7553de661eb8662a95c4a Reviewed-on: https://review.openocd.org/c/openocd/+/7145 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
15 lines
362 B
INI
15 lines
362 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Cadence KC705 FPGA Development Platform for Xtensa targets
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# Can be used with various external adapters that support DAP, e.g. JLink
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#
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adapter speed 5000
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# KC705 supports DAP/JTAG
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transport select jtag
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set XTENSA_DAP enable
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set XTENSA_DAP_BASE 0x10000
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# Create Xtensa target first
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source [find target/xtensa.cfg]
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