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This commit provides startup files for the Synopsys DesignWare ARC HSDK-4xD board. These have been adapted from the corresponding snps_hsdk.cfg files, the only functional change being the JTAG IDs for the new board's CPU cores. Change-Id: I19a0cd13bc09de90cfe2a7cccf1239e459fd8077 Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7829 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Evgeniy Didin <didin@synopsys.com>
20 lines
411 B
INI
20 lines
411 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Copyright (C) 2023 Synopsys, Inc.
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# Artemiy Volkov <artemiy@synopsys.com>
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# Adapted from tcl/board/snps_hsdk.cfg.
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#
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# Synopsys DesignWare ARC HSDK Software Development Platform (HS47D cores)
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#
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source [find interface/ftdi/snps_sdp.cfg]
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adapter speed 10000
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# ARCs supports only JTAG.
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transport select jtag
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# Configure SoC
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source [find target/snps_hsdk_4xd.cfg]
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