mirror of
https://git.code.sf.net/p/openocd/code
synced 2024-11-22 04:56:28 +00:00
76ba25a8a5
Add support for ECP5 FPGA targets and board based on this chips: Radiona ULX3S and Lambdaconcept ECPIX-5 Change-Id: I932fc6e2458cda7d63ac21579acddea5b53410bc Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: https://review.openocd.org/c/openocd/+/6112 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
28 lines
895 B
INI
28 lines
895 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
|
|
#
|
|
# LambdaConcept ECPIX-5
|
|
# http://docs.lambdaconcept.com/ecpix-5/
|
|
# Currently there are following board variants:
|
|
# ECPIX-5 45F - LFE5UM5G-45F
|
|
# ECPIX-5 85F - LFE5UM5G-85F
|
|
#
|
|
# This boards have two JTAG interfaces:
|
|
# - CN4, micro USB port connected to FT2232HQ chip:
|
|
# ADBUS0 TCK
|
|
# ADBUS1 TDI
|
|
# ADBUS2 TDO
|
|
# ADBUS3 TMS
|
|
# BDBUS0 UART_TXD
|
|
# BDBUS1 UART_RXD
|
|
# This interface should be used with following config:
|
|
# interface/ftdi/lambdaconcept_ecpix-5.cfg
|
|
# - CN3, 6 pin connector
|
|
# See schematics for more details:
|
|
# http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF
|
|
#
|
|
# No reset lines are implemented. So it is not possible to remote reset the FPGA
|
|
# by using any of this interfaces
|
|
|
|
source [find interface/ftdi/lambdaconcept_ecpix-5.cfg]
|
|
source [find fpga/lattice_ecp5.cfg]
|