mirror of
https://git.code.sf.net/p/openocd/code
synced 2024-11-25 05:16:24 +00:00
77287b8d47
ESP32 is a dual core Xtensa SoC Not full featured yet. Some of the missing functionality: -Semihosting -Flash breakpoints -Flash loader -Apptrace -FreeRTOS Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I76fb184aa38ab9f4e30290c038b5ff8850060750 Reviewed-on: https://review.openocd.org/c/openocd/+/6989 Tested-by: jenkins Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
23 lines
779 B
INI
23 lines
779 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
|
|
#
|
|
# Example OpenOCD configuration file for ESP32-WROVER-KIT board.
|
|
#
|
|
# For example, OpenOCD can be started for ESP32 debugging on
|
|
#
|
|
# openocd -f board/esp32-wrover-kit-3.3v.cfg
|
|
#
|
|
|
|
# Source the JTAG interface configuration file
|
|
source [find interface/ftdi/esp32_devkitj_v1.cfg]
|
|
set ESP32_FLASH_VOLTAGE 3.3
|
|
# Source the ESP32 configuration file
|
|
source [find target/esp32.cfg]
|
|
|
|
# The speed of the JTAG interface, in kHz. If you get DSR/DIR errors (and they
|
|
# do not relate to OpenOCD trying to read from a memory range without physical
|
|
# memory being present there), you can try lowering this.
|
|
#
|
|
# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
|
|
# if CPU frequency is 160MHz or 240MHz.
|
|
adapter speed 20000
|