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ramips: fix mt7620 pinmux for second SPI
The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part of the "spi refclk" group. The function "spi refclk" enables the second chip select. On reset, the pins of the "spi refclk" group are used as reference clock and GPIO. Signed-off-by: Mathias Kresin <dev@kresin.me> (cherry picked from commit 3601c3de23f15e2735adc4becdca14c803b6b1a5)
This commit is contained in:
committed by
Petr Štetiar
parent
b84f761d91
commit
3bbd16da46
target/linux/ramips/dts
@ -339,8 +339,8 @@
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spi_cs1: spi1 {
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spi1 {
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ralink,group = "spi_cs1";
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ralink,function = "spi_cs1";
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ralink,group = "spi refclk";
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ralink,function = "spi refclk";
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};
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};
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@ -260,8 +260,8 @@
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spi_cs1: spi1 {
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spi1 {
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ralink,group = "spi_cs1";
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ralink,function = "spi_cs1";
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ralink,group = "spi refclk";
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ralink,function = "spi refclk";
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};
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};
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