mirror of
https://github.com/rockchip-linux/rkbin.git
synced 2024-11-23 14:56:14 +00:00
6dab7052d0
update feature:
1. support loader parameter V5, vref modify for ddr2/3/4 and lpddr2/3
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I7477d8db0a0a0c26bc33ea4204350fa04c59578c
514 lines
9.9 KiB
Plaintext
514 lines
9.9 KiB
Plaintext
/* Please get help from ddrbin_tool_user_guide.txt and './ddrbin_tool -h' */
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start tag=0x12345678
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ddr2_freq=
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lp2_freq=
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ddr3_freq=
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lp3_freq=
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ddr4_freq=
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lp4_freq=
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lp4x_freq=
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lp5_freq=
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uart id=
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uart iomux=
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uart baudrate=
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sr_idle=
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pd_idle=
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first scan channel=
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channel mask=
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stride type=
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standby_idle=
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ext_temp_ref=
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link_ecc_en=
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per_bank_ref_en=
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derate_en=
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auto_precharge_en=
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res_space_remap_all=
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res_space_remap_portion=
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rd_vref_scan_en=
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wr_vref_scan_en=
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eye_2d_scan_en=
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dis_train_print=
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ssmod_downspread=
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ssmod_div=
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ssmod_spread=
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ddr_2t=
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pstore_base_addr=
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pstore_buf_size=
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uboot_log_en=
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atf_log_en=
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optee_log_en=
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spl_log_en=
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tpl_log_en=
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first_init_dram_type=
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dfs_disable=
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pageclose=
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boot_fsp=
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ddr2_f1_freq_mhz=
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ddr2_f2_freq_mhz=
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ddr2_f3_freq_mhz=
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ddr2_f4_freq_mhz=
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ddr2_f5_freq_mhz=
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phy_ddr2_dq_drv_when_odten_ohm=
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phy_ddr2_ca_drv_when_odten_ohm=
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phy_ddr2_clk_drv_when_odten_ohm=
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ddr2_dq_drv_when_odten_ohm=
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phy_ddr2_dq_drv_when_odtoff_ohm=
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phy_ddr2_ca_drv_when_odtoff_ohm=
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phy_ddr2_clk_drv_when_odtoff_ohm=
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ddr2_dq_drv_when_odtoff_ohm=
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phy_ddr2_odt_ohm=
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ddr2_odt_ohm=
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phy_ddr2_odt_pull_up_en=
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phy_ddr2_odt_pull_dn_en=
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phy_ddr2_odten_freq_mhz=
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ddr2_odten_freq_mhz=
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phy_ddr2_dq_sr_when_odten=
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phy_ddr2_ca_sr_when_odten=
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phy_ddr2_clk_sr_when_odten=
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phy_ddr2_dq_sr_when_odtoff=
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phy_ddr2_ca_sr_when_odtoff=
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phy_ddr2_clk_sr_when_odtoff=
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phy_ddr2_dq_vref_when_odten=
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ddr2_dq_vref_when_odten=
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ddr2_ca_vref_when_odten=
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phy_ddr2_dq_vref_when_odtoff=
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ddr2_dq_vref_when_odtoff=
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ddr2_ca_vref_when_odtoff=
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ddr3_f1_freq_mhz=
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ddr3_f2_freq_mhz=
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ddr3_f3_freq_mhz=
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ddr3_f4_freq_mhz=
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ddr3_f5_freq_mhz=
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phy_ddr3_dq_drv_when_odten_ohm=
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phy_ddr3_ca_drv_when_odten_ohm=
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phy_ddr3_clk_drv_when_odten_ohm=
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ddr3_dq_drv_when_odten_ohm=
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phy_ddr3_dq_drv_when_odtoff_ohm=
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phy_ddr3_ca_drv_when_odtoff_ohm=
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phy_ddr3_clk_drv_when_odtoff_ohm=
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ddr3_dq_drv_when_odtoff_ohm=
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phy_ddr3_odt_ohm=
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ddr3_odt_ohm=
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phy_ddr3_odt_pull_up_en=
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phy_ddr3_odt_pull_dn_en=
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phy_ddr3_odten_freq_mhz=
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ddr3_odten_freq_mhz=
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phy_ddr3_dq_sr_when_odten=
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phy_ddr3_ca_sr_when_odten=
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phy_ddr3_clk_sr_when_odten=
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phy_ddr3_dq_sr_when_odtoff=
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phy_ddr3_ca_sr_when_odtoff=
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phy_ddr3_clk_sr_when_odtoff=
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phy_ddr3_dq_vref_when_odten=
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ddr3_dq_vref_when_odten=
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ddr3_ca_vref_when_odten=
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phy_ddr3_dq_vref_when_odtoff=
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ddr3_dq_vref_when_odtoff=
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ddr3_ca_vref_when_odtoff=
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ddr4_f1_freq_mhz=
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ddr4_f2_freq_mhz=
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ddr4_f3_freq_mhz=
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ddr4_f4_freq_mhz=
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ddr4_f5_freq_mhz=
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phy_ddr4_dq_drv_when_odten_ohm=
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phy_ddr4_ca_drv_when_odten_ohm=
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phy_ddr4_clk_drv_when_odten_ohm=
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ddr4_dq_drv_when_odten_ohm=
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phy_ddr4_dq_drv_when_odtoff_ohm=
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phy_ddr4_ca_drv_when_odtoff_ohm=
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phy_ddr4_clk_drv_when_odtoff_ohm=
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ddr4_dq_drv_when_odtoff_ohm=
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phy_ddr4_odt_ohm=
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ddr4_odt_ohm=
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phy_ddr4_odt_pull_up_en=
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phy_ddr4_odt_pull_dn_en=
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phy_ddr4_odten_freq_mhz=
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ddr4_odten_freq_mhz=
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phy_ddr4_dq_sr_when_odten=
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phy_ddr4_ca_sr_when_odten=
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phy_ddr4_clk_sr_when_odten=
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phy_ddr4_dq_sr_when_odtoff=
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phy_ddr4_ca_sr_when_odtoff=
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phy_ddr4_clk_sr_when_odtoff=
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phy_ddr4_dq_vref_when_odten=
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ddr4_dq_vref_when_odten=
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ddr4_ca_vref_when_odten=
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phy_ddr4_dq_vref_when_odtoff=
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ddr4_dq_vref_when_odtoff=
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ddr4_ca_vref_when_odtoff=
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lp2_f1_freq_mhz=
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lp2_f2_freq_mhz=
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lp2_f3_freq_mhz=
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lp2_f4_freq_mhz=
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lp2_f5_freq_mhz=
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phy_lp2_dq_drv_when_odten_ohm=
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phy_lp2_ca_drv_when_odten_ohm=
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phy_lp2_clk_drv_when_odten_ohm=
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lp2_dq_drv_when_odten_ohm=
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phy_lp2_dq_drv_when_odtoff_ohm=
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phy_lp2_ca_drv_when_odtoff_ohm=
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phy_lp2_clk_drv_when_odtoff_ohm=
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lp2_dq_drv_when_odtoff_ohm=
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phy_lp2_odt_ohm=
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lp2_odt_ohm=
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phy_lp2_odt_pull_up_en=
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phy_lp2_odt_pull_dn_en=
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phy_lp2_odten_freq_mhz=
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lp2_odten_freq_mhz=
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phy_lp2_dq_sr_when_odten=
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phy_lp2_ca_sr_when_odten=
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phy_lp2_clk_sr_when_odten=
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phy_lp2_dq_sr_when_odtoff=
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phy_lp2_ca_sr_when_odtoff=
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phy_lp2_clk_sr_when_odtoff=
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phy_lp2_dq_vref_when_odten=
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lp2_dq_vref_when_odten=
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lp2_ca_vref_when_odten=
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phy_lp2_dq_vref_when_odtoff=
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lp2_dq_vref_when_odtoff=
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lp2_ca_vref_when_odtoff=
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lp3_f1_freq_mhz=
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lp3_f2_freq_mhz=
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lp3_f3_freq_mhz=
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lp3_f4_freq_mhz=
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lp3_f5_freq_mhz=
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phy_lp3_dq_drv_when_odten_ohm=
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phy_lp3_ca_drv_when_odten_ohm=
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phy_lp3_clk_drv_when_odten_ohm=
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lp3_dq_drv_when_odten_ohm=
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phy_lp3_dq_drv_when_odtoff_ohm=
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phy_lp3_ca_drv_when_odtoff_ohm=
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phy_lp3_clk_drv_when_odtoff_ohm=
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lp3_dq_drv_when_odtoff_ohm=
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phy_lp3_odt_ohm=
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lp3_odt_ohm=
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phy_lp3_odt_pull_up_en=
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phy_lp3_odt_pull_dn_en=
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phy_lp3_odten_freq_mhz=
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lp3_odten_freq_mhz=
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phy_lp3_dq_sr_when_odten=
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phy_lp3_ca_sr_when_odten=
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phy_lp3_clk_sr_when_odten=
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phy_lp3_dq_sr_when_odtoff=
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phy_lp3_ca_sr_when_odtoff=
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phy_lp3_clk_sr_when_odtoff=
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phy_lp3_dq_vref_when_odten=
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lp3_dq_vref_when_odten=
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lp3_ca_vref_when_odten=
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phy_lp3_dq_vref_when_odtoff=
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lp3_dq_vref_when_odtoff=
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lp3_ca_vref_when_odtoff=
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lp4_f1_freq_mhz=
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lp4_f2_freq_mhz=
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lp4_f3_freq_mhz=
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lp4_f4_freq_mhz=
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lp4_f5_freq_mhz=
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phy_lp4_dq_drv_when_odten_ohm=
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phy_lp4_ca_drv_when_odten_ohm=
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phy_lp4_clk_drv_when_odten_ohm=
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lp4_dq_drv_when_odten_ohm=
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phy_lp4_dq_drv_when_odtoff_ohm=
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phy_lp4_ca_drv_when_odtoff_ohm=
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phy_lp4_clk_drv_when_odtoff_ohm=
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lp4_dq_drv_when_odtoff_ohm=
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phy_lp4_odt_ohm=
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lp4_odt_ohm=
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lp4_ca_odt_ohm=
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lp4_drv_pu_cal_odten=
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lp4_drv_pu_cal_odtoff=
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phy_lp4_drv_pull_dn_en_odten=
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phy_lp4_drv_pull_dn_en_odtoff=
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phy_lp4_odten_freq_mhz=
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lp4_dq_odten_freq_mhz=
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phy_lp4_dq_sr_when_odten=
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phy_lp4_ca_sr_when_odten=
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phy_lp4_clk_sr_when_odten=
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phy_lp4_dq_sr_when_odtoff=
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phy_lp4_ca_sr_when_odtoff=
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phy_lp4_clk_sr_when_odtoff=
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lp4_ca_odten_freq_mhz=
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phy_lp4_cs_drv_odten=
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phy_lp4_cs_drv_odtoff=
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lp4_odte_ck=
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lp4_odte_cs_en=
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lp4_odtd_ca_en=
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phy_lp4_dq_vref_when_odten=
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lp4_dq_vref_when_odten=
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lp4_ca_vref_when_odten=
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phy_lp4_dq_vref_when_odtoff=
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lp4_dq_vref_when_odtoff=
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lp4_ca_vref_when_odtoff=
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ddr2_bytes_map=
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ddr3_bytes_map=
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ddr4_bytes_map=
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lp2_bytes_map=
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lp3_bytes_map=
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lp4_bytes_map=
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lp3_dq0_7_map=
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lp2_dq0_7_map=
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ddr4_cs0_dq0_dq15_map=
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ddr4_cs0_dq16_dq31_map=
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ddr4_cs1_dq0_dq15_map=
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ddr4_cs1_dq16_dq31_map=
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lp4x_f1_freq_mhz=
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lp4x_f2_freq_mhz=
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lp4x_f3_freq_mhz=
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lp4x_f4_freq_mhz=
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lp4x_f5_freq_mhz=
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phy_lp4x_dq_drv_when_odten_ohm=
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phy_lp4x_ca_drv_when_odten_ohm=
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phy_lp4x_clk_drv_when_odten_ohm=
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lp4x_dq_drv_when_odten_ohm=
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phy_lp4x_dq_drv_when_odtoff_ohm=
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phy_lp4x_ca_drv_when_odtoff_ohm=
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phy_lp4x_clk_drv_when_odtoff_ohm=
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lp4x_dq_drv_when_odtoff_ohm=
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phy_lp4x_odt_ohm=
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lp4x_odt_ohm=
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lp4x_ca_odt_ohm=
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lp4x_drv_pu_cal_odten=
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lp4x_drv_pu_cal_odtoff=
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phy_lp4x_drv_pull_dn_en_odten=
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phy_lp4x_drv_pull_dn_en_odtoff=
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phy_lp4x_odten_freq_mhz=
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lp4x_dq_odten_freq_mhz=
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phy_lp4x_dq_sr_when_odten=
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phy_lp4x_ca_sr_when_odten=
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phy_lp4x_clk_sr_when_odten=
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phy_lp4x_dq_sr_when_odtoff=
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phy_lp4x_ca_sr_when_odtoff=
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phy_lp4x_clk_sr_when_odtoff=
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lp4x_ca_odten_freq_mhz=
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phy_lp4x_cs_drv_odten=
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phy_lp4x_cs_drv_odtoff=
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lp4x_odte_ck=
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lp4x_odte_cs_en=
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lp4x_odtd_ca_en=
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phy_lp4x_dq_vref_when_odten=
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lp4x_dq_vref_when_odten=
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lp4x_ca_vref_when_odten=
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phy_lp4x_dq_vref_when_odtoff=
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lp4x_dq_vref_when_odtoff=
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lp4x_ca_vref_when_odtoff=
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lp5_f1_freq_mhz=
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lp5_f2_freq_mhz=
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lp5_f3_freq_mhz=
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lp5_f4_freq_mhz=
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lp5_f5_freq_mhz=
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phy_lp5_dq_drv_when_odten_ohm=
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phy_lp5_ca_drv_when_odten_ohm=
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phy_lp5_clk_drv_when_odten_ohm=
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lp5_dq_drv_when_odten_ohm=
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phy_lp5_dq_drv_when_odtoff_ohm=
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phy_lp5_ca_drv_when_odtoff_ohm=
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phy_lp5_clk_drv_when_odtoff_ohm=
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lp5_dq_drv_when_odtoff_ohm=
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phy_lp5_odt_ohm=
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lp5_odt_ohm=
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lp5_ca_odt_ohm=
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lp5_drv_pu_cal_odten=
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lp5_drv_pu_cal_odtoff=
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phy_lp5_drv_pull_dn_en_odten=
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phy_lp5_drv_pull_dn_en_odtoff=
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phy_lp5_odten_freq_mhz=
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lp5_dq_odten_freq_mhz=
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phy_lp5_dq_sr_when_odten=
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phy_lp5_ca_sr_when_odten=
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phy_lp5_clk_sr_when_odten=
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phy_lp5_dq_sr_when_odtoff=
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phy_lp5_ca_sr_when_odtoff=
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phy_lp5_clk_sr_when_odtoff=
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lp5_ca_odten_freq_mhz=
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lp5_wck_odt_en_freq=
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lp5_wck_odt=
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phy_lp5_cs_drv_odten=
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phy_lp5_cs_drv_odtoff=
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lp5_odte_ck=
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lp5_odte_cs_en=
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lp5_odtd_ca_en=
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lp5_nt_odt=
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phy_lp5_dq_vref_when_odten=
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lp5_dq_vref_when_odten=
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lp5_ca_vref_when_odten=
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phy_lp5_dq_vref_when_odtoff=
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lp5_dq_vref_when_odtoff=
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lp5_ca_vref_when_odtoff=
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ch_mask0=
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ch_mask1=
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bank_mask0=
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bank_mask1=
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bank_mask2=
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bank_mask3=
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rank_mask0=
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rank_mask1=
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ddr3_skew_freq_mhz=
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ddr3_ca0_skew=
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ddr3_ca1_skew=
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ddr3_ca2_skew=
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ddr3_ca3_skew=
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ddr3_ca4_skew=
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ddr3_ca5_skew=
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ddr3_ca6_skew=
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ddr3_ca7_skew=
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ddr3_ca8_skew=
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ddr3_ca9_skew=
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ddr3_ca10_skew=
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ddr3_ca11_skew=
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ddr3_ca12_skew=
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ddr3_ca13_skew=
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ddr3_ca14_skew=
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ddr3_ca15_skew=
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ddr3_ras_skew=
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ddr3_cas_skew=
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ddr3_ba0_skew=
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ddr3_ba1_skew=
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ddr3_ba2_skew=
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ddr3_we_skew=
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ddr3_cke0_skew=
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ddr3_cke1_skew=
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ddr3_ckn_skew=
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ddr3_ckp_skew=
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ddr3_odt0_skew=
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ddr3_odt1_skew=
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ddr3_cs0_skew=
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ddr3_cs1_skew=
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ddr3_resetn_skew=
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ddr4_skew_freq_mhz=
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ddr4_ca0_skew=
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ddr4_ca1_skew=
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ddr4_ca2_skew=
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ddr4_ca3_skew=
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ddr4_ca4_skew=
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ddr4_ca5_skew=
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|
ddr4_ca6_skew=
|
|
ddr4_ca7_skew=
|
|
ddr4_ca8_skew=
|
|
ddr4_ca9_skew=
|
|
ddr4_ca10_skew=
|
|
ddr4_ca11_skew=
|
|
ddr4_ca12_skew=
|
|
ddr4_ca13_skew=
|
|
ddr4_ca14_skew=
|
|
ddr4_ca15_skew=
|
|
ddr4_ca16_skew=
|
|
ddr4_ca17_skew=
|
|
ddr4_ba0_skew=
|
|
ddr4_ba1_skew=
|
|
ddr4_bg0_skew=
|
|
ddr4_bg1_skew=
|
|
ddr4_cke0_skew=
|
|
ddr4_cke1_skew=
|
|
ddr4_ckn_skew=
|
|
ddr4_ckp_skew=
|
|
ddr4_odt0_skew=
|
|
ddr4_odt1_skew=
|
|
ddr4_cs0_skew=
|
|
ddr4_cs1_skew=
|
|
ddr4_resetn_skew=
|
|
ddr4_actn_skew=
|
|
|
|
lp3_skew_freq_mhz=
|
|
lp3_ca0_skew=
|
|
lp3_ca1_skew=
|
|
lp3_ca2_skew=
|
|
lp3_ca3_skew=
|
|
lp3_ca4_skew=
|
|
lp3_ca5_skew=
|
|
lp3_ca6_skew=
|
|
lp3_ca7_skew=
|
|
lp3_ca8_skew=
|
|
lp3_ca9_skew=
|
|
lp3_cke0_skew=
|
|
lp3_cke1_skew=
|
|
lp3_ckn_skew=
|
|
lp3_ckp_skew=
|
|
lp3_odt0_skew=
|
|
lp3_odt1_skew=
|
|
lp3_odt2_skew=
|
|
lp3_odt3_skew=
|
|
lp3_cs0_skew=
|
|
lp3_cs1_skew=
|
|
lp3_cs2_skew=
|
|
lp3_cs3_skew=
|
|
|
|
lp4_skew_freq_mhz=
|
|
lp4_ca0_a_skew=
|
|
lp4_ca1_a_skew=
|
|
lp4_ca2_a_skew=
|
|
lp4_ca3_a_skew=
|
|
lp4_ca4_a_skew=
|
|
lp4_ca5_a_skew=
|
|
lp4_odt0_a_skew=
|
|
lp4_odt1_a_skew=
|
|
lp4_cke0_a_skew=
|
|
lp4_cke1_a_skew=
|
|
lp4_ckn_a_skew=
|
|
lp4_ckp_a_skew=
|
|
lp4_cs0_a_skew=
|
|
lp4_cs1_a_skew=
|
|
lp4_ca0_b_skew=
|
|
lp4_ca1_b_skew=
|
|
lp4_ca2_b_skew=
|
|
lp4_ca3_b_skew=
|
|
lp4_ca4_b_skew=
|
|
lp4_ca5_b_skew=
|
|
lp4_odt0_b_skew=
|
|
lp4_odt1_b_skew=
|
|
lp4_cke0_b_skew=
|
|
lp4_cke1_b_skew=
|
|
lp4_ckn_b_skew=
|
|
lp4_ckp_b_skew=
|
|
lp4_cs0_b_skew=
|
|
lp4_cs1_b_skew=
|
|
lp4_resetn_skew=
|
|
|
|
lp5_skew_freq_mhz=
|
|
lp5_ca0_a_skew=
|
|
lp5_ca1_a_skew=
|
|
lp5_ca2_a_skew=
|
|
lp5_ca3_a_skew=
|
|
lp5_ca4_a_skew=
|
|
lp5_ca5_a_skew=
|
|
lp5_ca6_a_skew=
|
|
lp5_ckn_a_skew=
|
|
lp5_ckp_a_skew=
|
|
lp5_cs0_a_skew=
|
|
lp5_cs1_a_skew=
|
|
lp5_ca0_b_skew=
|
|
lp5_ca1_b_skew=
|
|
lp5_ca2_b_skew=
|
|
lp5_ca3_b_skew=
|
|
lp5_ca4_b_skew=
|
|
lp5_ca5_b_skew=
|
|
lp5_ca6_b_skew=
|
|
lp5_ckn_b_skew=
|
|
lp5_ckp_b_skew=
|
|
lp5_cs0_b_skew=
|
|
lp5_cs1_b_skew=
|
|
lp5_resetn_skew=
|
|
|
|
end
|