mirror of
https://github.com/rockchip-linux/rkbin.git
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923cda8ffe
Build from ATF commit:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
update feature:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
02316fa91 OPTEE: Explicitly allow NS preemption for Yielding SMCs
80be9361b fix(ehf): restrict secure world FIQ routing model to SPM_MM
0b9727031 fix(bl31): allow use of EHF with S-EL2 SPMC
b6a7886d0 plat: rk3588: dmc: restore PHY OFFSET_DQ_CON0 during resume
e8673d54b plat: rk3588: add dvfs/periodic trn for resume code
0fa6615d0 plat: rk3588: Add support to reset vop sub mem pd when resume
9aa39b9ab plat: rk3588: support access_mem_os_reg
ba6ef224d rockchip: common: add ACCESS_MEM_OS_REG define
37e7e8941 plat: rk3588: sleep: fix GPIO_DBCLK_DIV_CON configuration flow
5fb78cd64 rockchip: uart: switch to loopback mode before checking busy status
02ff3b0da rockchip: uart: save uart register once
0f24f44c5 plat: rk3588: ddr_mcu: remove DDRPHY DLL lock_value_init_override toggle
5f3bb53fa plat: rk3588: use psci_aff_info_state to check cpu off
Change-Id: I8c5c672da05d3b903f0f68343b7a71e011689218
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
18 lines
234 B
INI
18 lines
234 B
INI
[VERSION]
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MAJOR=1
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MINOR=0
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[BL30_OPTION]
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SEC=0
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[BL31_OPTION]
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SEC=1
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PATH=bin/rk35/rk3588_bl31_v1.47.elf
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ADDR=0x00040000
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[BL32_OPTION]
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SEC=1
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PATH=bin/rk35/rk3588_bl32_v1.17.bin
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ADDR=0x08400000
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[BL33_OPTION]
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SEC=0
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[OUTPUT]
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PATH=trust.img
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