41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@siol.net>
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Date: Wed, 6 Jan 2021 19:25:23 +0100
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Subject: [PATCH] arm64: dts: allwinner: h5: Add deinterlace node
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Deinterlace core is completely compatible to H3.
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Add a node for it.
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Link: https://lore.kernel.org/r/20210106182523.1325796-1-jernej.skrabec@siol.net
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---
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arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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index 10489e508695..578a63dedf46 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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@@ -121,6 +121,19 @@ crypto: crypto@1c15000 {
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resets = <&ccu RST_BUS_CE>;
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};
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+ deinterlace: deinterlace@1e00000 {
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+ compatible = "allwinner,sun8i-h3-deinterlace";
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+ reg = <0x01e00000 0x20000>;
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+ clocks = <&ccu CLK_BUS_DEINTERLACE>,
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+ <&ccu CLK_DEINTERLACE>,
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+ <&ccu CLK_DRAM_DEINTERLACE>;
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+ clock-names = "bus", "mod", "ram";
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+ resets = <&ccu RST_BUS_DEINTERLACE>;
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+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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+ interconnects = <&mbus 9>;
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+ interconnect-names = "dma-mem";
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+ };
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+
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mali: gpu@1e80000 {
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compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
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reg = <0x01e80000 0x30000>;
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