41 lines
1.6 KiB
Diff
41 lines
1.6 KiB
Diff
From: megous@megous.com
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Date: Mon, 29 Jul 2019 01:39:42 +0200
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Subject: [U-Boot] [PATCH] Fix unreliable detection of DRAM size on Orange Pi 3
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From: Ondrej Jirman <megous@megous.com>
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Orange Pi 3 has 2 GiB of DRAM, that sometime get misdetected
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as 4 GiB, due to false negative result from mctl_mem_matches()
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when detecting number of column address bits. This leads to
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u-boot detecting more address bits than there are and the
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boot process hangs shortly after.
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In mctl_mem_matches() we need to wait for each write to finish,
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separately. Without this, the check is not reliable for some
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unknown reason, probably having to do with unpredictable memory
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access ordering.
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Patch was made with help from André Przywara, who noticed that
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my original idea about detection failing due to read-back from
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cache without involving DRAM was false, because data cache is
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still of at the time of the DRAM size autodetection.
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Signed-off-by: Ondrej Jirman <megous@megous.com>
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Cc: André Przywara <andre.przywara@arm.com>
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---
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arch/arm/mach-sunxi/dram_helpers.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
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index 239ab421a8..6dba448638 100644
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--- a/arch/arm/mach-sunxi/dram_helpers.c
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+++ b/arch/arm/mach-sunxi/dram_helpers.c
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@@ -30,6 +30,7 @@ bool mctl_mem_matches(u32 offset)
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{
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/* Try to write different values to RAM at two addresses */
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writel(0, CONFIG_SYS_SDRAM_BASE);
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+ dsb();
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writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset);
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dsb();
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/* Check if the same value is actually observed when reading back */
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