forked from libretro/Lakka-LibreELEC
374 lines
8.1 KiB
Diff
374 lines
8.1 KiB
Diff
From 65a3bafb3f5a8c83b678b59cb4b7bb87d12e7cd0 Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@gmail.com>
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Date: Tue, 7 Feb 2023 17:43:14 +0100
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Subject: [PATCH] sunxi: Add OrangePi 3 LTS board
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/sun50i-h6-orangepi-3-lts.dts | 313 ++++++++++++++++++++++
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configs/orangepi_3_lts_defconfig | 19 ++
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3 files changed, 333 insertions(+)
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create mode 100644 arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
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create mode 100644 configs/orangepi_3_lts_defconfig
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 965895bc2a3c..501400635fa9 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -702,6 +702,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
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dtb-$(CONFIG_MACH_SUN50I_H6) += \
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sun50i-h6-beelink-gs1.dtb \
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sun50i-h6-orangepi-3.dtb \
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+ sun50i-h6-orangepi-3-lts.dtb \
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sun50i-h6-orangepi-lite2.dtb \
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sun50i-h6-orangepi-one-plus.dtb \
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sun50i-h6-pine-h64.dtb \
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diff --git a/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts b/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
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new file mode 100644
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index 000000000000..6a5df1103a90
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--- /dev/null
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+++ b/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
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@@ -0,0 +1,313 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+// Copyright (C) 2023 Jernej Skrabec <jernej.skrabec@gmail.com>
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+// Based on sun50i-h6-orangepi-3.dts, which is:
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+// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
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+
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+/dts-v1/;
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+
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+#include "sun50i-h6.dtsi"
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+#include "sun50i-h6-cpu-opp.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ model = "OrangePi 3 LTS";
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+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
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+
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+ aliases {
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+ ethernet0 = &emac;
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ connector {
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+ compatible = "hdmi-connector";
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+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ ext_osc32k: ext_osc32k_clk {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <32768>;
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+ clock-output-names = "ext_osc32k";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led-0 {
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+ label = "orangepi:red:power";
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+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
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+ default-state = "on";
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+ };
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+
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+ led-1 {
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+ label = "orangepi:green:status";
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+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
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+ };
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+ };
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+
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+ reg_gmac_3v3: gmac-3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "gmac-3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <150000>;
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+ enable-active-high;
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+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
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+ };
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+
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+ reg_vcc5v: vcc5v {
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+ /* board wide 5V supply directly from the DC jack */
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc-5v";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <®_dcdca>;
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+};
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+
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+&de {
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+ status = "okay";
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+};
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+
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+&dwc3 {
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+ status = "okay";
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+};
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+
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+&ehci0 {
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+ status = "okay";
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+};
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+
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+&ehci3 {
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+ status = "okay";
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+};
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+
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ext_rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ phy-supply = <®_gmac_3v3>;
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+ allwinner,rx-delay-ps = <200>;
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+ allwinner,tx-delay-ps = <300>;
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <®_dcdcc>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ hvcc-supply = <®_bldo2>;
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+ status = "okay";
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&mdio {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+
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+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
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+ reset-assert-us = <15000>;
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+ reset-deassert-us = <40000>;
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+ };
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+};
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+
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+&mmc0 {
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+ vmmc-supply = <®_cldo1>;
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+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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+ bus-width = <4>;
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+ status = "okay";
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+};
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+
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+&mmc2 {
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+ vmmc-supply = <®_cldo1>;
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+ vqmmc-supply = <®_bldo2>;
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+ cap-mmc-hw-reset;
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+ non-removable;
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+ bus-width = <8>;
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+ status = "okay";
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+};
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+
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+&ohci0 {
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+ status = "okay";
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+};
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+
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+&ohci3 {
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+ status = "okay";
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+};
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+
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+&pio {
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+ vcc-pc-supply = <®_bldo2>;
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+ vcc-pd-supply = <®_cldo1>;
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+ vcc-pg-supply = <®_bldo3>;
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+};
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+
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+&r_ir {
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+ status = "okay";
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+};
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+
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+&r_i2c {
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+ status = "okay";
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+
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+ axp805: pmic@36 {
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+ compatible = "x-powers,axp805", "x-powers,axp806";
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+ reg = <0x36>;
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+ interrupt-parent = <&r_intc>;
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ x-powers,self-working-mode;
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+ vina-supply = <®_vcc5v>;
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+ vinb-supply = <®_vcc5v>;
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+ vinc-supply = <®_vcc5v>;
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+ vind-supply = <®_vcc5v>;
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+ vine-supply = <®_vcc5v>;
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+ aldoin-supply = <®_vcc5v>;
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+ bldoin-supply = <®_vcc5v>;
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+ cldoin-supply = <®_vcc5v>;
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+
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+ regulators {
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+ reg_aldo1: aldo1 {
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc-pl-led-ir";
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+ };
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+
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+ reg_aldo2: aldo2 {
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc33-audio-tv-ephy-mac";
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+ };
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+
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+ /* ALDO3 is shorted to CLDO1 */
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+ reg_aldo3: aldo3 {
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
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+ };
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+
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+ reg_bldo1: bldo1 {
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+ regulator-always-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-name = "vcc18-dram-bias-pll";
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+ };
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+
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+ reg_bldo2: bldo2 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-name = "vcc-efuse-pcie-hdmi-pc";
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+ };
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+
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+ reg_bldo3: bldo3 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-name = "vcc-pm-pg-dcxoio-wifi";
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+ };
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+
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+ bldo4 {
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+ /* unused */
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+ };
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+
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+ reg_cldo1: cldo1 {
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
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+ };
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+
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+ cldo2 {
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+ /* unused */
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+ };
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+
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+ cldo3 {
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+ /* unused */
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+ };
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+
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+ reg_dcdca: dcdca {
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+ regulator-always-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1160000>;
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+ regulator-ramp-delay = <2500>;
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+ regulator-name = "vdd-cpu";
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+ };
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+
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+ reg_dcdcc: dcdcc {
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+ regulator-enable-ramp-delay = <32000>;
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+ regulator-min-microvolt = <810000>;
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+ regulator-max-microvolt = <1080000>;
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+ regulator-ramp-delay = <2500>;
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+ regulator-name = "vdd-gpu";
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+ };
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+
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+ reg_dcdcd: dcdcd {
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+ regulator-always-on;
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+ regulator-min-microvolt = <960000>;
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+ regulator-max-microvolt = <960000>;
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+ regulator-name = "vdd-sys";
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+ };
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+
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+ reg_dcdce: dcdce {
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+ regulator-always-on;
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+ regulator-min-microvolt = <1200000>;
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+ regulator-max-microvolt = <1200000>;
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+ regulator-name = "vcc-dram";
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+ };
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+
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+ sw {
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+ /* unused */
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+ };
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+ };
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+ };
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+};
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+
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+&rtc {
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+ clocks = <&ext_osc32k>;
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ph_pins>;
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+ status = "okay";
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+};
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+
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+&usb2otg {
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+ dr_mode = "host";
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+ status = "okay";
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+};
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+
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+&usb2phy {
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+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
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+ usb0_vbus-supply = <®_vcc5v>;
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+ usb3_vbus-supply = <®_vcc5v>;
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+ status = "okay";
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+};
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+
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+&usb3phy {
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+ status = "okay";
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+};
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diff --git a/configs/orangepi_3_lts_defconfig b/configs/orangepi_3_lts_defconfig
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new file mode 100644
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index 000000000000..41a9af4ef67a
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--- /dev/null
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+++ b/configs/orangepi_3_lts_defconfig
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@@ -0,0 +1,19 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_SUNXI=y
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+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3-lts"
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+CONFIG_SPL=y
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+CONFIG_MACH_SUN50I_H6=y
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+CONFIG_SUNXI_DRAM_H6_LPDDR3=y
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+CONFIG_MMC0_CD_PIN="PF6"
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+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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+CONFIG_SPL_STACK=0x118000
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+CONFIG_SYS_PBSIZE=1024
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+CONFIG_SYS_BOOTM_LEN=0x2000000
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+CONFIG_PHY_SUN50I_USB3=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_DWC3=y
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+# CONFIG_USB_DWC3_GADGET is not set
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--
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2.39.1
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