tplink-xx530v_v1/sdk/en7529/linux-4.4.115/qdma_dev.s

	.arch armv7-a
	.fpu softvfp
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 1
	.eabi_attribute 18, 4
	.file	"qdma_dev.c"
#APP
	.macro	it, cond
	.endm
	.macro	itt, cond
	.endm
	.macro	ite, cond
	.endm
	.macro	ittt, cond
	.endm
	.macro	itte, cond
	.endm
	.macro	itet, cond
	.endm
	.macro	itee, cond
	.endm
	.macro	itttt, cond
	.endm
	.macro	ittte, cond
	.endm
	.macro	ittet, cond
	.endm
	.macro	ittee, cond
	.endm
	.macro	itett, cond
	.endm
	.macro	itete, cond
	.endm
	.macro	iteet, cond
	.endm
	.macro	iteee, cond
	.endm

	.section	.rodata
	.align	1
	.type	eth_reserved_addr_base, %object
	.size	eth_reserved_addr_base, 6
eth_reserved_addr_base:
	.byte	1
	.byte	-128
	.byte	-62
	.byte	0
	.byte	0
	.byte	0
	.global	dma_busy_timer
	.bss
	.align	2
	.type	dma_busy_timer, %object
	.size	dma_busy_timer, 28
dma_busy_timer:
	.space	28
	.global	dma_busy_expires
	.data
	.align	2
	.type	dma_busy_expires, %object
	.size	dma_busy_expires, 4
dma_busy_expires:
	.word	10
	.global	dma_busy_round_cnt
	.bss
	.align	2
	.type	dma_busy_round_cnt, %object
	.size	dma_busy_round_cnt, 4
dma_busy_round_cnt:
	.space	4
	.global	tx_dma_busy_enable_cnt
	.align	2
	.type	tx_dma_busy_enable_cnt, %object
	.size	tx_dma_busy_enable_cnt, 4
tx_dma_busy_enable_cnt:
	.space	4
	.global	rx_dma_busy_enable_cnt
	.align	2
	.type	rx_dma_busy_enable_cnt, %object
	.size	rx_dma_busy_enable_cnt, 4
rx_dma_busy_enable_cnt:
	.space	4
	.global	trigger_timer
	.align	2
	.type	trigger_timer, %object
	.size	trigger_timer, 28
trigger_timer:
	.space	28
	.global	trigger_expires
	.data
	.align	2
	.type	trigger_expires, %object
	.size	trigger_expires, 4
trigger_expires:
	.word	1
	.global	trigger_timer_going
	.bss
	.align	2
	.type	trigger_timer_going, %object
	.size	trigger_timer_going, 4
trigger_timer_going:
	.space	4
	.global	reg_polling_timer
	.align	2
	.type	reg_polling_timer, %object
	.size	reg_polling_timer, 28
reg_polling_timer:
	.space	28
	.global	reg_polling_expires
	.data
	.align	2
	.type	reg_polling_expires, %object
	.size	reg_polling_expires, 4
reg_polling_expires:
	.word	10
	.global	reg_polling_round_cnt
	.bss
	.align	2
	.type	reg_polling_round_cnt, %object
	.size	reg_polling_round_cnt, 4
reg_polling_round_cnt:
	.space	4
	.global	reg_polling_offset
	.align	2
	.type	reg_polling_offset, %object
	.size	reg_polling_offset, 4
reg_polling_offset:
	.space	4
	.global	qdmaRegValBuff
	.align	2
	.type	qdmaRegValBuff, %object
	.size	qdmaRegValBuff, 400
qdmaRegValBuff:
	.space	400
	.global	channel_limit_threshold
	.align	2
	.type	channel_limit_threshold, %object
	.size	channel_limit_threshold, 4
channel_limit_threshold:
	.space	4
	.global	queue_limit_threshold
	.align	2
	.type	queue_limit_threshold, %object
	.size	queue_limit_threshold, 4
queue_limit_threshold:
	.space	4
	.global	gpQdmaDev
	.align	2
	.type	gpQdmaDev, %object
	.size	gpQdmaDev, 4
gpQdmaDev:
	.space	4
	.global	qdma_vip_num
	.type	qdma_vip_num, %object
	.size	qdma_vip_num, 1
qdma_vip_num:
	.space	1
	.global	qdma_vip_info
	.align	2
	.type	qdma_vip_info, %object
	.size	qdma_vip_info, 192
qdma_vip_info:
	.space	192
	.global	trtcmCfgBase
	.align	2
	.type	trtcmCfgBase, %object
	.size	trtcmCfgBase, 16
trtcmCfgBase:
	.space	16
	.global	trtcmBucketByteUnit
	.align	2
	.type	trtcmBucketByteUnit, %object
	.size	trtcmBucketByteUnit, 16
trtcmBucketByteUnit:
	.space	16
	.global	trtcmBucketPacketUnit
	.align	2
	.type	trtcmBucketPacketUnit, %object
	.size	trtcmBucketPacketUnit, 16
trtcmBucketPacketUnit:
	.space	16
	.global	TXQ_DIS_CFG_VALUE
	.align	2
	.type	TXQ_DIS_CFG_VALUE, %object
	.size	TXQ_DIS_CFG_VALUE, 32
TXQ_DIS_CFG_VALUE:
	.space	32
	.global	MULTICAST_FORCE_PORT
	.data
	.align	2
	.type	MULTICAST_FORCE_PORT, %object
	.size	MULTICAST_FORCE_PORT, 64
MULTICAST_FORCE_PORT:
	.word	32
	.word	33
	.word	34
	.word	35
	.word	36
	.word	37
	.word	0
	.word	128
	.word	96
	.word	97
	.word	98
	.word	99
	.word	100
	.word	101
	.word	102
	.word	192
	.global	MULTICAST_SPECIAL_TAG
	.align	2
	.type	MULTICAST_SPECIAL_TAG, %object
	.size	MULTICAST_SPECIAL_TAG, 64
MULTICAST_SPECIAL_TAG:
	.word	1
	.word	2
	.word	4
	.word	8
	.word	16
	.word	32
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.global	MULTICAST_KEEP_SPTAG_HIFIELD
	.align	2
	.type	MULTICAST_KEEP_SPTAG_HIFIELD, %object
	.size	MULTICAST_KEEP_SPTAG_HIFIELD, 64
MULTICAST_KEEP_SPTAG_HIFIELD:
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.global	priPktChkLen
	.align	2
	.type	priPktChkLen, %object
	.size	priPktChkLen, 4
priPktChkLen:
	.word	150
	.section	.rodata
	.align	2
	.type	__param_str_priPktChkLen, %object
	.size	__param_str_priPktChkLen, 13
__param_str_priPktChkLen:
	.ascii	"priPktChkLen\000"
	.section	__param,"a",%progbits
	.align	2
	.type	__param_priPktChkLen, %object
	.size	__param_priPktChkLen, 20
__param_priPktChkLen:
	.word	__param_str_priPktChkLen
	.word	__this_module
	.word	param_ops_int
	.short	0
	.byte	-1
	.byte	0
	.word	priPktChkLen
	.section	.modinfo,"a",%progbits
	.type	__UNIQUE_ID_priPktChkLentype0, %object
	.size	__UNIQUE_ID_priPktChkLentype0, 26
__UNIQUE_ID_priPktChkLentype0:
	.ascii	"parmtype=priPktChkLen:int\000"
	.global	priPktChk
	.data
	.align	2
	.type	priPktChk, %object
	.size	priPktChk, 4
priPktChk:
	.word	1
	.section	.rodata
	.align	2
	.type	__param_str_priPktChk, %object
	.size	__param_str_priPktChk, 10
__param_str_priPktChk:
	.ascii	"priPktChk\000"
	.section	__param
	.align	2
	.type	__param_priPktChk, %object
	.size	__param_priPktChk, 20
__param_priPktChk:
	.word	__param_str_priPktChk
	.word	__this_module
	.word	param_ops_int
	.short	0
	.byte	-1
	.byte	0
	.word	priPktChk
	.section	.modinfo
	.type	__UNIQUE_ID_priPktChktype1, %object
	.size	__UNIQUE_ID_priPktChktype1, 23
__UNIQUE_ID_priPktChktype1:
	.ascii	"parmtype=priPktChk:int\000"
	.text
	.align	2
	.type	set_timer_expires, %function
set_timer_expires:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	str	r0, [sp, #4]
	str	r1, [sp]
	ldr	r2, [sp]
	ldr	r3, [sp, #4]
	str	r2, [r3, #16]
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	set_timer_expires, .-set_timer_expires
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC2:
	.ascii	"%s: %s [%d]: Timeout for setting WRR configuration,"
	.ascii	" channel:%d, queue:%d.\012\000"
	.align	2
.LC3:
	.ascii	"qdma_lan\000"
	.align	2
.LC4:
	.ascii	"/home/work/XX530vUS1/sdk/en7529/modules/private/qdm"
	.ascii	"a/EN7516/qdma_dev.c\000"
	.text
	.align	2
	.global	qdmaSetTxQosScheduler
	.type	qdmaSetTxQosScheduler, %function
qdmaSetTxQosScheduler:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	mov	r3, r0
	str	r2, [sp, #8]
	strb	r3, [sp, #15]
	mov	r3, r1
	strb	r3, [sp, #14]
	mov	r3, #0
	str	r3, [sp, #44]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #40]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #44]
	b	.L3
.L11:
	ldr	r3, [sp, #44]
	mov	r3, r3, asl #1
	ldr	r2, [sp, #8]
	add	r3, r2, r3
	ldrh	r3, [r3]
	orr	r2, r3, #-2147483648
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	mov	r3, r3, asl #19
	and	r3, r3, #16252928
	orr	r2, r2, r3
	ldr	r3, [sp, #44]
	mov	r3, r3, asl #16
	and	r3, r3, #458752
	orr	r3, r2, r3
	str	r3, [sp, #36]
	ldr	r3, [sp, #40]
	add	r3, r3, #4096
	add	r3, r3, #36
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	set_frame_engine_data
	ldr	r3, [sp, #40]
	add	r3, r3, #4096
	add	r3, r3, #36
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L4
.L6:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L5
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L4:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L6
.L5:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L7
	mvn	r3, #61
	b	.L8
.L7:
	mov	r3, #0
.L8:
	cmp	r3, #0
	bge	.L9
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r3, [sp, #44]
	str	r3, [sp, #4]
	movw	r0, #:lower16:.LC2
	movt	r0, #:upper16:.LC2
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L12
	movw	r3, #259
	bl	printk
	mvn	r3, #61
	b	.L10
.L9:
	ldr	r3, [sp, #44]
	add	r3, r3, #1
	str	r3, [sp, #44]
.L3:
	ldr	r3, [sp, #44]
	cmp	r3, #7
	ble	.L11
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	mov	r3, r3, lsr #3
	uxtb	r3, r3
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #40]
	add	r3, r2, r3
	add	r3, r3, #4160
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #32]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	mov	r3, r3, lsr #3
	uxtb	r3, r3
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #40]
	add	r3, r2, r3
	add	ip, r3, #4160
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	and	r3, r3, #7
	mov	r3, r3, asl #2
	mov	r2, #7
	mov	r3, r2, asl r3
	mvn	r3, r3
	mov	r2, r3
	ldr	r3, [sp, #32]
	and	r3, r3, r2
	ldrb	r1, [sp, #14]	@ zero_extendqisi2
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	and	r2, r2, #7
	mov	r2, r2, asl #2
	mov	r1, r1, asl r2
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	and	r2, r2, #7
	mov	r2, r2, asl #2
	mov	r0, #7
	mov	r2, r0, asl r2
	and	r2, r2, r1
	orr	r3, r3, r2
	mov	r0, ip
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L10:
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
.L13:
	.align	2
.L12:
	.word	.LC4+60
	.fnend
	.size	qdmaSetTxQosScheduler, .-qdmaSetTxQosScheduler
	.section	.rodata.str1.4
	.align	2
.LC5:
	.ascii	"%s: %s [%d]: Timeout for getting WRR configuration,"
	.ascii	" channel:%d, queue:%d.\012\000"
	.text
	.align	2
	.global	qdmaGetTxQosScheduler
	.type	qdmaGetTxQosScheduler, %function
qdmaGetTxQosScheduler:
	.fnstart
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	mov	r3, r0
	str	r1, [sp, #16]
	str	r2, [sp, #12]
	strb	r3, [sp, #23]
	mov	r3, #0
	str	r3, [sp, #52]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #48]
	mov	r3, #0
	str	r3, [sp, #44]
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	mov	r3, r3, lsr #3
	uxtb	r3, r3
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #48]
	add	r3, r2, r3
	add	r3, r3, #4160
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r1, r0
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	and	r3, r3, #7
	mov	r3, r3, asl #2
	mov	r2, #7
	mov	r3, r2, asl r3
	and	r2, r1, r3
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	and	r3, r3, #7
	mov	r3, r3, asl #2
	mov	r3, r2, asr r3
	uxtb	r2, r3
	ldr	r3, [sp, #16]
	strb	r2, [r3]
	mov	r3, #0
	str	r3, [sp, #52]
	b	.L15
.L23:
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	mov	r3, r3, asl #19
	and	r2, r3, #16252928
	ldr	r3, [sp, #52]
	mov	r3, r3, asl #16
	and	r3, r3, #458752
	orr	r3, r2, r3
	str	r3, [sp, #44]
	ldr	r3, [sp, #48]
	add	r3, r3, #4096
	add	r3, r3, #36
	mov	r0, r3
	ldr	r1, [sp, #44]
	bl	set_frame_engine_data
	ldr	r3, [sp, #48]
	add	r3, r3, #4096
	add	r3, r3, #36
	str	r3, [sp, #40]
	mov	r3, #1073741824
	str	r3, [sp, #36]
	mov	r3, #3
	str	r3, [sp, #32]
	mov	r3, #0
	str	r3, [sp, #28]
	b	.L16
.L18:
	ldr	r0, [sp, #40]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #28]
	ldr	r2, [sp, #28]
	ldr	r3, [sp, #36]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L17
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L16:
	ldr	r3, [sp, #32]
	sub	r2, r3, #1
	str	r2, [sp, #32]
	cmp	r3, #0
	bne	.L18
.L17:
	ldr	r3, [sp, #32]
	cmp	r3, #0
	bge	.L19
	mvn	r3, #61
	b	.L20
.L19:
	mov	r3, #0
.L20:
	cmp	r3, #0
	bge	.L21
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r3, [sp, #52]
	str	r3, [sp, #4]
	movw	r0, #:lower16:.LC5
	movt	r0, #:upper16:.LC5
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L24
	mov	r3, #288
	bl	printk
	mvn	r3, #61
	b	.L22
.L21:
	ldr	r3, [sp, #48]
	add	r3, r3, #4096
	add	r3, r3, #36
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #44]
	ldr	r3, [sp, #52]
	mov	r3, r3, asl #1
	ldr	r2, [sp, #12]
	add	r3, r2, r3
	ldr	r2, [sp, #44]
	uxth	r2, r2
	strh	r2, [r3]	@ movhi
	ldr	r3, [sp, #52]
	add	r3, r3, #1
	str	r3, [sp, #52]
.L15:
	ldr	r3, [sp, #52]
	cmp	r3, #7
	ble	.L23
	mov	r3, #0
.L22:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
.L25:
	.align	2
.L24:
	.word	.LC4+60
	.fnend
	.size	qdmaGetTxQosScheduler, .-qdmaGetTxQosScheduler
	.align	2
	.global	biSearchGetBucketSizeShift
	.type	biSearchGetBucketSizeShift, %function
biSearchGetBucketSizeShift:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, #0
	str	r3, [sp, #20]
	ldr	r2, [sp, #8]
	ldr	r3, [sp, #4]
	cmp	r2, r3
	bls	.L27
	mvn	r3, #21
	b	.L28
.L27:
	ldr	r3, [sp, #12]
	cmp	r3, #0
	beq	.L29
	ldr	r2, [sp, #12]
	ldr	r3, [sp]
	cmp	r2, r3
	bcs	.L29
	mov	r3, #0
	b	.L28
.L29:
	ldr	r2, [sp, #8]
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	mov	r3, r3, lsr #1
	str	r3, [sp, #20]
	ldr	r2, [sp]
	ldr	r3, [sp, #20]
	mov	r2, r2, asl r3
	ldr	r3, [sp, #12]
	cmp	r2, r3
	bne	.L30
	ldr	r3, [sp, #20]
	b	.L28
.L30:
	ldr	r3, [sp, #8]
	ldr	r2, [sp]
	mov	r2, r2, asl r3
	ldr	r3, [sp, #12]
	cmp	r2, r3
	bne	.L31
	ldr	r3, [sp, #8]
	b	.L28
.L31:
	ldr	r3, [sp, #4]
	ldr	r2, [sp]
	mov	r2, r2, asl r3
	ldr	r3, [sp, #12]
	cmp	r2, r3
	bne	.L32
	ldr	r3, [sp, #4]
	b	.L28
.L32:
	ldr	r2, [sp]
	ldr	r3, [sp, #20]
	mov	r2, r2, asl r3
	ldr	r3, [sp, #12]
	cmp	r2, r3
	bls	.L33
	ldr	r2, [sp, #20]
	ldr	r3, [sp, #8]
	rsb	r3, r3, r2
	cmp	r3, #1
	bhi	.L34
	ldr	r3, [sp, #20]
	b	.L28
.L34:
	ldr	r3, [sp, #20]
	ldr	r0, [sp, #12]
	ldr	r1, [sp, #8]
	mov	r2, r3
	ldr	r3, [sp]
	bl	biSearchGetBucketSizeShift
	mov	r3, r0
	b	.L28
.L33:
	ldr	r3, [sp, #20]
	ldr	r2, [sp, #4]
	rsb	r3, r3, r2
	cmp	r3, #1
	bhi	.L35
	ldr	r3, [sp, #4]
	b	.L28
.L35:
	ldr	r3, [sp, #20]
	ldr	r0, [sp, #12]
	mov	r1, r3
	ldr	r2, [sp, #4]
	ldr	r3, [sp]
	bl	biSearchGetBucketSizeShift
	mov	r3, r0
.L28:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	biSearchGetBucketSizeShift, .-biSearchGetBucketSizeShift
	.align	2
	.global	generalSetTrtcmRateEnable
	.type	generalSetTrtcmRateEnable, %function
generalSetTrtcmRateEnable:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	str	r3, [sp, #20]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L37
	mvn	r3, #21
	b	.L38
.L37:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #20]
	ldr	r3, [sp]
	cmp	r3, #1
	bne	.L39
	ldr	r0, [sp, #20]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r3, [sp, #12]
	orr	r3, r3, #-2147483648
	ldr	r0, [sp, #20]
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L40
.L39:
	ldr	r3, [sp]
	cmp	r3, #0
	bne	.L41
	ldr	r0, [sp, #20]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r3, [sp, #16]
	bic	r3, r3, #-2147483648
	ldr	r0, [sp, #20]
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L40
.L41:
	mvn	r3, #21
	b	.L38
.L40:
	mov	r3, #0
.L38:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmRateEnable, .-generalSetTrtcmRateEnable
	.align	2
	.global	generalGetTrtcmRateEnable
	.type	generalGetTrtcmRateEnable, %function
generalGetTrtcmRateEnable:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L43
	mvn	r3, #21
	b	.L44
.L43:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r3, r3, asr #31
.L44:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmRateEnable, .-generalGetTrtcmRateEnable
	.align	2
	.global	generalSetTrtcmMode
	.type	generalSetTrtcmMode, %function
generalSetTrtcmMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L46
	mvn	r3, #21
	b	.L47
.L46:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldr	r3, [sp]
	cmp	r3, #1
	bls	.L48
	mvn	r3, #21
	b	.L47
.L48:
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	ldr	r3, [sp, #8]
	bic	r2, r3, #1073741824
	ldr	r3, [sp]
	mov	r3, r3, asl #30
	and	r3, r3, #1073741824
	orr	r3, r2, r3
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L47:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmMode, .-generalSetTrtcmMode
	.align	2
	.global	generalGetTrtcmMode
	.type	generalGetTrtcmMode, %function
generalGetTrtcmMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L50
	mvn	r3, #21
	b	.L51
.L50:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #1073741824
	mov	r3, r3, asr #30
.L51:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmMode, .-generalGetTrtcmMode
	.section	.rodata.str1.4
	.align	2
.LC6:
	.ascii	"Trtcm Fast Tick value should between 1 and 0xFFFF.\012"
	.ascii	"\000"
	.text
	.align	2
	.global	generalSetTrtcmFastTick
	.type	generalSetTrtcmFastTick, %function
generalSetTrtcmFastTick:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, r1
	strh	r3, [sp, #2]	@ movhi
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L53
	mvn	r3, #21
	b	.L54
.L53:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldrh	r3, [sp, #2]
	cmp	r3, #0
	bne	.L55
	movw	r0, #:lower16:.LC6
	movt	r0, #:upper16:.LC6
	bl	printk
	mvn	r3, #21
	b	.L54
.L55:
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	ldr	r3, [sp, #8]
	mov	r3, r3, lsr #16
	mov	r3, r3, asl #16
	ldrh	r2, [sp, #2]
	orr	r3, r3, r2
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L54:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmFastTick, .-generalSetTrtcmFastTick
	.align	2
	.global	generalGetTrtcmFastTick
	.type	generalGetTrtcmFastTick, %function
generalGetTrtcmFastTick:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L57
	mvn	r3, #21
	b	.L58
.L57:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r3, r0
	uxth	r3, r3
.L58:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmFastTick, .-generalGetTrtcmFastTick
	.section	.rodata.str1.4
	.align	2
.LC7:
	.ascii	"Trtcm slow tick ratio value should between 1 and 0x"
	.ascii	"3FFF.\012\000"
	.text
	.align	2
	.global	generalSetTrtcmSlowTickRatio
	.type	generalSetTrtcmSlowTickRatio, %function
generalSetTrtcmSlowTickRatio:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, r1
	strh	r3, [sp, #2]	@ movhi
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L60
	mvn	r3, #21
	b	.L61
.L60:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldrh	r3, [sp, #2]
	cmp	r3, #0
	beq	.L62
	ldrh	r3, [sp, #2]
	cmp	r3, #16384
	bcc	.L63
.L62:
	movw	r0, #:lower16:.LC7
	movt	r0, #:upper16:.LC7
	bl	printk
	mvn	r3, #21
	b	.L61
.L63:
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	ldr	r3, [sp, #8]
	bic	r2, r3, #1069547520
	bic	r2, r2, #4128768
	ldrh	r3, [sp, #2]
	mov	r3, r3, asl #16
	mov	r1, r3
	mov	r3, #0
	movt	r3, 16383
	and	r3, r3, r1
	orr	r3, r2, r3
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L61:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmSlowTickRatio, .-generalSetTrtcmSlowTickRatio
	.align	2
	.global	generalGetTrtcmSlowTickRatio
	.type	generalGetTrtcmSlowTickRatio, %function
generalGetTrtcmSlowTickRatio:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #3
	bls	.L65
	mvn	r3, #21
	b	.L66
.L65:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #4]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #12]
	ldr	r0, [sp, #12]
	bl	get_frame_engine_data
	mov	r2, r0
	mov	r3, #0
	movt	r3, 16383
	and	r3, r3, r2
	mov	r3, r3, asr #16
.L66:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmSlowTickRatio, .-generalGetTrtcmSlowTickRatio
	.section	.rodata.str1.4
	.align	2
.LC8:
	.ascii	"slow Tick should be larger than fastTick.\012\000"
	.global	__aeabi_uidiv
	.text
	.align	2
	.global	generalSetTrtcmSlowTick
	.type	generalSetTrtcmSlowTick, %function
generalSetTrtcmSlowTick:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	strh	r3, [sp, #14]	@ movhi
	mov	r3, #0
	strh	r3, [sp, #12]	@ movhi
	ldr	r0, [sp, #4]
	bl	generalGetTrtcmFastTick
	mov	r3, r0
	strh	r3, [sp, #14]	@ movhi
	ldrh	r2, [sp, #14]
	ldr	r3, [sp]
	cmp	r2, r3
	bls	.L68
	movw	r0, #:lower16:.LC8
	movt	r0, #:upper16:.LC8
	bl	printk
	mvn	r3, #21
	b	.L69
.L68:
	ldrh	r3, [sp, #14]
	ldr	r0, [sp]
	mov	r1, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	strh	r3, [sp, #12]	@ movhi
	ldrh	r3, [sp, #12]
	ldr	r0, [sp, #4]
	mov	r1, r3
	bl	generalSetTrtcmSlowTickRatio
	mov	r3, r0
.L69:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmSlowTick, .-generalSetTrtcmSlowTick
	.align	2
	.global	generalGetTrtcmSlowTick
	.type	generalGetTrtcmSlowTick, %function
generalGetTrtcmSlowTick:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, #0
	strh	r3, [sp, #14]	@ movhi
	mov	r3, #0
	strh	r3, [sp, #12]	@ movhi
	mov	r3, #0
	str	r3, [sp, #8]
	ldr	r0, [sp, #4]
	bl	generalGetTrtcmFastTick
	mov	r3, r0
	strh	r3, [sp, #14]	@ movhi
	ldr	r0, [sp, #4]
	bl	generalGetTrtcmSlowTickRatio
	mov	r3, r0
	strh	r3, [sp, #12]	@ movhi
	ldrh	r3, [sp, #14]
	ldrh	r2, [sp, #12]
	mul	r3, r2, r3
	str	r3, [sp, #8]
	ldr	r3, [sp, #8]
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmSlowTick, .-generalGetTrtcmSlowTick
	.section	.rodata.str1.4
	.align	2
.LC9:
	.ascii	"Trtcm TickSel Index should be 0 or 1.\012\000"
	.text
	.align	2
	.global	generalGetTrtcmTick
	.type	generalGetTrtcmTick, %function
generalGetTrtcmTick:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #12
	sub	sp, sp, #12
	str	r0, [sp, #4]
	str	r1, [sp]
	ldr	r3, [sp]
	cmp	r3, #1
	bls	.L73
	movw	r0, #:lower16:.LC9
	movt	r0, #:upper16:.LC9
	bl	printk
	mvn	r3, #21
	b	.L74
.L73:
	ldr	r3, [sp]
	cmp	r3, #0
	bne	.L75
	ldr	r0, [sp, #4]
	bl	generalGetTrtcmFastTick
	mov	r3, r0
	b	.L74
.L75:
	ldr	r0, [sp, #4]
	bl	generalGetTrtcmSlowTick
	mov	r3, r0
.L74:
	mov	r0, r3
	add	sp, sp, #12
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmTick, .-generalGetTrtcmTick
	.section	.rodata.str1.4
	.align	2
.LC10:
	.ascii	"Timeout for set TRTCM configuration.\012\000"
	.text
	.align	2
	.global	generalSetRatelimitParaConfig
	.type	generalSetRatelimitParaConfig, %function
generalSetRatelimitParaConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r3, [sp]
	mov	r3, r2
	strb	r3, [sp, #7]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldr	r3, [sp, #12]
	cmp	r3, #3
	bls	.L77
	mvn	r3, #21
	b	.L78
.L77:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #32]
	ldr	r3, [sp, #32]
	add	r3, r3, #8
	mov	r0, r3
	ldr	r1, [sp]
	bl	set_frame_engine_data
	ldr	r3, [sp, #8]
	mov	r3, r3, asl #28
	and	r2, r3, #805306368
	ldrb	r3, [sp, #7]	@ zero_extendqisi2
	mov	r3, r3, asl #16
	and	r3, r3, #8323072
	orr	r3, r2, r3
	orr	r3, r3, #-2147483648
	str	r3, [sp, #36]
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	set_frame_engine_data
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L79
.L81:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L80
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L79:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L81
.L80:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L82
	mvn	r3, #61
	b	.L83
.L82:
	mov	r3, #0
.L83:
	cmp	r3, #0
	beq	.L84
	movw	r0, #:lower16:.LC10
	movt	r0, #:upper16:.LC10
	bl	printk
	mvn	r3, #61
	b	.L78
.L84:
	mov	r3, #0
.L78:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetRatelimitParaConfig, .-generalSetRatelimitParaConfig
	.section	.rodata.str1.4
	.align	2
.LC11:
	.ascii	"Timeout for Get TRTCM configuration.\012\000"
	.text
	.align	2
	.global	generalGetRatelimitParaConfig
	.type	generalGetRatelimitParaConfig, %function
generalGetRatelimitParaConfig:
	.fnstart
	@ args = 4, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r3, [sp]
	mov	r3, r2
	strb	r3, [sp, #7]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldr	r3, [sp, #12]
	cmp	r3, #3
	bls	.L86
	mvn	r3, #21
	b	.L87
.L86:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #32]
	ldr	r3, [sp, #8]
	mov	r3, r3, asl #28
	and	r2, r3, #805306368
	ldrb	r3, [sp, #7]	@ zero_extendqisi2
	mov	r3, r3, asl #16
	and	r3, r3, #8323072
	orr	r3, r2, r3
	str	r3, [sp, #36]
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	set_frame_engine_data
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L88
.L90:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L89
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L88:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L90
.L89:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L91
	mvn	r3, #61
	b	.L92
.L91:
	mov	r3, #0
.L92:
	cmp	r3, #0
	beq	.L93
	movw	r0, #:lower16:.LC11
	movt	r0, #:upper16:.LC11
	bl	printk
	mvn	r3, #61
	b	.L87
.L93:
	ldr	r3, [sp, #32]
	add	r3, r3, #8
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [sp]
	str	r2, [r3]
	ldr	r3, [sp, #32]
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [sp, #48]
	str	r2, [r3]
	mov	r3, #0
.L87:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitParaConfig, .-generalGetRatelimitParaConfig
	.section	.rodata.str1.4
	.align	2
.LC12:
	.ascii	"Trtcm Meter Mode should be 0 or 1.\012\000"
	.align	2
.LC13:
	.ascii	"Get TRTCM Para Config Failed.\012\000"
	.align	2
.LC14:
	.ascii	"Set TRTCM Para Config : Ratelimit Meter Enable Fail"
	.ascii	"ed.\012\000"
	.text
	.align	2
	.global	generalSetRatelimitMeterMode
	.type	generalSetRatelimitMeterMode, %function
generalSetRatelimitMeterMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bls	.L95
	movw	r0, #:lower16:.LC12
	movt	r0, #:upper16:.LC12
	bl	printk
	mvn	r3, #21
	b	.L101
.L95:
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	add	ip, sp, #28
	add	r3, sp, #24
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #0
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L97
	movw	r0, #:lower16:.LC13
	movt	r0, #:upper16:.LC13
	bl	printk
	mvn	r3, #13
	b	.L101
.L97:
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bne	.L98
	ldr	r3, [sp, #28]
	orr	r3, r3, #4
	b	.L99
.L98:
	ldr	r3, [sp, #28]
	bic	r3, r3, #4
.L99:
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, #0
	bl	generalSetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L100
	movw	r0, #:lower16:.LC14
	movt	r0, #:upper16:.LC14
	bl	printk
	mvn	r3, #13
	b	.L101
.L100:
	mov	r3, #0
.L101:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetRatelimitMeterMode, .-generalSetRatelimitMeterMode
	.align	2
	.global	generalGetRatelimitMeterMode
	.type	generalGetRatelimitMeterMode, %function
generalGetRatelimitMeterMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	mov	r3, r1
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	ldrb	r2, [sp, #11]	@ zero_extendqisi2
	add	ip, sp, #20
	add	r3, sp, #16
	str	r3, [sp]
	ldr	r0, [sp, #12]
	mov	r1, #0
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	ldr	r3, [sp, #20]
	and	r3, r3, #4
	mov	r3, r3, lsr #2
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitMeterMode, .-generalGetRatelimitMeterMode
	.section	.rodata.str1.4
	.align	2
.LC15:
	.ascii	"Trtcm Packet Mode should be 0 or 1.\012\000"
	.align	2
.LC16:
	.ascii	"Set TRTCM Para Config : Ratelimit Packet Enable Fai"
	.ascii	"led.\012\000"
	.text
	.align	2
	.global	generalSetRatelimitPktMode
	.type	generalSetRatelimitPktMode, %function
generalSetRatelimitPktMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bls	.L105
	movw	r0, #:lower16:.LC15
	movt	r0, #:upper16:.LC15
	bl	printk
	mvn	r3, #21
	b	.L111
.L105:
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	add	ip, sp, #28
	add	r3, sp, #24
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #0
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L107
	movw	r0, #:lower16:.LC13
	movt	r0, #:upper16:.LC13
	bl	printk
	mvn	r3, #13
	b	.L111
.L107:
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bne	.L108
	ldr	r3, [sp, #28]
	orr	r3, r3, #2
	b	.L109
.L108:
	ldr	r3, [sp, #28]
	bic	r3, r3, #2
.L109:
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, #0
	bl	generalSetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L110
	movw	r0, #:lower16:.LC16
	movt	r0, #:upper16:.LC16
	bl	printk
	mvn	r3, #13
	b	.L111
.L110:
	mov	r3, #0
.L111:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetRatelimitPktMode, .-generalSetRatelimitPktMode
	.align	2
	.global	generalGetRatelimitPktMode
	.type	generalGetRatelimitPktMode, %function
generalGetRatelimitPktMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	mov	r3, r1
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	ldrb	r2, [sp, #11]	@ zero_extendqisi2
	add	ip, sp, #20
	add	r3, sp, #16
	str	r3, [sp]
	ldr	r0, [sp, #12]
	mov	r1, #0
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	ldr	r3, [sp, #20]
	and	r3, r3, #2
	mov	r3, r3, lsr #1
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitPktMode, .-generalGetRatelimitPktMode
	.section	.rodata.str1.4
	.align	2
.LC17:
	.ascii	"Set TRTCM Para Config : Ratelimit Tick Sel Failed.\012"
	.ascii	"\000"
	.text
	.align	2
	.global	generalSetRatelimitTickSel
	.type	generalSetRatelimitTickSel, %function
generalSetRatelimitTickSel:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bls	.L115
	movw	r0, #:lower16:.LC9
	movt	r0, #:upper16:.LC9
	bl	printk
	mvn	r3, #21
	b	.L121
.L115:
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	add	ip, sp, #28
	add	r3, sp, #24
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #0
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L117
	movw	r0, #:lower16:.LC13
	movt	r0, #:upper16:.LC13
	bl	printk
	mvn	r3, #13
	b	.L121
.L117:
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bne	.L118
	ldr	r3, [sp, #28]
	orr	r3, r3, #1
	b	.L119
.L118:
	ldr	r3, [sp, #28]
	bic	r3, r3, #1
.L119:
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, #0
	bl	generalSetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L120
	movw	r0, #:lower16:.LC17
	movt	r0, #:upper16:.LC17
	bl	printk
	mvn	r3, #13
	b	.L121
.L120:
	mov	r3, #0
.L121:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetRatelimitTickSel, .-generalSetRatelimitTickSel
	.align	2
	.global	generalGetRatelimitTickSel
	.type	generalGetRatelimitTickSel, %function
generalGetRatelimitTickSel:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	mov	r3, r1
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	ldrb	r2, [sp, #11]	@ zero_extendqisi2
	add	ip, sp, #20
	add	r3, sp, #16
	str	r3, [sp]
	ldr	r0, [sp, #12]
	mov	r1, #0
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	ldr	r3, [sp, #20]
	and	r3, r3, #1
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitTickSel, .-generalGetRatelimitTickSel
	.align	2
	.global	generalGetBucketSizeByRate
	.type	generalGetBucketSizeByRate, %function
generalGetBucketSizeByRate:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #16
	sub	sp, sp, #16
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	cmp	r3, #16384
	bcs	.L125
	mov	r3, #4
	str	r3, [sp, #12]
	b	.L126
.L125:
	mov	r3, #5
	str	r3, [sp, #12]
.L126:
	ldr	r2, [sp, #4]
	ldr	r3, [sp, #12]
	mov	r3, r2, asl r3
	mov	r0, r3
	add	sp, sp, #16
	@ sp needed
	bx	lr
	.fnend
	.size	generalGetBucketSizeByRate, .-generalGetBucketSizeByRate
	.section	.rodata.str1.4
	.align	2
.LC18:
	.ascii	"tick = 0 , set error.\012\000"
	.global	__aeabi_idiv
	.align	2
.LC19:
	.ascii	"rateLimitUnit = 0 , set error.\012\000"
	.global	__aeabi_uidivmod
	.align	2
.LC20:
	.ascii	"tokenRate overflow.\012\000"
	.align	2
.LC21:
	.ascii	"Set TRTCM Token Rate Failed.\012\000"
	.align	2
.LC22:
	.ascii	"set QDMA rx ratelinit,meter index = %d,PBS tokenRat"
	.ascii	"e_int = %d,tokenRate_frac = %d\012\000"
	.align	2
.LC23:
	.ascii	"set QDMA rx ratelinit,meter index = %d,CBS tokenRat"
	.ascii	"e_int = %d,tokenRate_frac = %d\012\000"
	.text
	.align	2
	.global	generalSetRatelimitTokenRate
	.type	generalSetRatelimitTokenRate, %function
generalSetRatelimitTokenRate:
	.fnstart
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #68
	sub	sp, sp, #68
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #60]
	mov	r3, #0
	str	r3, [sp, #48]
	mov	r3, #0
	str	r3, [sp, #44]
	mov	r3, #0
	strh	r3, [sp, #42]	@ movhi
	mov	r3, #0
	str	r3, [sp, #56]
	mov	r3, #0
	strh	r3, [sp, #54]	@ movhi
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, r3
	bl	generalGetRatelimitTickSel
	mov	r3, r0
	cmp	r3, #0
	bne	.L129
	ldr	r0, [sp, #20]
	bl	generalGetTrtcmFastTick
	str	r0, [sp, #56]
	b	.L130
.L129:
	ldr	r0, [sp, #20]
	bl	generalGetTrtcmSlowTick
	mov	r3, r0
	str	r3, [sp, #56]
.L130:
	ldr	r3, [sp, #56]
	cmp	r3, #0
	bne	.L131
	movw	r0, #:lower16:.LC18
	movt	r0, #:upper16:.LC18
	bl	printk
	mvn	r3, #21
	b	.L132
.L131:
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, r3
	bl	generalGetRatelimitPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L133
	mov	r0, #8000
	ldr	r1, [sp, #56]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #54]	@ movhi
	b	.L134
.L133:
	movw	r0, #16960
	movt	r0, 15
	ldr	r1, [sp, #56]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #54]	@ movhi
.L134:
	ldrh	r3, [sp, #54]
	cmp	r3, #0
	bne	.L135
	movw	r0, #:lower16:.LC19
	movt	r0, #:upper16:.LC19
	bl	printk
	mvn	r3, #21
	b	.L132
.L135:
	ldrh	r3, [sp, #54]
	ldr	r0, [sp, #16]
	mov	r1, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	str	r3, [sp, #44]
	ldrh	r3, [sp, #54]
	ldr	r2, [sp, #16]
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_uidivmod
	mov	r3, r1
	mov	r2, r3, asl #6
	ldrh	r3, [sp, #54]
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	strh	r3, [sp, #42]	@ movhi
	ldr	r3, [sp, #44]
	cmp	r3, #262144
	bcs	.L136
	ldrh	r3, [sp, #42]
	cmp	r3, #63
	bls	.L137
.L136:
	movw	r0, #:lower16:.LC20
	movt	r0, #:upper16:.LC20
	bl	printk
	mvn	r3, #21
	b	.L132
.L137:
	ldr	r3, [sp, #44]
	mov	r2, r3, asl #6
	ldrh	r3, [sp, #42]
	orr	r3, r2, r3
	str	r3, [sp, #48]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, #1
	mov	r2, r3
	ldr	r3, [sp, #48]
	bl	generalSetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L138
	movw	r0, #:lower16:.LC21
	movt	r0, #:upper16:.LC21
	bl	printk
	mvn	r3, #13
	b	.L132
.L138:
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #1
	mov	r2, #1
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #28]
	bic	r3, r3, #-16777216
	bic	r3, r3, #63
	mov	r3, r3, lsr #6
	str	r3, [sp, #36]
	ldr	r3, [sp, #28]
	and	r3, r3, #63
	str	r3, [sp, #32]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	movw	r0, #:lower16:.LC22
	movt	r0, #:upper16:.LC22
	mov	r1, r3
	ldr	r2, [sp, #36]
	ldr	r3, [sp, #32]
	bl	printk
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #1
	mov	r2, #0
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #28]
	bic	r3, r3, #-16777216
	bic	r3, r3, #63
	mov	r3, r3, lsr #6
	str	r3, [sp, #36]
	ldr	r3, [sp, #28]
	and	r3, r3, #63
	str	r3, [sp, #32]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	movw	r0, #:lower16:.LC23
	movt	r0, #:upper16:.LC23
	mov	r1, r3
	ldr	r2, [sp, #36]
	ldr	r3, [sp, #32]
	bl	printk
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	cmp	r3, #7
	bne	.L139
	bl	dump_stack
.L139:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bne	.L140
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	mov	r1, r3
	bl	generalGetRatelimitPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [sp, #16]
	bl	generalGetBucketSizeByRate
	str	r0, [sp, #60]
	b	.L142
.L141:
	ldr	r3, [sp, #16]
	str	r3, [sp, #60]
.L142:
	ldr	r3, [sp, #60]
	cmp	r3, #16777216
	ble	.L144
	mov	r3, #16777216
	str	r3, [sp, #60]
	b	.L144
.L140:
	ldr	r3, [sp, #44]
	add	r3, r3, #1
	str	r3, [sp, #60]
	ldr	r3, [sp, #60]
	cmp	r3, #4096
	bge	.L144
	mov	r3, #4096
	str	r3, [sp, #60]
.L144:
	ldr	r3, [sp, #60]
.L132:
	mov	r0, r3
	add	sp, sp, #68
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetRatelimitTokenRate, .-generalSetRatelimitTokenRate
	.section	.rodata.str1.4
	.align	2
.LC24:
	.ascii	"tick = 0 , get error.\012\000"
	.align	2
.LC25:
	.ascii	"rateLimitUnit = 0 , get error.\012\000"
	.text
	.align	2
	.global	generalGetRatelimitTokenRate
	.type	generalGetRatelimitTokenRate, %function
generalGetRatelimitTokenRate:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	mov	r3, r1
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	strh	r3, [sp, #34]	@ movhi
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	generalGetRatelimitTickSel
	mov	r3, r0
	cmp	r3, #0
	bne	.L146
	ldr	r0, [sp, #12]
	bl	generalGetTrtcmFastTick
	str	r0, [sp, #36]
	b	.L147
.L146:
	ldr	r0, [sp, #12]
	bl	generalGetTrtcmSlowTick
	mov	r3, r0
	str	r3, [sp, #36]
.L147:
	ldr	r3, [sp, #36]
	cmp	r3, #0
	bne	.L148
	movw	r0, #:lower16:.LC24
	movt	r0, #:upper16:.LC24
	bl	printk
	mvn	r3, #21
	b	.L153
.L148:
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	generalGetRatelimitPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L150
	mov	r0, #8000
	ldr	r1, [sp, #36]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #34]	@ movhi
	b	.L151
.L150:
	movw	r0, #16960
	movt	r0, 15
	ldr	r1, [sp, #36]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #34]	@ movhi
.L151:
	ldrh	r3, [sp, #34]
	cmp	r3, #0
	bne	.L152
	movw	r0, #:lower16:.LC25
	movt	r0, #:upper16:.LC25
	bl	printk
	mvn	r3, #21
	b	.L153
.L152:
	ldrb	r2, [sp, #11]	@ zero_extendqisi2
	add	ip, sp, #20
	add	r3, sp, #16
	str	r3, [sp]
	ldr	r0, [sp, #12]
	mov	r1, #1
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	ldr	r3, [sp, #20]
	bic	r3, r3, #-16777216
	bic	r3, r3, #63
	mov	r3, r3, lsr #6
	str	r3, [sp, #28]
	ldr	r3, [sp, #20]
	and	r3, r3, #63
	str	r3, [sp, #24]
	ldrh	r3, [sp, #34]
	ldr	r2, [sp, #28]
	mul	r2, r2, r3
	ldrh	r3, [sp, #34]
	ldr	r1, [sp, #24]
	mul	r3, r1, r3
	mov	r3, r3, lsr #6
	add	r3, r2, r3
.L153:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitTokenRate, .-generalGetRatelimitTokenRate
	.section	.rodata.str1.4
	.align	2
.LC26:
	.ascii	"Set TRTCM Bucket Size Failed.\012\000"
	.text
	.align	2
	.global	generalSetRatelimitBucketSize
	.type	generalSetRatelimitBucketSize, %function
generalSetRatelimitBucketSize:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	mov	r3, r2
	strb	r3, [sp, #7]
	mov	r3, #0
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #20]
	ldr	r3, [sp, #8]
	cmp	r3, #134217728
	bls	.L155
	mvn	r3, #21
	b	.L156
.L155:
	ldrb	r3, [sp, #7]	@ zero_extendqisi2
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	generalGetRatelimitPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L157
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #20]
	b	.L158
.L157:
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #20]
.L158:
	ldr	r0, [sp, #8]
	mov	r1, #0
	mov	r2, #17
	ldr	r3, [sp, #20]
	bl	biSearchGetBucketSizeShift
	str	r0, [sp, #16]
	ldr	r3, [sp, #16]
	ldrb	r2, [sp, #7]	@ zero_extendqisi2
	ldr	r0, [sp, #12]
	mov	r1, #2
	bl	generalSetRatelimitParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L159
	movw	r0, #:lower16:.LC26
	movt	r0, #:upper16:.LC26
	bl	printk
	mvn	r3, #13
	b	.L156
.L159:
	mov	r3, #0
.L156:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetRatelimitBucketSize, .-generalSetRatelimitBucketSize
	.align	2
	.global	generalGetRatelimitBucketSize
	.type	generalGetRatelimitBucketSize, %function
generalGetRatelimitBucketSize:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	mov	r3, r1
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	strb	r3, [sp, #35]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #36]
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #12]
	mov	r1, r3
	bl	generalGetRatelimitPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L161
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #36]
	b	.L162
.L161:
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #36]
.L162:
	ldrb	r2, [sp, #11]	@ zero_extendqisi2
	add	ip, sp, #24
	add	r3, sp, #20
	str	r3, [sp]
	ldr	r0, [sp, #12]
	mov	r1, #2
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	ldr	r3, [sp, #24]
	uxtb	r3, r3
	and	r3, r3, #31
	strb	r3, [sp, #35]
	ldrb	r3, [sp, #35]	@ zero_extendqisi2
	ldr	r2, [sp, #36]
	mov	r3, r2, asl r3
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitBucketSize, .-generalGetRatelimitBucketSize
	.align	2
	.global	generalGetRatelimitBucketCntr
	.type	generalGetRatelimitBucketCntr, %function
generalGetRatelimitBucketCntr:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	mov	r3, r1
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	mov	r3, #0
	strb	r3, [sp, #31]
	mov	r3, #0
	strh	r3, [sp, #28]	@ movhi
	ldrb	r2, [sp, #11]	@ zero_extendqisi2
	add	ip, sp, #24
	add	r3, sp, #20
	str	r3, [sp]
	ldr	r0, [sp, #12]
	mov	r1, #3
	mov	r3, ip
	bl	generalGetRatelimitParaConfig
	ldr	r3, [sp, #24]
	uxtb	r3, r3
	and	r3, r3, #63
	strb	r3, [sp, #31]
	ldr	r3, [sp, #24]
	mov	r2, r3, lsr #6
	ldr	r3, [sp, #20]
	and	r3, r3, #7
	mov	r3, r3, asl #26
	orr	r3, r2, r3
	str	r3, [sp, #32]
	ldr	r3, [sp, #20]
	and	r3, r3, #8
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	uxtb	r3, r3
	strh	r3, [sp, #28]	@ movhi
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetRatelimitBucketCntr, .-generalGetRatelimitBucketCntr
	.align	2
	.global	generalSetTrtcmParaConfig
	.type	generalSetTrtcmParaConfig, %function
generalSetTrtcmParaConfig:
	.fnstart
	@ args = 4, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	strb	r3, [sp, #3]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldr	r3, [sp, #12]
	cmp	r3, #2
	bls	.L167
	mvn	r3, #21
	b	.L168
.L167:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #32]
	ldr	r3, [sp, #32]
	add	r3, r3, #8
	mov	r0, r3
	ldr	r1, [sp, #48]
	bl	set_frame_engine_data
	ldr	r3, [sp, #8]
	mov	r3, r3, asl #28
	and	r2, r3, #805306368
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r3, r3, #8257536
	orr	r2, r2, r3
	ldr	r3, [sp, #4]
	mov	r3, r3, asl #16
	and	r3, r3, #65536
	orr	r3, r2, r3
	orr	r3, r3, #-2147483648
	str	r3, [sp, #36]
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	set_frame_engine_data
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L169
.L171:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L170
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L169:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L171
.L170:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L172
	mvn	r3, #61
	b	.L173
.L172:
	mov	r3, #0
.L173:
	cmp	r3, #0
	beq	.L174
	movw	r0, #:lower16:.LC10
	movt	r0, #:upper16:.LC10
	bl	printk
	mvn	r3, #61
	b	.L168
.L174:
	mov	r3, #0
.L168:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmParaConfig, .-generalSetTrtcmParaConfig
	.align	2
	.global	generalGetTrtcmParaConfig
	.type	generalGetTrtcmParaConfig, %function
generalGetTrtcmParaConfig:
	.fnstart
	@ args = 8, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	strb	r3, [sp, #3]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldr	r3, [sp, #12]
	cmp	r3, #2
	bls	.L176
	mvn	r3, #21
	b	.L177
.L176:
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	ldr	r2, [sp, #12]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #32]
	ldr	r3, [sp, #8]
	mov	r3, r3, asl #28
	and	r2, r3, #805306368
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r3, r3, #8257536
	orr	r2, r2, r3
	ldr	r3, [sp, #4]
	mov	r3, r3, asl #16
	and	r3, r3, #65536
	orr	r3, r2, r3
	str	r3, [sp, #36]
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	set_frame_engine_data
	ldr	r3, [sp, #32]
	add	r3, r3, #4
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L178
.L180:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L179
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L178:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L180
.L179:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L181
	mvn	r3, #61
	b	.L182
.L181:
	mov	r3, #0
.L182:
	cmp	r3, #0
	beq	.L183
	movw	r0, #:lower16:.LC11
	movt	r0, #:upper16:.LC11
	bl	printk
	mvn	r3, #61
	b	.L177
.L183:
	ldr	r3, [sp, #32]
	add	r3, r3, #8
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [sp, #48]
	str	r2, [r3]
	ldr	r3, [sp, #32]
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [sp, #52]
	str	r2, [r3]
	mov	r3, #0
.L177:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmParaConfig, .-generalGetTrtcmParaConfig
	.section	.rodata.str1.4
	.align	2
.LC27:
	.ascii	"PIR\000"
	.align	2
.LC28:
	.ascii	"CIR\000"
	.align	2
.LC29:
	.ascii	"Set TRTCM Para Config : %s Meter Enable Failed.\012"
	.ascii	"\000"
	.text
	.align	2
	.global	generalSetTrtcmMeterMode
	.type	generalSetTrtcmMeterMode, %function
generalSetTrtcmMeterMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	str	r2, [sp, #12]
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bls	.L185
	movw	r0, #:lower16:.LC12
	movt	r0, #:upper16:.LC12
	bl	printk
	mvn	r3, #21
	b	.L193
.L185:
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L187
	movw	r0, #:lower16:.LC13
	movt	r0, #:upper16:.LC13
	bl	printk
	mvn	r3, #13
	b	.L193
.L187:
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bne	.L188
	ldr	r3, [sp, #28]
	orr	r3, r3, #4
	b	.L189
.L188:
	ldr	r3, [sp, #28]
	bic	r3, r3, #4
.L189:
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalSetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L190
	ldr	r3, [sp, #12]
	cmp	r3, #0
	beq	.L191
	movw	r3, #:lower16:.LC27
	movt	r3, #:upper16:.LC27
	b	.L192
.L191:
	movw	r3, #:lower16:.LC28
	movt	r3, #:upper16:.LC28
.L192:
	movw	r0, #:lower16:.LC29
	movt	r0, #:upper16:.LC29
	mov	r1, r3
	bl	printk
	mvn	r3, #13
	b	.L193
.L190:
	mov	r3, #0
.L193:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmMeterMode, .-generalSetTrtcmMeterMode
	.align	2
	.global	generalGetTrtcmMeterMode
	.type	generalGetTrtcmMeterMode, %function
generalGetTrtcmMeterMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #16]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #28]
	and	r3, r3, #4
	mov	r3, r3, lsr #2
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmMeterMode, .-generalGetTrtcmMeterMode
	.section	.rodata.str1.4
	.align	2
.LC30:
	.ascii	"Set TRTCM Para Config : %s Packet Enable Failed.\012"
	.ascii	"\000"
	.text
	.align	2
	.global	generalSetTrtcmPktMode
	.type	generalSetTrtcmPktMode, %function
generalSetTrtcmPktMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	str	r2, [sp, #12]
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bls	.L197
	movw	r0, #:lower16:.LC15
	movt	r0, #:upper16:.LC15
	bl	printk
	mvn	r3, #21
	b	.L205
.L197:
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L199
	movw	r0, #:lower16:.LC13
	movt	r0, #:upper16:.LC13
	bl	printk
	mvn	r3, #13
	b	.L205
.L199:
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bne	.L200
	ldr	r3, [sp, #28]
	orr	r3, r3, #2
	b	.L201
.L200:
	ldr	r3, [sp, #28]
	bic	r3, r3, #2
.L201:
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalSetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L202
	ldr	r3, [sp, #12]
	cmp	r3, #0
	beq	.L203
	movw	r3, #:lower16:.LC27
	movt	r3, #:upper16:.LC27
	b	.L204
.L203:
	movw	r3, #:lower16:.LC28
	movt	r3, #:upper16:.LC28
.L204:
	movw	r0, #:lower16:.LC30
	movt	r0, #:upper16:.LC30
	mov	r1, r3
	bl	printk
	mvn	r3, #13
	b	.L205
.L202:
	mov	r3, #0
.L205:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmPktMode, .-generalSetTrtcmPktMode
	.align	2
	.global	generalGetTrtcmPktMode
	.type	generalGetTrtcmPktMode, %function
generalGetTrtcmPktMode:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #16]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #28]
	and	r3, r3, #2
	mov	r3, r3, lsr #1
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmPktMode, .-generalGetTrtcmPktMode
	.section	.rodata.str1.4
	.align	2
.LC31:
	.ascii	"Set TRTCM Para Config : %s Tick Sel Failed.\012\000"
	.text
	.align	2
	.global	generalSetTrtcmTickSel
	.type	generalSetTrtcmTickSel, %function
generalSetTrtcmTickSel:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	str	r2, [sp, #12]
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bls	.L209
	movw	r0, #:lower16:.LC9
	movt	r0, #:upper16:.LC9
	bl	printk
	mvn	r3, #21
	b	.L217
.L209:
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L211
	movw	r0, #:lower16:.LC13
	movt	r0, #:upper16:.LC13
	bl	printk
	mvn	r3, #13
	b	.L217
.L211:
	ldr	r3, [sp, #16]
	cmp	r3, #1
	bne	.L212
	ldr	r3, [sp, #28]
	orr	r3, r3, #1
	b	.L213
.L212:
	ldr	r3, [sp, #28]
	bic	r3, r3, #1
.L213:
	str	r3, [sp, #28]
	ldr	r3, [sp, #28]
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalSetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L214
	ldr	r3, [sp, #12]
	cmp	r3, #0
	beq	.L215
	movw	r3, #:lower16:.LC27
	movt	r3, #:upper16:.LC27
	b	.L216
.L215:
	movw	r3, #:lower16:.LC28
	movt	r3, #:upper16:.LC28
.L216:
	movw	r0, #:lower16:.LC31
	movt	r0, #:upper16:.LC31
	mov	r1, r3
	bl	printk
	mvn	r3, #13
	b	.L217
.L214:
	mov	r3, #0
.L217:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmTickSel, .-generalSetTrtcmTickSel
	.align	2
	.global	generalGetTrtcmTickSel
	.type	generalGetTrtcmTickSel, %function
generalGetTrtcmTickSel:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #0
	ldr	r2, [sp, #16]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #28]
	and	r3, r3, #1
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmTickSel, .-generalGetTrtcmTickSel
	.align	2
	.global	generalSetTrtcmTokenRate
	.type	generalSetTrtcmTokenRate, %function
generalSetTrtcmTokenRate:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	str	r2, [sp, #12]
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #44]
	mov	r3, #0
	str	r3, [sp, #32]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	strh	r3, [sp, #26]	@ movhi
	mov	r3, #0
	str	r3, [sp, #40]
	mov	r3, #0
	strh	r3, [sp, #38]	@ movhi
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #12]
	mov	r2, r3
	bl	generalGetTrtcmTickSel
	mov	r3, r0
	cmp	r3, #0
	bne	.L221
	ldr	r0, [sp, #20]
	bl	generalGetTrtcmFastTick
	str	r0, [sp, #40]
	b	.L222
.L221:
	ldr	r0, [sp, #20]
	bl	generalGetTrtcmSlowTick
	mov	r3, r0
	str	r3, [sp, #40]
.L222:
	ldr	r3, [sp, #40]
	cmp	r3, #0
	bne	.L223
	movw	r0, #:lower16:.LC18
	movt	r0, #:upper16:.LC18
	bl	printk
	mvn	r3, #21
	b	.L224
.L223:
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #12]
	mov	r2, r3
	bl	generalGetTrtcmPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	mov	r0, #8000
	ldr	r1, [sp, #40]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #38]	@ movhi
	b	.L226
.L225:
	movw	r0, #16960
	movt	r0, 15
	ldr	r1, [sp, #40]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #38]	@ movhi
.L226:
	ldrh	r3, [sp, #38]
	cmp	r3, #0
	bne	.L227
	movw	r0, #:lower16:.LC19
	movt	r0, #:upper16:.LC19
	bl	printk
	mvn	r3, #21
	b	.L224
.L227:
	ldrh	r3, [sp, #38]
	ldr	r0, [sp, #16]
	mov	r1, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	str	r3, [sp, #28]
	ldrh	r3, [sp, #38]
	ldr	r2, [sp, #16]
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_uidivmod
	mov	r3, r1
	mov	r2, r3, asl #6
	ldrh	r3, [sp, #38]
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	strh	r3, [sp, #26]	@ movhi
	ldr	r3, [sp, #28]
	cmp	r3, #262144
	bcs	.L228
	ldrh	r3, [sp, #26]
	cmp	r3, #63
	bls	.L229
.L228:
	movw	r0, #:lower16:.LC20
	movt	r0, #:upper16:.LC20
	bl	printk
	mvn	r3, #21
	b	.L224
.L229:
	ldr	r3, [sp, #28]
	mov	r2, r3, asl #6
	ldrh	r3, [sp, #26]
	orr	r3, r2, r3
	str	r3, [sp, #32]
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	ldr	r3, [sp, #32]
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #1
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalSetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L230
	movw	r0, #:lower16:.LC21
	movt	r0, #:upper16:.LC21
	bl	printk
	mvn	r3, #13
	b	.L224
.L230:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bne	.L231
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #12]
	mov	r2, r3
	bl	generalGetTrtcmPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L232
	ldr	r0, [sp, #16]
	bl	generalGetBucketSizeByRate
	str	r0, [sp, #44]
	b	.L233
.L232:
	ldr	r3, [sp, #16]
	str	r3, [sp, #44]
.L233:
	ldr	r3, [sp, #44]
	cmp	r3, #16777216
	ble	.L235
	mov	r3, #16777216
	str	r3, [sp, #44]
	b	.L235
.L231:
	ldr	r3, [sp, #28]
	add	r3, r3, #1
	str	r3, [sp, #44]
	ldr	r3, [sp, #44]
	cmp	r3, #4096
	bge	.L235
	mov	r3, #4096
	str	r3, [sp, #44]
.L235:
	ldr	r3, [sp, #44]
.L224:
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmTokenRate, .-generalSetTrtcmTokenRate
	.align	2
	.global	generalGetTrtcmTokenRate
	.type	generalGetTrtcmTokenRate, %function
generalGetTrtcmTokenRate:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #0
	str	r3, [sp, #44]
	mov	r3, #0
	strh	r3, [sp, #42]	@ movhi
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #16]
	mov	r2, r3
	bl	generalGetTrtcmTickSel
	mov	r3, r0
	cmp	r3, #0
	bne	.L237
	ldr	r0, [sp, #20]
	bl	generalGetTrtcmFastTick
	str	r0, [sp, #44]
	b	.L238
.L237:
	ldr	r0, [sp, #20]
	bl	generalGetTrtcmSlowTick
	mov	r3, r0
	str	r3, [sp, #44]
.L238:
	ldr	r3, [sp, #44]
	cmp	r3, #0
	bne	.L239
	movw	r0, #:lower16:.LC24
	movt	r0, #:upper16:.LC24
	bl	printk
	mvn	r3, #21
	b	.L244
.L239:
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #16]
	mov	r2, r3
	bl	generalGetTrtcmPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L241
	mov	r0, #8000
	ldr	r1, [sp, #44]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #42]	@ movhi
	b	.L242
.L241:
	movw	r0, #16960
	movt	r0, 15
	ldr	r1, [sp, #44]
	bl	__aeabi_idiv
	mov	r3, r0
	strh	r3, [sp, #42]	@ movhi
.L242:
	ldrh	r3, [sp, #42]
	cmp	r3, #0
	bne	.L243
	movw	r0, #:lower16:.LC25
	movt	r0, #:upper16:.LC25
	bl	printk
	mvn	r3, #21
	b	.L244
.L243:
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #28
	str	r3, [sp]
	add	r3, sp, #24
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #1
	ldr	r2, [sp, #16]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #28]
	bic	r3, r3, #-16777216
	bic	r3, r3, #63
	mov	r3, r3, lsr #6
	str	r3, [sp, #36]
	ldr	r3, [sp, #28]
	and	r3, r3, #63
	str	r3, [sp, #32]
	ldrh	r3, [sp, #42]
	ldr	r2, [sp, #36]
	mul	r2, r2, r3
	ldrh	r3, [sp, #42]
	ldr	r1, [sp, #32]
	mul	r3, r1, r3
	mov	r3, r3, lsr #6
	add	r3, r2, r3
.L244:
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmTokenRate, .-generalGetTrtcmTokenRate
	.align	2
	.global	generalSetTrtcmBucketSize
	.type	generalSetTrtcmBucketSize, %function
generalSetTrtcmBucketSize:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	str	r2, [sp, #12]
	strb	r3, [sp, #11]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #0
	str	r3, [sp, #28]
	ldr	r3, [sp, #16]
	cmp	r3, #134217728
	bls	.L246
	mvn	r3, #21
	b	.L247
.L246:
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #12]
	mov	r2, r3
	bl	generalGetTrtcmPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L248
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	ldr	r2, [sp, #20]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #28]
	b	.L249
.L248:
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	ldr	r2, [sp, #20]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #28]
.L249:
	ldr	r0, [sp, #16]
	mov	r1, #0
	mov	r2, #17
	ldr	r3, [sp, #28]
	bl	biSearchGetBucketSizeShift
	str	r0, [sp, #24]
	ldr	r3, [sp, #24]
	ldrb	ip, [sp, #11]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r0, [sp, #20]
	mov	r1, #2
	ldr	r2, [sp, #12]
	mov	r3, ip
	bl	generalSetTrtcmParaConfig
	mov	r3, r0
	cmp	r3, #0
	bge	.L250
	movw	r0, #:lower16:.LC26
	movt	r0, #:upper16:.LC26
	bl	printk
	mvn	r3, #13
	b	.L247
.L250:
	mov	r3, #0
.L247:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalSetTrtcmBucketSize, .-generalSetTrtcmBucketSize
	.align	2
	.global	generalGetTrtcmBucketSize
	.type	generalGetTrtcmBucketSize, %function
generalGetTrtcmBucketSize:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #32]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	strb	r3, [sp, #43]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #44]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #16]
	mov	r2, r3
	bl	generalGetTrtcmPktMode
	mov	r3, r0
	cmp	r3, #0
	bne	.L252
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	ldr	r2, [sp, #20]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #44]
	b	.L253
.L252:
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	ldr	r2, [sp, #20]
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #44]
.L253:
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #32
	str	r3, [sp]
	add	r3, sp, #28
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #2
	ldr	r2, [sp, #16]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #32]
	uxtb	r3, r3
	and	r3, r3, #31
	strb	r3, [sp, #43]
	ldrb	r3, [sp, #43]	@ zero_extendqisi2
	ldr	r2, [sp, #44]
	mov	r3, r2, asl r3
	str	r3, [sp, #36]
	ldr	r3, [sp, #36]
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmBucketSize, .-generalGetTrtcmBucketSize
	.align	2
	.global	generalGetTrtcmBucketCntr
	.type	generalGetTrtcmBucketCntr, %function
generalGetTrtcmBucketCntr:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r0, [sp, #20]
	str	r1, [sp, #16]
	mov	r3, r2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #32]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #44]
	mov	r3, #0
	str	r3, [sp, #40]
	mov	r3, #0
	strb	r3, [sp, #39]
	mov	r3, #0
	strh	r3, [sp, #36]	@ movhi
	ldrb	ip, [sp, #15]	@ zero_extendqisi2
	add	r3, sp, #32
	str	r3, [sp]
	add	r3, sp, #28
	str	r3, [sp, #4]
	ldr	r0, [sp, #20]
	mov	r1, #3
	ldr	r2, [sp, #16]
	mov	r3, ip
	bl	generalGetTrtcmParaConfig
	ldr	r3, [sp, #32]
	uxtb	r3, r3
	and	r3, r3, #63
	strb	r3, [sp, #39]
	ldr	r3, [sp, #32]
	mov	r2, r3, lsr #6
	ldr	r3, [sp, #28]
	and	r3, r3, #7
	mov	r3, r3, asl #26
	orr	r3, r2, r3
	str	r3, [sp, #40]
	ldr	r3, [sp, #28]
	and	r3, r3, #8
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	uxtb	r3, r3
	strh	r3, [sp, #36]	@ movhi
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	generalGetTrtcmBucketCntr, .-generalGetTrtcmBucketCntr
	.align	2
	.global	qdmaSetRxRateLimitConfig
	.type	qdmaSetRxRateLimitConfig, %function
qdmaSetRxRateLimitConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	mov	r3, r2
	mov	r2, r0
	strb	r2, [sp, #7]
	mov	r2, r1
	strb	r2, [sp, #6]
	strh	r3, [sp, #4]	@ movhi
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaSetRxRateLimitConfig, .-qdmaSetRxRateLimitConfig
	.align	2
	.global	qdmaGetRxRateLimitConfig
	.type	qdmaGetRxRateLimitConfig, %function
qdmaGetRxRateLimitConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strb	r3, [sp, #7]
	mov	r3, r2
	strb	r3, [sp, #6]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaGetRxRateLimitConfig, .-qdmaGetRxRateLimitConfig
	.align	2
	.global	qdmaSetTxRateLimitConfig
	.type	qdmaSetTxRateLimitConfig, %function
qdmaSetTxRateLimitConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	mov	r3, r2
	mov	r2, r0
	strb	r2, [sp, #7]
	mov	r2, r1
	strb	r2, [sp, #6]
	strh	r3, [sp, #4]	@ movhi
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaSetTxRateLimitConfig, .-qdmaSetTxRateLimitConfig
	.align	2
	.global	qdmaGetTxRateLimitConfig
	.type	qdmaGetTxRateLimitConfig, %function
qdmaGetTxRateLimitConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strb	r3, [sp, #7]
	mov	r3, r2
	strb	r3, [sp, #6]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaGetTxRateLimitConfig, .-qdmaGetTxRateLimitConfig
	.align	2
	.global	qdmaGetLimitRateMax
	.type	qdmaGetLimitRateMax, %function
qdmaGetLimitRateMax:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	str	r0, [sp, #4]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaGetLimitRateMax, .-qdmaGetLimitRateMax
	.align	2
	.global	qdmaGetLimitRateMaxChnl
	.type	qdmaGetLimitRateMaxChnl, %function
qdmaGetLimitRateMaxChnl:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaGetLimitRateMaxChnl, .-qdmaGetLimitRateMaxChnl
	.align	2
	.global	qdmaUpdateAllTxRateLimitValue
	.type	qdmaUpdateAllTxRateLimitValue, %function
qdmaUpdateAllTxRateLimitValue:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	mov	r3, r1
	str	r2, [sp]
	strh	r0, [sp, #6]	@ movhi
	strh	r3, [sp, #4]	@ movhi
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaUpdateAllTxRateLimitValue, .-qdmaUpdateAllTxRateLimitValue
	.align	2
	.global	qdmaUpdateAllRxRateLimitValue
	.type	qdmaUpdateAllRxRateLimitValue, %function
qdmaUpdateAllRxRateLimitValue:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #8
	sub	sp, sp, #8
	mov	r3, r1
	strh	r0, [sp, #6]	@ movhi
	strh	r3, [sp, #4]	@ movhi
	mov	r3, r2
	strb	r3, [sp, #3]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #8
	@ sp needed
	bx	lr
	.fnend
	.size	qdmaUpdateAllRxRateLimitValue, .-qdmaUpdateAllRxRateLimitValue
	.section	.rodata.str1.4
	.align	2
.LC32:
	.ascii	"%s: %s [%d]: Fault: wrong dei threshold scale !\012"
	.ascii	"\000"
	.text
	.align	2
	.global	qdmaSetDynCngstDeiThrhScale
	.type	qdmaSetDynCngstDeiThrhScale, %function
qdmaSetDynCngstDeiThrhScale:
	.fnstart
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #68
	sub	sp, sp, #68
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	strb	r3, [sp, #63]
	mov	r3, #0
	strb	r3, [sp, #62]
	add	r3, sp, #12
	str	r3, [sp, #40]
	mov	r3, #1
	str	r3, [sp, #16]
	ldr	r3, [sp]
	cmp	r3, #0
	bne	.L274
	mov	r3, #4
	strb	r3, [sp, #63]
	b	.L275
.L274:
	ldr	r3, [sp]
	cmp	r3, #1
	bne	.L276
	mov	r3, #2
	strb	r3, [sp, #63]
	b	.L275
.L276:
	ldr	r3, [sp]
	cmp	r3, #2
	beq	.L277
	ldr	r3, [sp]
	cmp	r3, #3
	bne	.L278
.L277:
	mov	r3, #1
	strb	r3, [sp, #63]
	b	.L275
.L278:
	movw	r0, #:lower16:.LC32
	movt	r0, #:upper16:.LC32
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L282
	movw	r3, #1247
	bl	printk
	b	.L273
.L275:
	mov	r3, #0
	strb	r3, [sp, #62]
	b	.L280
.L281:
	ldrb	r3, [sp, #62]	@ zero_extendqisi2
	add	r2, sp, #64
	add	r3, r2, r3
	ldrb	r2, [sp, #63]
	strb	r2, [r3, #-40]
	ldrb	r3, [sp, #62]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [sp, #62]
.L280:
	ldrb	r3, [sp, #62]	@ zero_extendqisi2
	cmp	r3, #4
	bls	.L281
	add	r3, sp, #32
	mov	r0, r3
	bl	qdma_set_tx_wred_threshold
.L273:
	add	sp, sp, #68
	@ sp needed
	ldr	pc, [sp], #4
.L283:
	.align	2
.L282:
	.word	.LC4+60
	.fnend
	.size	qdmaSetDynCngstDeiThrhScale, .-qdmaSetDynCngstDeiThrhScale
	.align	2
	.global	qdmaGetDynCngstDeiThrhScale
	.type	qdmaGetDynCngstDeiThrhScale, %function
qdmaGetDynCngstDeiThrhScale:
	.fnstart
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	str	r0, [sp, #4]
	add	r3, sp, #8
	str	r3, [sp, #36]
	mov	r3, #1
	str	r3, [sp, #12]
	add	r3, sp, #28
	mov	r0, r3
	bl	qdma_get_tx_wred_threshold
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L285
	mov	r3, #2
	b	.L289
.L285:
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #2
	bne	.L287
	mov	r3, #1
	b	.L289
.L287:
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #4
	bne	.L288
	mov	r3, #0
	b	.L289
.L288:
	mov	r3, #4
.L289:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetDynCngstDeiThrhScale, .-qdmaGetDynCngstDeiThrhScale
	.align	2
	.global	qdmaSetTxPeekRateMargin
	.type	qdmaSetTxPeekRateMargin, %function
qdmaSetTxPeekRateMargin:
	.fnstart
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #68
	sub	sp, sp, #68
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	strb	r3, [sp, #63]
	mov	r3, #0
	strb	r3, [sp, #62]
	add	r3, sp, #12
	str	r3, [sp, #40]
	mov	r3, #0
	str	r3, [sp, #16]
	ldr	r3, [sp]
	cmp	r3, #0
	bne	.L291
	mov	r3, #8
	strb	r3, [sp, #63]
	b	.L292
.L291:
	ldr	r3, [sp]
	cmp	r3, #1
	bne	.L293
	mov	r3, #10
	strb	r3, [sp, #63]
	b	.L292
.L293:
	ldr	r3, [sp]
	cmp	r3, #2
	bne	.L294
	mov	r3, #12
	strb	r3, [sp, #63]
	b	.L292
.L294:
	ldr	r3, [sp]
	cmp	r3, #3
	bne	.L295
	mov	r3, #16
	strb	r3, [sp, #63]
	b	.L292
.L295:
	movw	r0, #:lower16:.LC32
	movt	r0, #:upper16:.LC32
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L299
	movw	r3, #1291
	bl	printk
	b	.L290
.L292:
	mov	r3, #0
	strb	r3, [sp, #62]
	b	.L297
.L298:
	ldrb	r3, [sp, #62]	@ zero_extendqisi2
	add	r2, sp, #64
	add	r3, r2, r3
	ldrb	r2, [sp, #63]
	strb	r2, [r3, #-40]
	ldrb	r3, [sp, #62]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [sp, #62]
.L297:
	ldrb	r3, [sp, #62]	@ zero_extendqisi2
	cmp	r3, #4
	bls	.L298
	add	r3, sp, #32
	mov	r0, r3
	bl	qdma_set_tx_wred_threshold
.L290:
	add	sp, sp, #68
	@ sp needed
	ldr	pc, [sp], #4
.L300:
	.align	2
.L299:
	.word	.LC4+60
	.fnend
	.size	qdmaSetTxPeekRateMargin, .-qdmaSetTxPeekRateMargin
	.align	2
	.global	qdmaGetTxPeekRateMargin
	.type	qdmaGetTxPeekRateMargin, %function
qdmaGetTxPeekRateMargin:
	.fnstart
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	str	r0, [sp, #4]
	add	r3, sp, #8
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #12]
	add	r3, sp, #28
	mov	r0, r3
	bl	qdma_get_tx_wred_threshold
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #8
	bne	.L302
	mov	r3, #0
	b	.L307
.L302:
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #10
	bne	.L304
	mov	r3, #1
	b	.L307
.L304:
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #12
	bne	.L305
	mov	r3, #2
	b	.L307
.L305:
	ldrb	r3, [sp, #20]	@ zero_extendqisi2
	cmp	r3, #16
	bne	.L306
	mov	r3, #3
	b	.L307
.L306:
	mov	r3, #0
.L307:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetTxPeekRateMargin, .-qdmaGetTxPeekRateMargin
	.section	.rodata.str1.4
	.align	2
.LC33:
	.ascii	"%s: %s [%d]: wrong channel index.\012\000"
	.text
	.align	2
	.global	qdmaSetQueueClose_sw
	.type	qdmaSetQueueClose_sw, %function
qdmaSetQueueClose_sw:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, lsr #2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #8]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L309
	movw	r0, #:lower16:.LC33
	movt	r0, #:upper16:.LC33
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L311
	movw	r3, #1527
	bl	printk
	mvn	r3, #0
	b	.L310
.L309:
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #8]
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	ldrb	r1, [sp, #2]	@ zero_extendqisi2
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	add	r3, r1, r3
	mov	r1, #1
	mov	r3, r1, asl r3
	mov	r1, r3
	ldr	r3, [sp, #8]
	orr	r1, r1, r3
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	str	r1, [r3, r2, asl #2]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r2, r3, #252
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r1, r3, #160
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L310:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
.L312:
	.align	2
.L311:
	.word	.LC4+60
	.fnend
	.size	qdmaSetQueueClose_sw, .-qdmaSetQueueClose_sw
	.align	2
	.global	qdmaSetQueueOpen_sw
	.type	qdmaSetQueueOpen_sw, %function
qdmaSetQueueOpen_sw:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, lsr #2
	strb	r3, [sp, #15]
	mov	r3, #0
	str	r3, [sp, #8]
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L314
	movw	r0, #:lower16:.LC33
	movt	r0, #:upper16:.LC33
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L316
	movw	r3, #1543
	bl	printk
	mvn	r3, #0
	b	.L315
.L314:
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #8]
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	ldrb	r1, [sp, #2]	@ zero_extendqisi2
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	add	r3, r1, r3
	mov	r1, #1
	mov	r3, r1, asl r3
	mvn	r3, r3
	mov	r1, r3
	ldr	r3, [sp, #8]
	and	r1, r1, r3
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	str	r1, [r3, r2, asl #2]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r2, r3, #252
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r1, r3, #160
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L315:
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
.L317:
	.align	2
.L316:
	.word	.LC4+60
	.fnend
	.size	qdmaSetQueueOpen_sw, .-qdmaSetQueueOpen_sw
	.align	2
	.global	qdmaIsQueueClosed_sw
	.type	qdmaIsQueueClosed_sw, %function
qdmaIsQueueClosed_sw:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, lsr #2
	strb	r3, [sp, #23]
	mov	r3, #0
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L319
	movw	r0, #:lower16:.LC33
	movt	r0, #:upper16:.LC33
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L321
	movw	r3, #1560
	bl	printk
	mov	r3, #0
	b	.L320
.L319:
	ldrb	r2, [sp, #23]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #16]
	ldrb	r2, [sp, #2]	@ zero_extendqisi2
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	add	r3, r2, r3
	mov	r2, #1
	mov	r3, r2, asl r3
	mov	r2, r3
	ldr	r3, [sp, #16]
	and	r3, r3, r2
	str	r3, [sp, #12]
	ldr	r3, [sp, #12]
.L320:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
.L322:
	.align	2
.L321:
	.word	.LC4+60
	.fnend
	.size	qdmaIsQueueClosed_sw, .-qdmaIsQueueClosed_sw
	.align	2
	.global	qdmaSetChannelCfg_sw
	.type	qdmaSetChannelCfg_sw, %function
qdmaSetChannelCfg_sw:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	mov	r3, r1
	str	r2, [sp, #4]
	strb	r3, [sp, #11]
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	mov	r3, r3, lsr #2
	strb	r3, [sp, #23]
	mov	r3, #0
	str	r3, [sp, #16]
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L324
	movw	r0, #:lower16:.LC33
	movt	r0, #:upper16:.LC33
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L326
	movw	r3, #1575
	bl	printk
	mvn	r3, #0
	b	.L325
.L324:
	ldrb	r2, [sp, #23]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #16]
	ldrb	r2, [sp, #23]	@ zero_extendqisi2
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	mov	r1, #255
	mov	r3, r1, asl r3
	mvn	r3, r3
	mov	r1, r3
	ldr	r3, [sp, #16]
	and	r1, r1, r3
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	ldr	r0, [sp, #4]
	mov	r3, r0, asl r3
	ldrb	r0, [sp, #11]	@ zero_extendqisi2
	and	r0, r0, #3
	mov	r0, r0, asl #3
	mov	ip, #255
	mov	r0, ip, asl r0
	and	r3, r3, r0
	orr	r1, r1, r3
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	str	r1, [r3, r2, asl #2]
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	and	r2, r3, #252
	ldr	r3, [sp, #12]
	add	r3, r2, r3
	add	r1, r3, #160
	ldrb	r2, [sp, #23]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
.L325:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
.L327:
	.align	2
.L326:
	.word	.LC4+60
	.fnend
	.size	qdmaSetChannelCfg_sw, .-qdmaSetChannelCfg_sw
	.align	2
	.global	qdmaIsChannelClosed_sw
	.type	qdmaIsChannelClosed_sw, %function
qdmaIsChannelClosed_sw:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, lsr #2
	strb	r3, [sp, #23]
	mov	r3, #0
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L329
	movw	r0, #:lower16:.LC33
	movt	r0, #:upper16:.LC33
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L331
	movw	r3, #1593
	bl	printk
	mov	r3, #0
	b	.L330
.L329:
	ldrb	r2, [sp, #23]	@ zero_extendqisi2
	movw	r3, #:lower16:TXQ_DIS_CFG_VALUE
	movt	r3, #:upper16:TXQ_DIS_CFG_VALUE
	ldr	r3, [r3, r2, asl #2]
	str	r3, [sp, #16]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	mov	r2, #255
	mov	r3, r2, asl r3
	mov	r2, r3
	ldr	r3, [sp, #16]
	and	r2, r2, r3
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	and	r3, r3, #3
	mov	r3, r3, asl #3
	mov	r3, r2, lsr r3
	str	r3, [sp, #12]
	ldr	r3, [sp, #12]
.L330:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
.L332:
	.align	2
.L331:
	.word	.LC4+60
	.fnend
	.size	qdmaIsChannelClosed_sw, .-qdmaIsChannelClosed_sw
	.section	.rodata.str1.4
	.align	2
.LC34:
	.ascii	"%s: %s [%d]: Timeout for setting virtual channel co"
	.ascii	"nfiguration, physical channel:%d, virtual channel:%"
	.ascii	"d.\012\000"
	.text
	.align	2
	.global	qdmaSetVirtualChannelQos
	.type	qdmaSetVirtualChannelQos, %function
qdmaSetVirtualChannelQos:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r3, [sp, #8]
	mov	r3, r0
	strb	r3, [sp, #15]
	mov	r3, r1
	strb	r3, [sp, #14]
	mov	r3, r2
	strb	r3, [sp, #13]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #40]
	mov	r3, #0
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #44]
	ldr	r3, [sp, #40]
	add	r3, r3, #4416
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #32]
	ldr	r3, [sp, #40]
	add	ip, r3, #4416
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	and	r3, r3, #15
	mov	r3, r3, asl #1
	mov	r2, #3
	mov	r3, r2, asl r3
	mvn	r3, r3
	mov	r2, r3
	ldr	r3, [sp, #32]
	and	r3, r3, r2
	ldrb	r1, [sp, #13]	@ zero_extendqisi2
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	and	r2, r2, #15
	mov	r2, r2, asl #1
	mov	r1, r1, asl r2
	ldrb	r2, [sp, #15]	@ zero_extendqisi2
	and	r2, r2, #15
	mov	r2, r2, asl #1
	mov	r0, #3
	mov	r2, r0, asl r2
	and	r2, r2, r1
	orr	r3, r3, r2
	mov	r0, ip
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
	str	r3, [sp, #44]
	b	.L334
.L342:
	ldr	r3, [sp, #44]
	ldr	r2, [sp, #8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #255
	beq	.L335
	ldr	r3, [sp, #44]
	ldr	r2, [sp, #8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r2, r3, #-2147483648
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	mov	r3, r3, asl #18
	and	r3, r3, #3932160
	orr	r2, r2, r3
	ldr	r3, [sp, #44]
	mov	r3, r3, asl #16
	and	r3, r3, #196608
	orr	r3, r2, r3
	str	r3, [sp, #36]
	ldr	r3, [sp, #40]
	add	r3, r3, #4352
	add	r3, r3, #52
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	set_frame_engine_data
	ldr	r3, [sp, #40]
	add	r3, r3, #4352
	add	r3, r3, #52
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L336
.L338:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L337
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L336:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L338
.L337:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L339
	mvn	r3, #61
	b	.L340
.L339:
	mov	r3, #0
.L340:
	cmp	r3, #0
	bge	.L335
	ldrb	r3, [sp, #15]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r3, [sp, #44]
	str	r3, [sp, #4]
	movw	r0, #:lower16:.LC34
	movt	r0, #:upper16:.LC34
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L343
	movw	r3, #1622
	bl	printk
	mvn	r3, #61
	b	.L341
.L335:
	ldr	r3, [sp, #44]
	add	r3, r3, #1
	str	r3, [sp, #44]
.L334:
	ldrb	r2, [sp, #14]	@ zero_extendqisi2
	ldr	r3, [sp, #44]
	cmp	r2, r3
	bgt	.L342
	mov	r3, #0
.L341:
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
.L344:
	.align	2
.L343:
	.word	.LC4+60
	.fnend
	.size	qdmaSetVirtualChannelQos, .-qdmaSetVirtualChannelQos
	.section	.rodata.str1.4
	.align	2
.LC35:
	.ascii	"%s: %s [%d]: Timeout for getting virtual channel co"
	.ascii	"nfiguration, physical channel:%d, virtual channel:%"
	.ascii	"d.\012\000"
	.text
	.align	2
	.global	qdmaGetVirtualChannelQos
	.type	qdmaGetVirtualChannelQos, %function
qdmaGetVirtualChannelQos:
	.fnstart
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	str	r2, [sp, #16]
	str	r3, [sp, #12]
	mov	r3, r0
	strb	r3, [sp, #23]
	mov	r3, r1
	strb	r3, [sp, #22]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #48]
	mov	r3, #0
	str	r3, [sp, #44]
	mov	r3, #0
	str	r3, [sp, #52]
	ldr	r3, [sp, #48]
	add	r3, r3, #4416
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r1, r0
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	and	r3, r3, #15
	mov	r3, r3, asl #1
	mov	r2, #3
	mov	r3, r2, asl r3
	and	r2, r1, r3
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	and	r3, r3, #15
	mov	r3, r3, asl #1
	mov	r3, r2, asr r3
	uxtb	r2, r3
	ldr	r3, [sp, #16]
	strb	r2, [r3]
	mov	r3, #0
	str	r3, [sp, #52]
	b	.L346
.L354:
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	mov	r3, r3, asl #18
	and	r2, r3, #3932160
	ldr	r3, [sp, #52]
	mov	r3, r3, asl #16
	and	r3, r3, #196608
	orr	r3, r2, r3
	str	r3, [sp, #44]
	ldr	r3, [sp, #48]
	add	r3, r3, #4352
	add	r3, r3, #52
	mov	r0, r3
	ldr	r1, [sp, #44]
	bl	set_frame_engine_data
	ldr	r3, [sp, #48]
	add	r3, r3, #4352
	add	r3, r3, #52
	str	r3, [sp, #40]
	mov	r3, #1073741824
	str	r3, [sp, #36]
	mov	r3, #3
	str	r3, [sp, #32]
	mov	r3, #0
	str	r3, [sp, #28]
	b	.L347
.L349:
	ldr	r0, [sp, #40]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #28]
	ldr	r2, [sp, #28]
	ldr	r3, [sp, #36]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L348
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L347:
	ldr	r3, [sp, #32]
	sub	r2, r3, #1
	str	r2, [sp, #32]
	cmp	r3, #0
	bne	.L349
.L348:
	ldr	r3, [sp, #32]
	cmp	r3, #0
	bge	.L350
	mvn	r3, #61
	b	.L351
.L350:
	mov	r3, #0
.L351:
	cmp	r3, #0
	bge	.L352
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r3, [sp, #52]
	str	r3, [sp, #4]
	movw	r0, #:lower16:.LC35
	movt	r0, #:upper16:.LC35
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L355
	movw	r3, #1647
	bl	printk
	mvn	r3, #61
	b	.L353
.L352:
	ldr	r3, [sp, #48]
	add	r3, r3, #4352
	add	r3, r3, #52
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #44]
	ldr	r3, [sp, #52]
	ldr	r2, [sp, #12]
	add	r3, r2, r3
	ldr	r2, [sp, #44]
	uxtb	r2, r2
	strb	r2, [r3]
	ldr	r3, [sp, #52]
	add	r3, r3, #1
	str	r3, [sp, #52]
.L346:
	ldrb	r2, [sp, #22]	@ zero_extendqisi2
	ldr	r3, [sp, #52]
	cmp	r2, r3
	bgt	.L354
	mov	r3, #0
.L353:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
.L356:
	.align	2
.L355:
	.word	.LC4+60
	.fnend
	.size	qdmaGetVirtualChannelQos, .-qdmaGetVirtualChannelQos
	.section	.rodata.str1.4
	.align	2
.LC36:
	.ascii	"Timeout for set sdn cntr configuration.\012\000"
	.text
	.align	2
	.global	qdmaGetFlowCntByteLow
	.type	qdmaGetFlowCntByteLow, %function
qdmaGetFlowCntByteLow:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	mov	r3, #0
	str	r3, [sp, #28]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r2, r3, #393216
	ldrb	r3, [sp, #2]	@ zero_extendqisi2
	orr	r3, r2, r3
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #28]
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	str	r3, [sp, #24]
	mov	r3, #1073741824
	str	r3, [sp, #20]
	mov	r3, #3
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	b	.L358
.L360:
	ldr	r0, [sp, #24]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r2, [sp, #12]
	ldr	r3, [sp, #20]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L359
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L358:
	ldr	r3, [sp, #16]
	sub	r2, r3, #1
	str	r2, [sp, #16]
	cmp	r3, #0
	bne	.L360
.L359:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	bge	.L361
	mvn	r3, #61
	b	.L362
.L361:
	mov	r3, #0
.L362:
	cmp	r3, #0
	beq	.L363
	movw	r0, #:lower16:.LC36
	movt	r0, #:upper16:.LC36
	bl	printk
	mvn	r3, #61
	b	.L364
.L363:
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #8
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
.L364:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetFlowCntByteLow, .-qdmaGetFlowCntByteLow
	.align	2
	.global	qdmaGetFlowCntByteHigh
	.type	qdmaGetFlowCntByteHigh, %function
qdmaGetFlowCntByteHigh:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	mov	r3, #0
	str	r3, [sp, #28]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r2, r3, #393216
	ldrb	r3, [sp, #2]	@ zero_extendqisi2
	orr	r3, r2, r3
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #28]
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	str	r3, [sp, #24]
	mov	r3, #1073741824
	str	r3, [sp, #20]
	mov	r3, #3
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	b	.L366
.L368:
	ldr	r0, [sp, #24]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r2, [sp, #12]
	ldr	r3, [sp, #20]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L367
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L366:
	ldr	r3, [sp, #16]
	sub	r2, r3, #1
	str	r2, [sp, #16]
	cmp	r3, #0
	bne	.L368
.L367:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	bge	.L369
	mvn	r3, #61
	b	.L370
.L369:
	mov	r3, #0
.L370:
	cmp	r3, #0
	beq	.L371
	movw	r0, #:lower16:.LC36
	movt	r0, #:upper16:.LC36
	bl	printk
	mvn	r3, #61
	b	.L372
.L371:
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
.L372:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetFlowCntByteHigh, .-qdmaGetFlowCntByteHigh
	.align	2
	.global	qdmaClearFlowCntByte
	.type	qdmaClearFlowCntByte, %function
qdmaClearFlowCntByte:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	mov	r3, #0
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #8
	mov	r0, r3
	mov	r1, #0
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #12
	mov	r0, r3
	mov	r1, #0
	bl	set_frame_engine_data
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r3, r3, #393216
	orr	r2, r3, #-2147483648
	ldrb	r3, [sp, #2]	@ zero_extendqisi2
	orr	r3, r2, r3
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #28]
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	str	r3, [sp, #24]
	mov	r3, #1073741824
	str	r3, [sp, #20]
	mov	r3, #3
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	b	.L374
.L376:
	ldr	r0, [sp, #24]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r2, [sp, #12]
	ldr	r3, [sp, #20]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L375
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L374:
	ldr	r3, [sp, #16]
	sub	r2, r3, #1
	str	r2, [sp, #16]
	cmp	r3, #0
	bne	.L376
.L375:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	bge	.L377
	mvn	r3, #61
	b	.L378
.L377:
	mov	r3, #0
.L378:
	cmp	r3, #0
	beq	.L379
	movw	r0, #:lower16:.LC36
	movt	r0, #:upper16:.LC36
	bl	printk
	mvn	r3, #61
	b	.L380
.L379:
	mov	r3, #0
.L380:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaClearFlowCntByte, .-qdmaClearFlowCntByte
	.align	2
	.global	qdmaGetFlowCntPkt
	.type	qdmaGetFlowCntPkt, %function
qdmaGetFlowCntPkt:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	mov	r3, #0
	str	r3, [sp, #28]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r3, r3, #393216
	orr	r2, r3, #65536
	ldrb	r3, [sp, #2]	@ zero_extendqisi2
	orr	r3, r2, r3
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #28]
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	str	r3, [sp, #24]
	mov	r3, #1073741824
	str	r3, [sp, #20]
	mov	r3, #3
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	b	.L382
.L384:
	ldr	r0, [sp, #24]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r2, [sp, #12]
	ldr	r3, [sp, #20]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L383
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L382:
	ldr	r3, [sp, #16]
	sub	r2, r3, #1
	str	r2, [sp, #16]
	cmp	r3, #0
	bne	.L384
.L383:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	bge	.L385
	mvn	r3, #61
	b	.L386
.L385:
	mov	r3, #0
.L386:
	cmp	r3, #0
	beq	.L387
	movw	r0, #:lower16:.LC36
	movt	r0, #:upper16:.LC36
	bl	printk
	mvn	r3, #61
	b	.L388
.L387:
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #8
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
.L388:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetFlowCntPkt, .-qdmaGetFlowCntPkt
	.align	2
	.global	qdmaGetFlowCntPktHigh
	.type	qdmaGetFlowCntPktHigh, %function
qdmaGetFlowCntPktHigh:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	mov	r3, #0
	str	r3, [sp, #28]
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r3, r3, #393216
	orr	r2, r3, #65536
	ldrb	r3, [sp, #2]	@ zero_extendqisi2
	orr	r3, r2, r3
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #28]
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	str	r3, [sp, #24]
	mov	r3, #1073741824
	str	r3, [sp, #20]
	mov	r3, #3
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	b	.L390
.L392:
	ldr	r0, [sp, #24]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r2, [sp, #12]
	ldr	r3, [sp, #20]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L391
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L390:
	ldr	r3, [sp, #16]
	sub	r2, r3, #1
	str	r2, [sp, #16]
	cmp	r3, #0
	bne	.L392
.L391:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	bge	.L393
	mvn	r3, #61
	b	.L394
.L393:
	mov	r3, #0
.L394:
	cmp	r3, #0
	beq	.L395
	movw	r0, #:lower16:.LC36
	movt	r0, #:upper16:.LC36
	bl	printk
	mvn	r3, #61
	b	.L396
.L395:
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
.L396:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetFlowCntPktHigh, .-qdmaGetFlowCntPktHigh
	.align	2
	.global	qdmaClearFlowCntPkt
	.type	qdmaClearFlowCntPkt, %function
qdmaClearFlowCntPkt:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #3]
	mov	r3, r2
	strb	r3, [sp, #2]
	mov	r3, #0
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #8
	mov	r0, r3
	mov	r1, #0
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #12
	mov	r0, r3
	mov	r1, #0
	bl	set_frame_engine_data
	ldrb	r3, [sp, #3]	@ zero_extendqisi2
	mov	r3, r3, asl #17
	and	r3, r3, #393216
	orr	r3, r3, #-2147483648
	orr	r3, r3, #65536
	ldrb	r2, [sp, #2]	@ zero_extendqisi2
	orr	r3, r3, r2
	str	r3, [sp, #28]
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #28]
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	add	r3, r3, #4
	str	r3, [sp, #24]
	mov	r3, #1073741824
	str	r3, [sp, #20]
	mov	r3, #3
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	b	.L398
.L400:
	ldr	r0, [sp, #24]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r2, [sp, #12]
	ldr	r3, [sp, #20]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L399
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L398:
	ldr	r3, [sp, #16]
	sub	r2, r3, #1
	str	r2, [sp, #16]
	cmp	r3, #0
	bne	.L400
.L399:
	ldr	r3, [sp, #16]
	cmp	r3, #0
	bge	.L401
	mvn	r3, #61
	b	.L402
.L401:
	mov	r3, #0
.L402:
	cmp	r3, #0
	beq	.L403
	movw	r0, #:lower16:.LC36
	movt	r0, #:upper16:.LC36
	bl	printk
	mvn	r3, #61
	b	.L404
.L403:
	mov	r3, #0
.L404:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaClearFlowCntPkt, .-qdmaClearFlowCntPkt
	.section	.rodata.str1.4
	.align	2
.LC37:
	.ascii	"Timeout for set dbg cntmem configuration.\012\000"
	.text
	.align	2
	.global	qdma_get_dbg_cntmem_cntr
	.type	qdma_get_dbg_cntmem_cntr, %function
qdma_get_dbg_cntmem_cntr:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	mov	r3, r0
	str	r1, [sp]
	strb	r3, [sp, #7]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp]
	mov	r3, r3, asl #5
	and	r2, r3, #96
	ldrb	r3, [sp, #7]	@ zero_extendqisi2
	and	r3, r3, #31
	orr	r3, r2, r3
	str	r3, [sp, #24]
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #24]
	bl	set_frame_engine_data
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	add	r3, r3, #4
	str	r3, [sp, #20]
	mov	r3, #1073741824
	str	r3, [sp, #16]
	mov	r3, #3
	str	r3, [sp, #12]
	mov	r3, #0
	str	r3, [sp, #8]
	b	.L406
.L408:
	ldr	r0, [sp, #20]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	ldr	r2, [sp, #8]
	ldr	r3, [sp, #16]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L407
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L406:
	ldr	r3, [sp, #12]
	sub	r2, r3, #1
	str	r2, [sp, #12]
	cmp	r3, #0
	bne	.L408
.L407:
	ldr	r3, [sp, #12]
	cmp	r3, #0
	bge	.L409
	mvn	r3, #61
	b	.L410
.L409:
	mov	r3, #0
.L410:
	cmp	r3, #0
	beq	.L411
	movw	r0, #:lower16:.LC37
	movt	r0, #:upper16:.LC37
	bl	printk
	mvn	r3, #61
	b	.L412
.L411:
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	add	r3, r3, #8
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
.L412:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_get_dbg_cntmem_cntr, .-qdma_get_dbg_cntmem_cntr
	.align	2
	.global	qdma_set_dbg_cntmem_clear
	.type	qdma_set_dbg_cntmem_clear, %function
qdma_set_dbg_cntmem_clear:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	mov	r3, r0
	str	r1, [sp]
	strb	r3, [sp, #7]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	add	r3, r3, #8
	mov	r0, r3
	mov	r1, #0
	bl	set_frame_engine_data
	ldr	r3, [sp]
	mov	r3, r3, asl #5
	and	r2, r3, #96
	ldrb	r3, [sp, #7]	@ zero_extendqisi2
	and	r3, r3, #31
	orr	r3, r2, r3
	orr	r3, r3, #-2147483648
	str	r3, [sp, #24]
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #24]
	bl	set_frame_engine_data
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	add	r3, r3, #4
	str	r3, [sp, #20]
	mov	r3, #1073741824
	str	r3, [sp, #16]
	mov	r3, #3
	str	r3, [sp, #12]
	mov	r3, #0
	str	r3, [sp, #8]
	b	.L414
.L416:
	ldr	r0, [sp, #20]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	ldr	r2, [sp, #8]
	ldr	r3, [sp, #16]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L415
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L414:
	ldr	r3, [sp, #12]
	sub	r2, r3, #1
	str	r2, [sp, #12]
	cmp	r3, #0
	bne	.L416
.L415:
	ldr	r3, [sp, #12]
	cmp	r3, #0
	bge	.L417
	mvn	r3, #61
	b	.L418
.L417:
	mov	r3, #0
.L418:
	cmp	r3, #0
	beq	.L419
	movw	r0, #:lower16:.LC37
	movt	r0, #:upper16:.LC37
	bl	printk
	mvn	r3, #61
	b	.L420
.L419:
	mov	r3, #0
.L420:
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_set_dbg_cntmem_clear, .-qdma_set_dbg_cntmem_clear
	.section	.rodata.str1.4
	.align	2
.LC38:
	.ascii	"%s: %s [%d]: Fault: dbg Cntr counter index shoule b"
	.ascii	"etween 0 and %d\012\000"
	.align	2
.LC39:
	.ascii	"%s: %s [%d]: Fault: dbg Cntr source shoule between "
	.ascii	"0 and %d\012\000"
	.align	2
.LC40:
	.ascii	"%s: %s [%d]: Fault: Channel index shoule between 0 "
	.ascii	"and %d\012\000"
	.align	2
.LC41:
	.ascii	"%s: %s [%d]: Fault: Queue index shoule between 0 an"
	.ascii	"d %d\012\000"
	.align	2
.LC42:
	.ascii	"%s: %s [%d]: Fault: ringIdx should be 0 ~ %d\012\000"
	.text
	.align	2
	.global	qdma_clear_and_set_dbg_cntr_info
	.type	qdma_clear_and_set_dbg_cntr_info, %function
qdma_clear_and_set_dbg_cntr_info:
	.fnstart
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #76
	sub	sp, sp, #76
	str	r0, [sp, #12]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #68]
	ldr	r3, [sp, #12]
	ldrb	r3, [r3]
	strb	r3, [sp, #67]
	ldr	r3, [sp, #12]
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #31
	bls	.L422
	mov	r3, #31
	str	r3, [sp]
	movw	r0, #:lower16:.LC38
	movt	r0, #:upper16:.LC38
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L436
	movw	r3, #1827
	bl	printk
	mvn	r3, #21
	b	.L423
.L422:
	ldr	r3, [sp, #12]
	ldr	r3, [r3, #4]
	cmp	r3, #9
	bls	.L424
	mov	r3, #9
	str	r3, [sp]
	movw	r0, #:lower16:.LC39
	movt	r0, #:upper16:.LC39
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L436
	movw	r3, #1831
	bl	printk
	mvn	r3, #21
	b	.L423
.L424:
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #8]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #11]	@ zero_extendqisi2
	cmp	r3, #31
	bls	.L425
	mov	r3, #31
	str	r3, [sp]
	movw	r0, #:lower16:.LC40
	movt	r0, #:upper16:.LC40
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L436
	movw	r3, #1835
	bl	printk
	mvn	r3, #21
	b	.L423
.L425:
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #9]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #12]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L426
	mov	r3, #7
	str	r3, [sp]
	movw	r0, #:lower16:.LC41
	movt	r0, #:upper16:.LC41
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L436
	movw	r3, #1839
	bl	printk
	mvn	r3, #21
	b	.L423
.L426:
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #10]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #13]	@ zero_extendqisi2
	cmp	r3, #15
	bls	.L427
	mov	r3, #15
	str	r3, [sp]
	movw	r0, #:lower16:.LC42
	movt	r0, #:upper16:.LC42
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L436
	movw	r3, #1843
	bl	printk
	mvn	r3, #21
	b	.L423
.L427:
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #60]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r1, r3, #1024
	ldr	r3, [sp, #60]
	bic	r2, r3, #251658240
	ldr	r3, [sp, #12]
	ldr	r3, [r3, #4]
	mov	r3, r3, asl #24
	and	r3, r3, #251658240
	orr	r3, r2, r3
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #56]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r1, r3, #1024
	ldr	r3, [sp, #56]
	bic	r2, r3, #248
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #11]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	uxtb	r3, r3
	orr	r3, r2, r3
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #52]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r1, r3, #1024
	ldr	r3, [sp, #52]
	bic	r2, r3, #7
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #12]	@ zero_extendqisi2
	and	r3, r3, #7
	orr	r3, r2, r3
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #48]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r1, r3, #1024
	ldr	r3, [sp, #48]
	bic	r2, r3, #983040
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #13]	@ zero_extendqisi2
	mov	r3, r3, asl #16
	and	r3, r3, #983040
	orr	r3, r2, r3
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #8]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #44]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #44]
	bic	r3, r3, #1073741824
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L429
.L428:
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #40]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #40]
	orr	r3, r3, #1073741824
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L429:
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #9]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #36]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #36]
	bic	r3, r3, #536870912
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L431
.L430:
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #32]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #32]
	orr	r3, r3, #536870912
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L431:
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #10]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #28]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #28]
	bic	r3, r3, #268435456
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L433
.L432:
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #24]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #24]
	orr	r3, r3, #268435456
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L433:
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	add	r3, r3, #4
	mov	r0, r3
	mov	r1, #0
	bl	set_frame_engine_data
	ldr	r3, [sp, #12]
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #20]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #20]
	bic	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L435
.L434:
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldrb	r3, [sp, #67]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #68]
	add	r3, r2, r3
	add	r2, r3, #1024
	ldr	r3, [sp, #16]
	orr	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L435:
	mov	r3, #0
.L423:
	mov	r0, r3
	add	sp, sp, #76
	@ sp needed
	ldr	pc, [sp], #4
.L437:
	.align	2
.L436:
	.word	.LC4+60
	.fnend
	.size	qdma_clear_and_set_dbg_cntr_info, .-qdma_clear_and_set_dbg_cntr_info
	.align	2
	.global	qdma_get_dbg_cntr_info
	.type	qdma_get_dbg_cntr_info, %function
qdma_get_dbg_cntr_info:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #12]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #20]
	ldr	r3, [sp, #12]
	ldrb	r3, [r3]
	strb	r3, [sp, #19]
	ldr	r3, [sp, #12]
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #31
	bls	.L439
	mov	r3, #31
	str	r3, [sp]
	movw	r0, #:lower16:.LC38
	movt	r0, #:upper16:.LC38
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L441
	movw	r3, #1900
	bl	printk
	mvn	r3, #21
	b	.L440
.L439:
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r3, r3, asr #31
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #1]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #251658240
	mov	r3, r3, asr #24
	mov	r2, r3
	ldr	r3, [sp, #12]
	str	r2, [r3, #4]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #248
	mov	r3, r3, asr #3
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #11]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	uxtb	r3, r3
	and	r3, r3, #7
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #12]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #983040
	mov	r3, r3, asr #16
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #13]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #1073741824
	mov	r3, r3, asr #30
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #8]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #536870912
	mov	r3, r3, asr #29
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #9]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	and	r3, r3, #268435456
	mov	r3, r3, asr #28
	uxtb	r2, r3
	ldr	r3, [sp, #12]
	strb	r2, [r3, #10]
	ldrb	r3, [sp, #19]	@ zero_extendqisi2
	mov	r3, r3, asl #3
	mov	r2, r3
	ldr	r3, [sp, #20]
	add	r3, r2, r3
	add	r3, r3, #1024
	add	r3, r3, #4
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [sp, #12]
	str	r2, [r3, #16]
	mov	r3, #0
.L440:
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
.L442:
	.align	2
.L441:
	.word	.LC4+60
	.fnend
	.size	qdma_get_dbg_cntr_info, .-qdma_get_dbg_cntr_info
	.align	2
	.global	qdma_set_dbg_cntr_default_config
	.type	qdma_set_dbg_cntr_default_config, %function
qdma_set_dbg_cntr_default_config:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #24]
	mov	r3, #1
	strb	r3, [sp, #1]
	mov	r3, #1
	strb	r3, [sp, #8]
	mov	r3, #1
	strb	r3, [sp, #9]
	mov	r3, #1
	strb	r3, [sp, #10]
	mov	r3, #0
	strb	r3, [sp, #12]
	mov	r3, #0
	strb	r3, [sp, #11]
	mov	r3, #0
	strb	r3, [sp, #13]
	ldr	r3, [sp, #28]
	add	r3, r3, #1536
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #20]
	ldr	r3, [sp, #28]
	add	r2, r3, #1536
	ldr	r3, [sp, #20]
	orr	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_set_dbg_cntr_default_config, .-qdma_set_dbg_cntr_default_config
	.section	.rodata
	.align	2
.LC0:
	.word	1
	.word	0
	.word	1
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	1
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.align	2
.LC1:
	.word	4000
	.word	1000000
	.word	4000
	.word	4000
	.word	4000
	.word	1000000
	.word	1000000
	.word	4000
	.word	200
	.word	1000000
	.word	1000000
	.word	1000000
	.word	1000000
	.word	1000000
	.word	1000000
	.word	1000000
	.text
	.align	2
	.global	qdmaSetRxRatelimitDefaultConfig
	.type	qdmaSetRxRatelimitDefaultConfig, %function
qdmaSetRxRatelimitDefaultConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #212
	sub	sp, sp, #212
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #200]
	mov	r3, #0
	strb	r3, [sp, #207]
	movw	r3, #:lower16:.LC0
	movt	r3, #:upper16:.LC0
	add	ip, sp, #64
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr, {r0, r1, r2, r3}
	stmia	ip, {r0, r1, r2, r3}
	movw	r3, #:lower16:.LC1
	movt	r3, #:upper16:.LC1
	mov	ip, sp
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr, {r0, r1, r2, r3}
	stmia	ip, {r0, r1, r2, r3}
	add	r3, sp, #164
	str	r3, [sp, #196]
	mov	r3, #28
	str	r3, [sp, #192]
	ldr	r3, [sp, #192]
	cmp	r3, #0
	beq	.L446
	ldr	r0, [sp, #196]
	ldr	r1, [sp, #192]
	bl	__memzero
.L446:
	bl	GET_IS_FPGA
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	movw	r3, #1800
	str	r3, [sp]
.L447:
	mov	r3, #1
	str	r3, [sp, #152]
	mov	r3, #1
	str	r3, [sp, #156]
	mov	r3, #0
	str	r3, [sp, #144]
	mov	r3, #0
	str	r3, [sp, #128]
	mov	r3, #0
	strb	r3, [sp, #207]
	b	.L448
.L449:
	ldrsb	r3, [sp, #207]
	mov	r3, r3, asl #2
	add	r2, sp, #208
	add	r3, r2, r3
	ldr	r3, [r3, #-144]
	str	r3, [sp, #160]
	ldrb	r3, [sp, #207]	@ zero_extendqisi2
	strb	r3, [sp, #148]
	add	r3, sp, #144
	str	r3, [sp, #172]
	add	r3, sp, #164
	mov	r0, r3
	bl	qdma_general_set_ratelimit_mode_cfg
	ldrb	r3, [sp, #207]	@ zero_extendqisi2
	strb	r3, [sp, #132]
	ldrsb	r3, [sp, #207]
	mov	r3, r3, asl #2
	add	r2, sp, #208
	add	r3, r2, r3
	ldr	r3, [r3, #-208]
	str	r3, [sp, #136]
	add	r3, sp, #128
	str	r3, [sp, #172]
	add	r3, sp, #164
	mov	r0, r3
	bl	qdma_general_set_ratelimit_mode_value
	ldrb	r3, [sp, #207]	@ zero_extendqisi2
	uxtb	r3, r3
	add	r3, r3, #1
	uxtb	r3, r3
	strb	r3, [sp, #207]
.L448:
	ldrsb	r3, [sp, #207]
	cmp	r3, #15
	ble	.L449
	mov	r0, #0
	mov	r1, #1
	bl	generalSetTrtcmMode
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #212
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaSetRxRatelimitDefaultConfig, .-qdmaSetRxRatelimitDefaultConfig
	.section	.rodata.str1.4
	.align	2
.LC43:
	.ascii	"dbgMemXsCfg is 0x%08x, valueLow:0x%08x, valueHigh:0"
	.ascii	"x%08x.\012\000"
	.align	2
.LC44:
	.ascii	"%s: %s [%d]: Timeout for set dbg mem xs data.\012\000"
	.text
	.align	2
	.global	qdmaSetDbgMemXsConfig
	.type	qdmaSetDbgMemXsConfig, %function
qdmaSetDbgMemXsConfig:
	.fnstart
	@ args = 4, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	str	r3, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #11]
	strh	r2, [sp, #8]	@ movhi
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #4]
	bl	set_frame_engine_data
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	add	r3, r3, #8
	mov	r0, r3
	ldr	r1, [sp, #48]
	bl	set_frame_engine_data
	ldr	r3, [sp, #12]
	mov	r3, r3, asl #24
	and	r2, r3, #117440512
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	mov	r3, r3, asl #16
	and	r3, r3, #2031616
	orr	r2, r2, r3
	ldrh	r3, [sp, #8]
	orr	r3, r2, r3
	orr	r3, r3, #-2147483648
	str	r3, [sp, #32]
	movw	r0, #:lower16:.LC43
	movt	r0, #:upper16:.LC43
	ldr	r1, [sp, #32]
	ldr	r2, [sp, #4]
	ldr	r3, [sp, #48]
	bl	printk
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	mov	r0, r3
	ldr	r1, [sp, #32]
	bl	set_frame_engine_data
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L452
.L454:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L453
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L452:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L454
.L453:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L455
	mvn	r3, #61
	b	.L456
.L455:
	mov	r3, #0
.L456:
	cmp	r3, #0
	bge	.L457
	movw	r0, #:lower16:.LC44
	movt	r0, #:upper16:.LC44
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L459
	movw	r3, #2107
	bl	printk
	mvn	r3, #61
	b	.L458
.L457:
	mov	r3, #0
.L458:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
.L460:
	.align	2
.L459:
	.word	.LC4+60
	.fnend
	.size	qdmaSetDbgMemXsConfig, .-qdmaSetDbgMemXsConfig
	.section	.rodata.str1.4
	.align	2
.LC45:
	.ascii	"%s: %s [%d]: Timeout for get dbg mem xs value.\012\000"
	.text
	.align	2
	.global	qdmaGetDbgMemXsConfig
	.type	qdmaGetDbgMemXsConfig, %function
qdmaGetDbgMemXsConfig:
	.fnstart
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #44
	sub	sp, sp, #44
	str	r0, [sp, #12]
	str	r3, [sp, #4]
	mov	r3, r1
	strb	r3, [sp, #11]
	strh	r2, [sp, #8]	@ movhi
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #36]
	mov	r3, #0
	str	r3, [sp, #32]
	ldr	r3, [sp, #12]
	mov	r3, r3, asl #24
	and	r2, r3, #117440512
	ldrb	r3, [sp, #11]	@ zero_extendqisi2
	mov	r3, r3, asl #16
	and	r3, r3, #2031616
	orr	r2, r2, r3
	ldrh	r3, [sp, #8]
	orr	r3, r2, r3
	str	r3, [sp, #32]
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	mov	r0, r3
	ldr	r1, [sp, #32]
	bl	set_frame_engine_data
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	str	r3, [sp, #28]
	mov	r3, #1073741824
	str	r3, [sp, #24]
	mov	r3, #3
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	b	.L462
.L464:
	ldr	r0, [sp, #28]
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r2, [sp, #16]
	ldr	r3, [sp, #24]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L463
	movw	r3, #:lower16:arm_delay_ops
	movt	r3, #:upper16:arm_delay_ops
	ldr	r3, [r3, #4]
	movw	r0, #26032
	movt	r0, 1638
	blx	r3
.L462:
	ldr	r3, [sp, #20]
	sub	r2, r3, #1
	str	r2, [sp, #20]
	cmp	r3, #0
	bne	.L464
.L463:
	ldr	r3, [sp, #20]
	cmp	r3, #0
	bge	.L465
	mvn	r3, #61
	b	.L466
.L465:
	mov	r3, #0
.L466:
	cmp	r3, #0
	bge	.L467
	movw	r0, #:lower16:.LC45
	movt	r0, #:upper16:.LC45
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L469
	movw	r3, #2126
	bl	printk
	mvn	r3, #61
	b	.L468
.L467:
	ldr	r3, [sp, #36]
	add	r3, r3, #4352
	add	r3, r3, #4
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [sp, #4]
	str	r2, [r3]
	mov	r3, #0
.L468:
	mov	r0, r3
	add	sp, sp, #44
	@ sp needed
	ldr	pc, [sp], #4
.L470:
	.align	2
.L469:
	.word	.LC4+60
	.fnend
	.size	qdmaGetDbgMemXsConfig, .-qdmaGetDbgMemXsConfig
	.align	2
	.global	isDefaultQueue
	.type	isDefaultQueue, %function
isDefaultQueue:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #16
	sub	sp, sp, #16
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	ldr	r3, [r3, #132]
	and	r3, r3, #240
	str	r3, [sp, #12]
	ldr	r3, [sp, #12]
	cmp	r3, #0
	bne	.L472
	mov	r3, #1
	b	.L473
.L472:
	movw	r3, #:lower16:gQueueMask
	movt	r3, #:upper16:gQueueMask
	ldr	r2, [r3]
	ldr	r3, [sp, #12]
	mov	r3, r3, asr #4
	sub	r3, r3, #1
	mov	r3, r2, asr r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L474
	mov	r3, #0
	b	.L473
.L474:
	mov	r3, #1
.L473:
	mov	r0, r3
	add	sp, sp, #16
	@ sp needed
	bx	lr
	.fnend
	.size	isDefaultQueue, .-isDefaultQueue
	.align	2
	.global	isWeigt0
	.type	isWeigt0, %function
isWeigt0:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	.pad #16
	sub	sp, sp, #16
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #12]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #16
	@ sp needed
	bx	lr
	.fnend
	.size	isWeigt0, .-isWeigt0
	.section	.rodata.str1.4
	.align	2
.LC46:
	.ascii	"%s: %s [%d]: ERROR: cp is NULL at isPriorityPkt\012"
	.ascii	"\000"
	.text
	.align	2
	.type	isPriorityPkt, %function
isPriorityPkt:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	strh	r3, [sp, #30]	@ movhi
	mov	r3, #0
	strb	r3, [sp, #29]
	mov	r3, #0
	strb	r3, [sp, #28]
	mov	r3, #0
	strb	r3, [sp, #27]
	mov	r3, #0
	strh	r3, [sp, #24]	@ movhi
	mov	r3, #0
	strb	r3, [sp, #23]
	mov	r3, #0
	strb	r3, [sp, #22]
	mov	r3, #0
	strh	r3, [sp, #20]	@ movhi
	mov	r3, #0
	strh	r3, [sp, #18]	@ movhi
	mov	r3, #0
	str	r3, [sp, #12]
	mov	r3, #0
	str	r3, [sp, #8]
	ldr	r3, [sp, #4]
	cmp	r3, #0
	bne	.L478
	movw	r0, #:lower16:.LC46
	movt	r0, #:upper16:.LC46
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L503
	movw	r3, #2197
	bl	printk
	mov	r3, #0
	b	.L479
.L478:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrb	r3, [r3, #538]	@ zero_extendqisi2
	cmp	r3, #3
	bne	.L480
	ldr	r3, [sp]
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	bic	r3, r3, #127
	uxtb	r3, r3
	cmp	r3, #0
	bne	.L481
	ldr	r3, [sp]
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	and	r3, r3, #1
	uxtb	r3, r3
	cmp	r3, #0
	bne	.L481
.L480:
	ldr	r3, [sp, #4]
	add	r3, r3, #12
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrh	r3, [r3]	@ movhi
	strh	r3, [sp, #30]	@ movhi
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
	ldrh	r3, [sp, #30]
	cmp	r3, #129
	bne	.L482
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrh	r3, [r3]	@ movhi
	strh	r3, [sp, #30]	@ movhi
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
.L482:
	ldrh	r3, [sp, #30]
	cmp	r3, #129
	bne	.L483
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrh	r3, [r3]	@ movhi
	strh	r3, [sp, #30]	@ movhi
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
.L483:
	ldrh	r3, [sp, #30]
	movw	r2, #25736
	cmp	r3, r2
	bne	.L484
	ldr	r3, [sp, #4]
	add	r3, r3, #6
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrh	r3, [r3]	@ movhi
	strh	r3, [sp, #24]	@ movhi
	ldrh	r3, [sp, #24]
	cmp	r3, #8640
	beq	.L485
	ldrh	r3, [sp, #24]
	cmp	r3, #8576
	beq	.L485
	ldrh	r3, [sp, #24]
	movw	r2, #9154
	cmp	r3, r2
	beq	.L485
	ldrh	r3, [sp, #24]
	movw	r2, #22464
	cmp	r3, r2
	bne	.L486
.L485:
	mov	r3, #1
	b	.L479
.L486:
	ldrh	r3, [sp, #24]
	cmp	r3, #22272
	bne	.L487
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	add	r3, r3, #6
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrb	r3, [r3]
	strb	r3, [sp, #28]
	mov	r3, #0
	strb	r3, [sp, #29]
	ldr	r3, [sp, #4]
	add	r3, r3, #34
	str	r3, [sp, #4]
	b	.L488
.L487:
	ldrh	r3, [sp, #24]
	cmp	r3, #8448
	beq	.L489
	mov	r3, #0
	b	.L479
.L489:
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
	b	.L481
.L484:
	ldrh	r3, [sp, #30]
	movw	r2, #25480
	cmp	r3, r2
	bne	.L490
	mov	r3, #1
	b	.L479
.L490:
	ldrh	r3, [sp, #30]
	movw	r2, #1544
	cmp	r3, r2
	bne	.L491
	mov	r3, #1
	b	.L479
.L491:
	ldrh	r3, [sp, #30]
	movw	r2, #56710
	cmp	r3, r2
	bne	.L492
	ldr	r3, [sp, #4]
	add	r3, r3, #6
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrb	r3, [r3]
	strb	r3, [sp, #23]
	ldr	r3, [sp, #4]
	add	r3, r3, #34
	str	r3, [sp, #4]
	ldrb	r3, [sp, #23]	@ zero_extendqisi2
	cmp	r3, #58
	bne	.L493
	ldr	r3, [sp, #4]
	ldrb	r3, [r3]
	strb	r3, [sp, #22]
	ldrb	r3, [sp, #22]	@ zero_extendqisi2
	cmp	r3, #135
	bne	.L493
	mov	r3, #1
	b	.L479
.L493:
	ldrb	r3, [sp, #23]
	strb	r3, [sp, #28]
	ldrb	r3, [sp, #28]	@ zero_extendqisi2
	cmp	r3, #17
	bne	.L494
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	ldrh	r3, [r3]
	cmp	r3, #13568
	bne	.L494
	mov	r3, #1
	b	.L479
.L494:
	mov	r3, #0
	strb	r3, [sp, #29]
	b	.L488
.L492:
	ldrh	r3, [sp, #30]
	cmp	r3, #8
	beq	.L481
	mov	r3, #0
	b	.L479
.L481:
	ldr	r3, [sp, #4]
	ldrh	r3, [r3]	@ movhi
	strh	r3, [sp, #24]	@ movhi
	ldrh	r3, [sp, #24]
	cmp	r3, #8640
	bne	.L495
	mov	r3, #1
	b	.L479
.L495:
	ldrh	r3, [sp, #24]
	cmp	r3, #8448
	bne	.L496
	ldr	r3, [sp, #4]
	add	r3, r3, #2
	str	r3, [sp, #4]
.L496:
	ldr	r3, [sp, #4]
	ldrb	r3, [r3]
	strb	r3, [sp, #29]
	ldrb	r3, [sp, #29]	@ zero_extendqisi2
	and	r3, r3, #240
	cmp	r3, #64
	beq	.L497
	mov	r3, #0
	b	.L479
.L497:
	ldr	r3, [sp, #4]
	ldrb	r3, [r3, #9]
	strb	r3, [sp, #28]
	ldrb	r3, [sp, #28]	@ zero_extendqisi2
	cmp	r3, #17
	bne	.L498
	ldrb	r3, [sp, #29]	@ zero_extendqisi2
	and	r3, r3, #15
	mov	r3, r3, asl #2
	add	r3, r3, #2
	ldr	r2, [sp, #4]
	add	r3, r2, r3
	ldrh	r3, [r3]
	cmp	r3, #13568
	bne	.L498
	mov	r3, #1
	b	.L479
.L498:
	ldrb	r3, [sp, #28]	@ zero_extendqisi2
	cmp	r3, #2
	beq	.L499
	ldrb	r3, [sp, #28]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L488
.L499:
	mov	r3, #1
	b	.L479
.L488:
	ldrb	r3, [sp, #28]	@ zero_extendqisi2
	cmp	r3, #6
	beq	.L500
	mov	r3, #0
	b	.L479
.L500:
	ldrb	r3, [sp, #29]	@ zero_extendqisi2
	and	r3, r3, #15
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r3, r2
	str	r3, [sp, #4]
	ldr	r3, [sp, #4]
	ldrb	r3, [r3, #13]
	strb	r3, [sp, #27]
	ldrb	r3, [sp, #27]	@ zero_extendqisi2
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L501
	ldrb	r3, [sp, #27]	@ zero_extendqisi2
	and	r3, r3, #2
	cmp	r3, #0
	bne	.L501
	ldrb	r3, [sp, #27]	@ zero_extendqisi2
	and	r3, r3, #4
	cmp	r3, #0
	beq	.L502
.L501:
	mov	r3, #1
	b	.L479
.L502:
	mov	r3, #0
.L479:
	sxtb	r3, r3
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
.L504:
	.align	2
.L503:
	.word	.LC4+60
	.fnend
	.size	isPriorityPkt, .-isPriorityPkt
	.section	.rodata.str1.4
	.align	2
.LC47:
	.ascii	"%s: %s [%d]: cat a VIP packet which will send to TX"
	.ascii	"1 and queue7.\012\000"
	.text
	.align	2
	.global	qdma_get_ringIdx
	.type	qdma_get_ringIdx, %function
qdma_get_ringIdx:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	str	r3, [sp, #12]
	movw	r3, #:lower16:priPktChk
	movt	r3, #:upper16:priPktChk
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L506
	ldr	r3, [sp, #4]
	ldr	r2, [r3, #88]
	movw	r3, #:lower16:priPktChkLen
	movt	r3, #:upper16:priPktChkLen
	ldr	r3, [r3]
	cmp	r2, r3
	bcs	.L506
	ldr	r3, [sp, #4]
	ldr	r3, [r3, #484]
	mov	r0, r3
	ldr	r1, [sp]
	bl	isPriorityPkt
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r3, [sp, #12]
	cmp	r3, #1
	bne	.L506
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrb	r3, [r3, #541]	@ zero_extendqisi2
	cmp	r3, #2
	bls	.L507
	movw	r0, #:lower16:.LC47
	movt	r0, #:upper16:.LC47
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L509
	movw	r3, #2415
	bl	printk
.L507:
	mov	r3, #1
	str	r3, [sp, #12]
.L506:
	ldr	r3, [sp, #12]
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
.L510:
	.align	2
.L509:
	.word	.LC4+60
	.fnend
	.size	qdma_get_ringIdx, .-qdma_get_ringIdx
	.align	2
	.global	macResourceLimit
	.type	macResourceLimit, %function
macResourceLimit:
	.fnstart
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	ldr	r3, [sp, #8]
	mov	r2, r3, asl #2
	movw	r3, #:lower16:chnlLimit
	movt	r3, #:upper16:chnlLimit
	add	r3, r2, r3
	str	r3, [sp, #44]
	add	r3, sp, #20
	str	r3, [sp, #40]
	mov	r3, #4
	str	r3, [sp, #36]
	ldr	r3, [sp, #36]
	sub	r3, r3, #1
	cmp	r3, #7
	ldrls	pc, [pc, r3, asl #2]
	b	.L512
.L514:
	.word	.L513
	.word	.L515
	.word	.L512
	.word	.L516
	.word	.L512
	.word	.L512
	.word	.L512
	.word	.L517
.L513:
	ldr	r3, [sp, #44]
	ldrb	r3, [r3]
	uxtb	r2, r3
	ldr	r3, [sp, #40]
	strb	r2, [r3]
	b	.L529
.L515:
	ldr	r3, [sp, #44]
	ldrh	r3, [r3]	@ movhi
	uxth	r2, r3
	ldr	r3, [sp, #40]
	strh	r2, [r3]	@ movhi
	b	.L529
.L516:
	ldr	r3, [sp, #44]
	ldr	r2, [r3]
	ldr	r3, [sp, #40]
	str	r2, [r3]
	b	.L529
.L517:
	ldr	r3, [sp, #44]
	ldrd	r2, [r3]
	ldr	r1, [sp, #40]
	strd	r2, [r1]
	b	.L529
.L512:
	ldr	r3, [sp, #36]
	ldr	r1, [sp, #40]
	ldr	r2, [sp, #44]
	mov	r0, r1
	mov	r1, r2
	mov	r2, r3
	bl	memcpy
.L529:
	ldr	r3, [sp, #20]
	mov	r2, r3
	movw	r3, #:lower16:channel_limit_threshold
	movt	r3, #:upper16:channel_limit_threshold
	ldr	r3, [r3]
	cmp	r2, r3
	bcs	.L519
	ldr	r3, [sp, #8]
	mov	r2, r3, asl #3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	mov	r2, r3, asl #2
	movw	r3, #:lower16:queueLimit
	movt	r3, #:upper16:queueLimit
	add	r3, r2, r3
	str	r3, [sp, #32]
	add	r3, sp, #16
	str	r3, [sp, #28]
	mov	r3, #4
	str	r3, [sp, #24]
	ldr	r3, [sp, #24]
	sub	r3, r3, #1
	cmp	r3, #7
	ldrls	pc, [pc, r3, asl #2]
	b	.L520
.L522:
	.word	.L521
	.word	.L523
	.word	.L520
	.word	.L524
	.word	.L520
	.word	.L520
	.word	.L520
	.word	.L525
.L521:
	ldr	r3, [sp, #32]
	ldrb	r3, [r3]
	uxtb	r2, r3
	ldr	r3, [sp, #28]
	strb	r2, [r3]
	b	.L530
.L523:
	ldr	r3, [sp, #32]
	ldrh	r3, [r3]	@ movhi
	uxth	r2, r3
	ldr	r3, [sp, #28]
	strh	r2, [r3]	@ movhi
	b	.L530
.L524:
	ldr	r3, [sp, #32]
	ldr	r2, [r3]
	ldr	r3, [sp, #28]
	str	r2, [r3]
	b	.L530
.L525:
	ldr	r3, [sp, #32]
	ldrd	r2, [r3]
	ldr	r1, [sp, #28]
	strd	r2, [r1]
	b	.L530
.L520:
	ldr	r3, [sp, #24]
	ldr	r1, [sp, #28]
	ldr	r2, [sp, #32]
	mov	r0, r1
	mov	r1, r2
	mov	r2, r3
	bl	memcpy
.L530:
	ldr	r3, [sp, #16]
	mov	r2, r3
	movw	r3, #:lower16:queue_limit_threshold
	movt	r3, #:upper16:queue_limit_threshold
	ldr	r3, [r3]
	cmp	r2, r3
	bcc	.L527
.L519:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r1, [r3]
	mov	r3, r1
	add	r3, r3, #628
	ldrh	r3, [r3]
	add	r3, r3, #1
	uxth	r2, r3
	mov	r3, r1
	add	r3, r3, #628
	strh	r2, [r3]	@ movhi
	mvn	r3, #13
	b	.L528
.L527:
	mov	r3, #0
.L528:
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	macResourceLimit, .-macResourceLimit
	.section	.rodata.str1.4
	.align	2
.LC48:
	.ascii	"qdmaEnableInt Error: ParaMeter should intIdx 1~%d, "
	.ascii	"enableIdx:1~%d\012\000"
	.text
	.align	2
	.global	qdmaEnableInt
	.type	qdmaEnableInt, %function
qdmaEnableInt:
	.fnstart
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, #0
	str	r3, [sp, #52]
	ldr	r3, [sp, #4]
	cmp	r3, #0
	beq	.L532
	ldr	r3, [sp, #4]
	cmp	r3, #4
	bhi	.L532
	ldr	r3, [sp]
	cmp	r3, #0
	beq	.L532
	ldr	r3, [sp]
	cmp	r3, #2
	bls	.L533
.L532:
	movw	r0, #:lower16:.LC48
	movt	r0, #:upper16:.LC48
	mov	r1, #5
	mov	r2, #2
	bl	printk
	mvn	r3, #21
	b	.L534
.L533:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #44]
	ldr	r3, [sp, #44]
	mov	r0, r3
	bl	_raw_spin_lock_irqsave
	str	r0, [sp, #52]
	ldr	r3, [sp, #4]
	sub	r3, r3, #1
	mov	r2, r3, asl #3
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	ldr	r3, [sp]
	mov	r3, r3, asl #2
	add	r3, r2, r3
	add	r3, r3, #36
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #48]
	ldr	r3, [sp, #4]
	sub	r3, r3, #1
	mov	r2, r3, asl #3
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	ldr	r3, [sp]
	mov	r3, r3, asl #2
	add	r3, r2, r3
	add	r1, r3, #36
	ldr	r2, [sp, #48]
	ldr	r3, [sp, #8]
	orr	r3, r2, r3
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #40]
	ldr	r3, [sp, #52]
	str	r3, [sp, #36]
	ldr	r3, [sp, #40]
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	_raw_spin_unlock_irqrestore
	mov	r3, #0
.L534:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaEnableInt, .-qdmaEnableInt
	.align	2
	.global	qdmaDisableInt
	.type	qdmaDisableInt, %function
qdmaDisableInt:
	.fnstart
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, #0
	str	r3, [sp, #52]
	ldr	r3, [sp, #4]
	cmp	r3, #0
	beq	.L537
	ldr	r3, [sp, #4]
	cmp	r3, #4
	bhi	.L537
	ldr	r3, [sp]
	cmp	r3, #0
	beq	.L537
	ldr	r3, [sp]
	cmp	r3, #2
	bls	.L538
.L537:
	movw	r0, #:lower16:.LC48
	movt	r0, #:upper16:.LC48
	mov	r1, #5
	mov	r2, #2
	bl	printk
	mvn	r3, #21
	b	.L539
.L538:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #44]
	ldr	r3, [sp, #44]
	mov	r0, r3
	bl	_raw_spin_lock_irqsave
	str	r0, [sp, #52]
	ldr	r3, [sp, #4]
	sub	r3, r3, #1
	mov	r2, r3, asl #3
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	ldr	r3, [sp]
	mov	r3, r3, asl #2
	add	r3, r2, r3
	add	r3, r3, #36
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #48]
	ldr	r3, [sp, #4]
	sub	r3, r3, #1
	mov	r2, r3, asl #3
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	ldr	r3, [sp]
	mov	r3, r3, asl #2
	add	r3, r2, r3
	add	r1, r3, #36
	ldr	r3, [sp, #8]
	mvn	r2, r3
	ldr	r3, [sp, #48]
	and	r3, r3, r2
	mov	r0, r1
	mov	r1, r3
	bl	set_frame_engine_data
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #40]
	ldr	r3, [sp, #52]
	str	r3, [sp, #36]
	ldr	r3, [sp, #40]
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	_raw_spin_unlock_irqrestore
	mov	r3, #0
.L539:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaDisableInt, .-qdmaDisableInt
	.align	2
	.global	qdmaSetIntMask
	.type	qdmaSetIntMask, %function
qdmaSetIntMask:
	.fnstart
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #52
	sub	sp, sp, #52
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, #0
	str	r3, [sp, #44]
	ldr	r3, [sp, #8]
	cmp	r3, #0
	beq	.L542
	ldr	r3, [sp, #8]
	cmp	r3, #4
	bhi	.L542
	ldr	r3, [sp, #4]
	cmp	r3, #0
	beq	.L542
	ldr	r3, [sp, #4]
	cmp	r3, #2
	bls	.L543
.L542:
	movw	r0, #:lower16:.LC48
	movt	r0, #:upper16:.LC48
	mov	r1, #5
	mov	r2, #2
	bl	printk
	mvn	r3, #21
	b	.L544
.L543:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #40]
	ldr	r3, [sp, #40]
	mov	r0, r3
	bl	_raw_spin_lock_irqsave
	str	r0, [sp, #44]
	ldr	r3, [sp, #8]
	sub	r3, r3, #1
	mov	r2, r3, asl #3
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	ldr	r3, [sp, #4]
	mov	r3, r3, asl #2
	add	r3, r2, r3
	add	r3, r3, #36
	mov	r0, r3
	ldr	r1, [sp]
	bl	set_frame_engine_data
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #36]
	ldr	r3, [sp, #44]
	str	r3, [sp, #32]
	ldr	r3, [sp, #36]
	mov	r0, r3
	ldr	r1, [sp, #32]
	bl	_raw_spin_unlock_irqrestore
	mov	r3, #0
.L544:
	mov	r0, r3
	add	sp, sp, #52
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaSetIntMask, .-qdmaSetIntMask
	.align	2
	.global	qdmaGetIntMask
	.type	qdmaGetIntMask, %function
qdmaGetIntMask:
	.fnstart
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #60
	sub	sp, sp, #60
	str	r0, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #52]
	mov	r3, #0
	str	r3, [sp, #48]
	ldr	r3, [sp, #8]
	cmp	r3, #0
	beq	.L547
	ldr	r3, [sp, #8]
	cmp	r3, #4
	bhi	.L547
	ldr	r3, [sp, #4]
	cmp	r3, #0
	beq	.L547
	ldr	r3, [sp, #4]
	cmp	r3, #2
	bls	.L548
.L547:
	movw	r0, #:lower16:.LC48
	movt	r0, #:upper16:.LC48
	mov	r1, #5
	mov	r2, #2
	bl	printk
	mvn	r3, #21
	b	.L549
.L548:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #44]
	ldr	r3, [sp, #44]
	mov	r0, r3
	bl	_raw_spin_lock_irqsave
	str	r0, [sp, #52]
	ldr	r3, [sp, #8]
	sub	r3, r3, #1
	mov	r2, r3, asl #3
	ldr	r3, [sp, #12]
	add	r2, r2, r3
	ldr	r3, [sp, #4]
	mov	r3, r3, asl #2
	add	r3, r2, r3
	add	r3, r3, #36
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #48]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #36
	str	r3, [sp, #40]
	ldr	r3, [sp, #52]
	str	r3, [sp, #36]
	ldr	r3, [sp, #40]
	mov	r0, r3
	ldr	r1, [sp, #36]
	bl	_raw_spin_unlock_irqrestore
	ldr	r3, [sp, #48]
.L549:
	mov	r0, r3
	add	sp, sp, #60
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdmaGetIntMask, .-qdmaGetIntMask
	.section	.rodata.str1.4
	.align	2
.LC49:
	.ascii	"%s: %s [%d]: error INT index! \015\012\000"
	.text
	.align	2
	.global	qdmaSetIntBind
	.type	qdmaSetIntBind, %function
qdmaSetIntBind:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	str	r3, [sp, #20]
	mov	r3, #0
	str	r3, [sp, #16]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, [sp]
	sub	r3, r3, #1
	cmp	r3, #3
	ldrls	pc, [pc, r3, asl #2]
	b	.L552
.L554:
	.word	.L553
	.word	.L555
	.word	.L556
	.word	.L557
.L553:
	movw	r3, #:lower16:int1_rx_ring
	movt	r3, #:upper16:int1_rx_ring
	ldr	r3, [r3]
	mov	r3, r3, asl #16
	orr	r3, r3, #65280
	orr	r3, r3, #3
	str	r3, [sp, #16]
	movw	r3, #:lower16:int1_rx_ring
	movt	r3, #:upper16:int1_rx_ring
	ldr	r3, [r3]
	mov	r2, r3, asl #16
	movw	r3, #:lower16:int1_rx_ring
	movt	r3, #:upper16:int1_rx_ring
	ldr	r3, [r3]
	orr	r3, r2, r3
	str	r3, [sp, #12]
	ldr	r0, [sp, #4]
	mov	r1, #1
	mov	r2, #1
	ldr	r3, [sp, #16]
	bl	qdmaSetIntMask
	ldr	r0, [sp, #4]
	mov	r1, #1
	mov	r2, #2
	ldr	r3, [sp, #12]
	bl	qdmaSetIntMask
	b	.L558
.L555:
	movw	r3, #:lower16:int2_rx_ring
	movt	r3, #:upper16:int2_rx_ring
	ldr	r3, [r3]
	mov	r3, r3, asl #16
	str	r3, [sp, #16]
	movw	r3, #:lower16:int2_rx_ring
	movt	r3, #:upper16:int2_rx_ring
	ldr	r3, [r3]
	mov	r2, r3, asl #16
	movw	r3, #:lower16:int2_rx_ring
	movt	r3, #:upper16:int2_rx_ring
	ldr	r3, [r3]
	orr	r3, r2, r3
	str	r3, [sp, #12]
	ldr	r0, [sp, #4]
	mov	r1, #2
	mov	r2, #1
	ldr	r3, [sp, #16]
	bl	qdmaSetIntMask
	ldr	r0, [sp, #4]
	mov	r1, #2
	mov	r2, #2
	ldr	r3, [sp, #12]
	bl	qdmaSetIntMask
	b	.L558
.L556:
	movw	r3, #:lower16:int3_rx_ring
	movt	r3, #:upper16:int3_rx_ring
	ldr	r3, [r3]
	mov	r3, r3, asl #16
	str	r3, [sp, #16]
	movw	r3, #:lower16:int3_rx_ring
	movt	r3, #:upper16:int3_rx_ring
	ldr	r3, [r3]
	mov	r2, r3, asl #16
	movw	r3, #:lower16:int3_rx_ring
	movt	r3, #:upper16:int3_rx_ring
	ldr	r3, [r3]
	orr	r3, r2, r3
	str	r3, [sp, #12]
	ldr	r0, [sp, #4]
	mov	r1, #3
	mov	r2, #1
	ldr	r3, [sp, #16]
	bl	qdmaSetIntMask
	ldr	r0, [sp, #4]
	mov	r1, #3
	mov	r2, #2
	ldr	r3, [sp, #12]
	bl	qdmaSetIntMask
	b	.L558
.L557:
	movw	r3, #:lower16:int4_rx_ring
	movt	r3, #:upper16:int4_rx_ring
	ldr	r3, [r3]
	mov	r3, r3, asl #16
	str	r3, [sp, #16]
	movw	r3, #:lower16:int4_rx_ring
	movt	r3, #:upper16:int4_rx_ring
	ldr	r3, [r3]
	mov	r2, r3, asl #16
	movw	r3, #:lower16:int4_rx_ring
	movt	r3, #:upper16:int4_rx_ring
	ldr	r3, [r3]
	orr	r3, r2, r3
	str	r3, [sp, #12]
	ldr	r0, [sp, #4]
	mov	r1, #4
	mov	r2, #1
	ldr	r3, [sp, #16]
	bl	qdmaSetIntMask
	ldr	r0, [sp, #4]
	mov	r1, #4
	mov	r2, #2
	ldr	r3, [sp, #12]
	bl	qdmaSetIntMask
	b	.L558
.L552:
	movw	r0, #:lower16:.LC49
	movt	r0, #:upper16:.LC49
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L560
	movw	r3, #2737
	bl	printk
	mov	r0, r0	@ nop
.L558:
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
.L561:
	.align	2
.L560:
	.word	.LC4+60
	.fnend
	.size	qdmaSetIntBind, .-qdmaSetIntBind
	.section	.rodata.str1.4
	.align	2
.LC50:
	.ascii	"%s: %s [%d]: error IRQ index! \015\012\000"
	.text
	.align	2
	.global	qdmaSetIrqBind
	.type	qdmaSetIrqBind, %function
qdmaSetIrqBind:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #4]
	str	r1, [sp]
	mov	r3, #0
	str	r3, [sp, #20]
	ldr	r3, [sp]
	cmp	r3, #1
	beq	.L564
	cmp	r3, #2
	beq	.L565
	b	.L574
.L564:
	mov	r3, #0
	str	r3, [sp, #20]
	b	.L566
.L568:
	ldr	r3, [sp, #20]
	mov	r2, #1
	mov	r3, r2, asl r3
	mov	r2, r3
	movw	r3, #:lower16:irq_tx_ring
	movt	r3, #:upper16:irq_tx_ring
	ldr	r3, [r3]
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L567
	ldr	r3, [sp, #20]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r3, r3, #260
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r3, [sp, #20]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r2, r3, #260
	ldr	r3, [sp, #16]
	bic	r3, r3, #16
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L567:
	ldr	r3, [sp, #20]
	add	r3, r3, #1
	str	r3, [sp, #20]
.L566:
	ldr	r3, [sp, #20]
	cmp	r3, #7
	bls	.L568
	b	.L569
.L565:
	mov	r3, #0
	str	r3, [sp, #20]
	b	.L570
.L572:
	ldr	r3, [sp, #20]
	mov	r2, #1
	mov	r3, r2, asl r3
	mov	r2, r3
	movw	r3, #:lower16:irq_tx_ring
	movt	r3, #:upper16:irq_tx_ring
	ldr	r3, [r3]
	and	r3, r3, r2
	cmp	r3, #0
	beq	.L571
	ldr	r3, [sp, #20]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r3, r3, #260
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r3, [sp, #20]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r2, r3, #260
	ldr	r3, [sp, #12]
	orr	r3, r3, #16
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L571:
	ldr	r3, [sp, #20]
	add	r3, r3, #1
	str	r3, [sp, #20]
.L570:
	ldr	r3, [sp, #20]
	cmp	r3, #7
	bls	.L572
	b	.L569
.L574:
	movw	r0, #:lower16:.LC50
	movt	r0, #:upper16:.LC50
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L575
	movw	r3, #2772
	bl	printk
	mov	r0, r0	@ nop
.L569:
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
.L576:
	.align	2
.L575:
	.word	.LC4+60
	.fnend
	.size	qdmaSetIrqBind, .-qdmaSetIrqBind
	.section	.rodata.str1.4
	.align	2
.LC51:
	.ascii	"%04x: dma busy register is 0x%08x\015\012\000"
	.align	2
.LC52:
	.ascii	"\015\012tx_busy enable cnt is %d, rx_busy enable cn"
	.ascii	"t is %d\015\012\000"
	.text
	.align	2
	.global	qdma_dma_busy_timer
	.type	qdma_dma_busy_timer, %function
qdma_dma_busy_timer:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #12]
	ldr	r3, [sp, #12]
	add	r3, r3, #4
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	movw	r3, #:lower16:dma_busy_round_cnt
	movt	r3, #:upper16:dma_busy_round_cnt
	ldr	r3, [r3]
	movw	r0, #:lower16:.LC51
	movt	r0, #:upper16:.LC51
	mov	r1, r3
	ldr	r2, [sp, #8]
	bl	printk
	movw	r3, #:lower16:dma_busy_expires
	movt	r3, #:upper16:dma_busy_expires
	ldr	r3, [r3]
	movw	r0, #:lower16:dma_busy_timer
	movt	r0, #:upper16:dma_busy_timer
	mov	r1, r3
	bl	set_timer_expires
	movw	r3, #:lower16:dma_busy_timer
	movt	r3, #:upper16:dma_busy_timer
	movw	r2, #:lower16:qdma_dma_busy_timer
	movt	r2, #:upper16:qdma_dma_busy_timer
	str	r2, [r3, #12]
	ldr	r3, [sp, #8]
	and	r3, r3, #2
	cmp	r3, #0
	beq	.L578
	movw	r3, #:lower16:tx_dma_busy_enable_cnt
	movt	r3, #:upper16:tx_dma_busy_enable_cnt
	ldr	r3, [r3]
	add	r2, r3, #1
	movw	r3, #:lower16:tx_dma_busy_enable_cnt
	movt	r3, #:upper16:tx_dma_busy_enable_cnt
	str	r2, [r3]
.L578:
	ldr	r3, [sp, #8]
	and	r3, r3, #8
	cmp	r3, #0
	beq	.L579
	movw	r3, #:lower16:rx_dma_busy_enable_cnt
	movt	r3, #:upper16:rx_dma_busy_enable_cnt
	ldr	r3, [r3]
	add	r2, r3, #1
	movw	r3, #:lower16:rx_dma_busy_enable_cnt
	movt	r3, #:upper16:rx_dma_busy_enable_cnt
	str	r2, [r3]
.L579:
	movw	r3, #:lower16:dma_busy_round_cnt
	movt	r3, #:upper16:dma_busy_round_cnt
	ldr	r2, [r3]
	sub	r1, r2, #1
	movw	r3, #:lower16:dma_busy_round_cnt
	movt	r3, #:upper16:dma_busy_round_cnt
	str	r1, [r3]
	cmp	r2, #0
	beq	.L580
	movw	r3, #:lower16:dma_busy_timer
	movt	r3, #:upper16:dma_busy_timer
	ldr	r2, [r3, #16]
	mov	r3, r2
	mov	r3, r3, asl #2
	add	r3, r3, r2
	mov	r2, r3, asl #2
	add	r3, r3, r2
	mov	r3, r3, asl #2
	mov	r2, r3
	movw	r3, #19923
	movt	r3, 4194
	umull	r2, r3, r2, r3
	mov	r2, r3, lsr #6
	movw	r3, #:lower16:jiffies
	movt	r3, #:upper16:jiffies
	ldr	r3, [r3]
	add	r3, r2, r3
	movw	r0, #:lower16:dma_busy_timer
	movt	r0, #:upper16:dma_busy_timer
	mov	r1, r3
	bl	mod_timer
	b	.L577
.L580:
	movw	r3, #:lower16:tx_dma_busy_enable_cnt
	movt	r3, #:upper16:tx_dma_busy_enable_cnt
	ldr	r2, [r3]
	movw	r3, #:lower16:rx_dma_busy_enable_cnt
	movt	r3, #:upper16:rx_dma_busy_enable_cnt
	ldr	r3, [r3]
	movw	r0, #:lower16:.LC52
	movt	r0, #:upper16:.LC52
	mov	r1, r2
	mov	r2, r3
	bl	printk
.L577:
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dma_busy_timer, .-qdma_dma_busy_timer
	.align	2
	.global	qdma_trigger_timer
	.type	qdma_trigger_timer, %function
qdma_trigger_timer:
	.fnstart
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #68
	sub	sp, sp, #68
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #60]
	movw	r3, #:lower16:trigger_timer_going
	movt	r3, #:upper16:trigger_timer_going
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L582
	mov	r3, #0
	strb	r3, [sp, #8]
	mov	r3, #0
	str	r3, [sp, #12]
	mov	r3, #0
	str	r3, [sp, #60]
	b	.L585
.L586:
	bl	random32
	mov	r2, r0
	movw	r3, #46339
	movt	r3, 42366
	smull	r0, r1, r2, r3
	add	r3, r2, r1
	mov	r1, r3, asr #6
	mov	r3, r2, asr #31
	rsb	r1, r3, r1
	mov	r3, r1
	mov	r3, r3, asl #1
	add	r3, r3, r1
	mov	r1, r3, asl #5
	add	r3, r3, r1
	rsb	r1, r3, r2
	uxth	r3, r1
	add	r3, r3, #1
	uxth	r2, r3
	ldr	r3, [sp, #60]
	add	r3, r3, #4
	mov	r3, r3, asl #1
	add	r1, sp, #64
	add	r3, r1, r3
	sub	r3, r3, #56
	strh	r2, [r3]	@ movhi
	ldr	r3, [sp, #60]
	add	r3, r3, #1
	str	r3, [sp, #60]
.L585:
	ldr	r3, [sp, #60]
	cmp	r3, #7
	ble	.L586
	add	r3, sp, #8
	str	r3, [sp, #48]
	add	r3, sp, #32
	mov	r0, r3
	bl	qdma_set_tx_qos
	movw	r3, #:lower16:trigger_expires
	movt	r3, #:upper16:trigger_expires
	ldr	r3, [r3]
	movw	r0, #:lower16:trigger_timer
	movt	r0, #:upper16:trigger_timer
	mov	r1, r3
	bl	set_timer_expires
	movw	r3, #:lower16:trigger_timer
	movt	r3, #:upper16:trigger_timer
	movw	r2, #:lower16:qdma_trigger_timer
	movt	r2, #:upper16:qdma_trigger_timer
	str	r2, [r3, #12]
	movw	r3, #:lower16:trigger_timer
	movt	r3, #:upper16:trigger_timer
	ldr	r2, [r3, #16]
	mov	r3, r2
	mov	r3, r3, asl #2
	add	r3, r3, r2
	mov	r2, r3, asl #2
	add	r3, r3, r2
	mov	r3, r3, asl #2
	mov	r2, r3
	movw	r3, #19923
	movt	r3, 4194
	umull	r2, r3, r2, r3
	mov	r2, r3, lsr #6
	movw	r3, #:lower16:jiffies
	movt	r3, #:upper16:jiffies
	ldr	r3, [r3]
	add	r3, r2, r3
	movw	r0, #:lower16:trigger_timer
	movt	r0, #:upper16:trigger_timer
	mov	r1, r3
	bl	mod_timer
.L582:
	add	sp, sp, #68
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_trigger_timer, .-qdma_trigger_timer
	.section	.rodata.str1.4
	.align	2
.LC53:
	.ascii	"\015\012%04x: qdma_reg_value[%x]: 0x%08x\000"
	.text
	.align	2
	.global	qdma_reg_polling_timer
	.type	qdma_reg_polling_timer, %function
qdma_reg_polling_timer:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #12]
	movw	r3, #:lower16:reg_polling_offset
	movt	r3, #:upper16:reg_polling_offset
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r3, [sp, #12]
	add	r3, r2, r3
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	movw	r3, #:lower16:reg_polling_expires
	movt	r3, #:upper16:reg_polling_expires
	ldr	r3, [r3]
	movw	r0, #:lower16:reg_polling_timer
	movt	r0, #:upper16:reg_polling_timer
	mov	r1, r3
	bl	set_timer_expires
	movw	r3, #:lower16:reg_polling_timer
	movt	r3, #:upper16:reg_polling_timer
	movw	r2, #:lower16:qdma_reg_polling_timer
	movt	r2, #:upper16:qdma_reg_polling_timer
	str	r2, [r3, #12]
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r2, [r3]
	add	r1, r2, #1
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	str	r1, [r3]
	movw	r3, #:lower16:qdmaRegValBuff
	movt	r3, #:upper16:qdmaRegValBuff
	ldr	r1, [sp, #8]
	str	r1, [r3, r2, asl #2]
	movw	r3, #:lower16:reg_polling_round_cnt
	movt	r3, #:upper16:reg_polling_round_cnt
	ldr	r3, [r3]
	sub	r2, r3, #1
	movw	r3, #:lower16:reg_polling_round_cnt
	movt	r3, #:upper16:reg_polling_round_cnt
	str	r2, [r3]
	movw	r3, #:lower16:reg_polling_round_cnt
	movt	r3, #:upper16:reg_polling_round_cnt
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L588
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	cmp	r3, #100
	bne	.L589
	b	.L590
.L591:
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	sub	r2, r3, #1
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	str	r2, [r3]
	movw	r3, #:lower16:reg_polling_round_cnt
	movt	r3, #:upper16:reg_polling_round_cnt
	ldr	r2, [r3]
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	add	r1, r2, r3
	movw	r3, #:lower16:reg_polling_offset
	movt	r3, #:upper16:reg_polling_offset
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r3, [sp, #12]
	add	ip, r2, r3
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r2, [r3]
	movw	r3, #:lower16:qdmaRegValBuff
	movt	r3, #:upper16:qdmaRegValBuff
	ldr	r3, [r3, r2, asl #2]
	movw	r0, #:lower16:.LC53
	movt	r0, #:upper16:.LC53
	mov	r2, ip
	bl	printk
.L590:
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	cmp	r3, #0
	bgt	.L591
.L589:
	movw	r3, #:lower16:reg_polling_timer
	movt	r3, #:upper16:reg_polling_timer
	ldr	r2, [r3, #16]
	mov	r3, r2
	mov	r3, r3, asl #2
	add	r3, r3, r2
	mov	r2, r3, asl #2
	add	r3, r3, r2
	mov	r3, r3, asl #2
	mov	r2, r3
	movw	r3, #19923
	movt	r3, 4194
	umull	r2, r3, r2, r3
	mov	r2, r3, lsr #6
	movw	r3, #:lower16:jiffies
	movt	r3, #:upper16:jiffies
	ldr	r3, [r3]
	add	r3, r2, r3
	movw	r0, #:lower16:reg_polling_timer
	movt	r0, #:upper16:reg_polling_timer
	mov	r1, r3
	bl	mod_timer
	b	.L587
.L588:
	b	.L593
.L594:
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	sub	r2, r3, #1
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	str	r2, [r3]
	movw	r3, #:lower16:reg_polling_round_cnt
	movt	r3, #:upper16:reg_polling_round_cnt
	ldr	r2, [r3]
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	add	r1, r2, r3
	movw	r3, #:lower16:reg_polling_offset
	movt	r3, #:upper16:reg_polling_offset
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r3, [sp, #12]
	add	ip, r2, r3
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r2, [r3]
	movw	r3, #:lower16:qdmaRegValBuff
	movt	r3, #:upper16:qdmaRegValBuff
	ldr	r3, [r3, r2, asl #2]
	movw	r0, #:lower16:.LC53
	movt	r0, #:upper16:.LC53
	mov	r2, ip
	bl	printk
.L593:
	movw	r3, #:lower16:i.52204
	movt	r3, #:upper16:i.52204
	ldr	r3, [r3]
	cmp	r3, #0
	bgt	.L594
.L587:
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_reg_polling_timer, .-qdma_reg_polling_timer
	.section	.rodata.str1.4
	.align	2
.LC54:
	.ascii	"%s: %s [%d]: qdma_ioctl: NULL, function_id=0x%x\012"
	.ascii	"\000"
	.text
	.align	2
	.type	qdma_ioctl, %function
qdma_ioctl:
	.fnstart
	@ args = 0, pretend = 0, frame = 6416
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, lr}
	.save {r4, lr}
	.pad #6400
	sub	sp, sp, #6400
	.pad #24
	sub	sp, sp, #24
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r0, [r3, #-2308]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r1, [r3, #-2312]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-2316]
	mov	r3, #0
	add	r2, sp, #6400
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #600
	add	r2, sp, #6400
	add	r2, r2, #16
	str	r3, [r2]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	add	r2, sp, #6400
	add	r2, r2, #12
	str	r3, [r2]
	mov	r3, #28
	add	r2, sp, #6400
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6400
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6400
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6400
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6400
	str	r2, [r3]
	add	r3, sp, #6400
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L597
	add	r3, sp, #6400
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6400
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6400
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #6336
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #6336
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6336
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #6336
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #6336
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #6336
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #6336
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6336
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6400
	add	r2, r2, #8
	str	r3, [r2]
	b	.L602
.L597:
	add	r3, sp, #6400
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6400
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L602
	add	r3, sp, #6336
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #6336
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L602:
	add	r3, sp, #6400
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L605
	mvn	r3, #13
	b	.L1554
.L605:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1728]
	sub	r3, r3, #13
	cmp	r3, #141
	ldrls	pc, [pc, r3, asl #2]
	b	.L1555
.L609:
	.word	.L608
	.word	.L608
	.word	.L610
	.word	.L610
	.word	.L1555
	.word	.L611
	.word	.L611
	.word	.L612
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L613
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L614
	.word	.L614
	.word	.L1555
	.word	.L615
	.word	.L615
	.word	.L616
	.word	.L616
	.word	.L617
	.word	.L617
	.word	.L1555
	.word	.L1555
	.word	.L618
	.word	.L618
	.word	.L1555
	.word	.L1555
	.word	.L619
	.word	.L620
	.word	.L620
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L621
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L622
	.word	.L1555
	.word	.L623
	.word	.L1555
	.word	.L624
	.word	.L1555
	.word	.L625
	.word	.L1555
	.word	.L626
	.word	.L627
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L628
	.word	.L628
	.word	.L629
	.word	.L629
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L630
	.word	.L630
	.word	.L631
	.word	.L631
	.word	.L632
	.word	.L632
	.word	.L632
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L633
	.word	.L633
	.word	.L634
	.word	.L634
	.word	.L634
	.word	.L635
	.word	.L635
	.word	.L636
	.word	.L637
	.word	.L638
	.word	.L638
	.word	.L638
	.word	.L638
	.word	.L638
	.word	.L639
	.word	.L639
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L1555
	.word	.L640
	.word	.L640
	.word	.L641
	.word	.L641
	.word	.L642
	.word	.L642
	.word	.L643
	.word	.L643
	.word	.L644
	.word	.L644
	.word	.L645
	.word	.L646
.L608:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1712]
	add	r3, sp, #600
	sub	r3, r3, #24
	add	r1, sp, #6336
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #6336
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #24
	add	r2, sp, #6336
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6336
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6336
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6336
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6336
	str	r2, [r3]
	add	r3, sp, #6336
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L648
	add	r3, sp, #6336
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #6272
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #6272
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6272
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #6272
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #6272
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #6272
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #6272
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6272
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6336
	add	r2, r2, #8
	str	r3, [r2]
	b	.L653
.L648:
	add	r3, sp, #6336
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6336
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L653
	add	r3, sp, #6272
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #6272
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L653:
	add	r3, sp, #6336
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L656
	mvn	r3, #13
	b	.L1554
.L656:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	sub	r3, r3, #24
	str	r3, [r2, #-1712]
	b	.L657
.L610:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #216
	sub	r3, r3, #48
	add	r1, sp, #6272
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #6272
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #6272
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6272
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6272
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6272
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6272
	str	r2, [r3]
	add	r3, sp, #6272
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L659
	add	r3, sp, #6272
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #6208
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #6208
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6208
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #6208
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #6208
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #6208
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #6208
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6208
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6272
	add	r2, r2, #8
	str	r3, [r2]
	b	.L664
.L659:
	add	r3, sp, #6272
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6272
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L664
	add	r3, sp, #6208
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #6208
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L664:
	add	r3, sp, #6272
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L667
	mvn	r3, #13
	b	.L1554
.L667:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #216
	sub	r3, r3, #48
	str	r3, [r2, #-1720]
	b	.L657
.L611:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #216
	sub	r3, r3, #56
	add	r1, sp, #6208
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #6208
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #6208
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6208
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6208
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6208
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6208
	str	r2, [r3]
	add	r3, sp, #6208
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L669
	add	r3, sp, #6208
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #6144
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #6144
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6144
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #6144
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #6144
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #6144
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #6144
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6144
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6208
	add	r2, r2, #8
	str	r3, [r2]
	b	.L674
.L669:
	add	r3, sp, #6208
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6208
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L674
	add	r3, sp, #6144
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #6144
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L674:
	add	r3, sp, #6208
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L677
	mvn	r3, #13
	b	.L1554
.L677:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #216
	sub	r3, r3, #56
	str	r3, [r2, #-1720]
	b	.L657
.L612:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #152
	sub	r3, r3, #4
	add	r1, sp, #6144
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #6144
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #12
	add	r2, sp, #6144
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6144
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6144
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6144
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6144
	str	r2, [r3]
	add	r3, sp, #6144
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L679
	add	r3, sp, #6144
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #6080
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #6080
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6080
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #6080
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #6080
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #6080
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #6080
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6080
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6144
	add	r2, r2, #8
	str	r3, [r2]
	b	.L684
.L679:
	add	r3, sp, #6144
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6144
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L684
	add	r3, sp, #6080
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #6080
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L684:
	add	r3, sp, #6144
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L687
	mvn	r3, #13
	b	.L1554
.L687:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #152
	sub	r3, r3, #4
	str	r3, [r2, #-1720]
	b	.L657
.L614:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #280
	sub	r3, r3, #20
	add	r1, sp, #6080
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #6080
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #4
	add	r2, sp, #6080
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6080
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6080
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6080
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6080
	str	r2, [r3]
	add	r3, sp, #6080
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L689
	add	r3, sp, #6080
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #6016
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #6016
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6016
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #6016
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #6016
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #6016
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #6016
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #6016
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6080
	add	r2, r2, #8
	str	r3, [r2]
	b	.L694
.L689:
	add	r3, sp, #6080
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6080
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L694
	add	r3, sp, #6016
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #6016
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L694:
	add	r3, sp, #6080
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L697
	mvn	r3, #13
	b	.L1554
.L697:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #280
	sub	r3, r3, #20
	str	r3, [r2, #-1720]
	b	.L657
.L615:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #280
	sub	r3, r3, #28
	add	r1, sp, #6016
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #6016
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #6016
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #6016
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #6016
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #6016
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #6016
	str	r2, [r3]
	add	r3, sp, #6016
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L699
	add	r3, sp, #6016
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5952
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5952
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5952
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5952
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5952
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5952
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5952
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5952
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #6016
	add	r2, r2, #8
	str	r3, [r2]
	b	.L704
.L699:
	add	r3, sp, #6016
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #6016
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L704
	add	r3, sp, #5952
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5952
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L704:
	add	r3, sp, #6016
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L707
	mvn	r3, #13
	b	.L1554
.L707:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #280
	sub	r3, r3, #28
	str	r3, [r2, #-1720]
	b	.L657
.L616:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #280
	sub	r3, r3, #36
	add	r1, sp, #5952
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5952
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #5952
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5952
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5952
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5952
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5952
	str	r2, [r3]
	add	r3, sp, #5952
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L709
	add	r3, sp, #5952
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5888
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5888
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5888
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5888
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5888
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5888
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5888
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5888
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5952
	add	r2, r2, #8
	str	r3, [r2]
	b	.L714
.L709:
	add	r3, sp, #5952
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5952
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L714
	add	r3, sp, #5888
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5888
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L714:
	add	r3, sp, #5952
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L717
	mvn	r3, #13
	b	.L1554
.L717:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #280
	sub	r3, r3, #36
	str	r3, [r2, #-1720]
	b	.L657
.L617:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #280
	sub	r3, r3, #56
	add	r1, sp, #5888
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5888
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #20
	add	r2, sp, #5888
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5888
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5888
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5888
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5888
	str	r2, [r3]
	add	r3, sp, #5888
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L719
	add	r3, sp, #5888
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5824
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5824
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5824
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5824
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5824
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5824
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5824
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5824
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5888
	add	r2, r2, #8
	str	r3, [r2]
	b	.L724
.L719:
	add	r3, sp, #5888
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5888
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L724
	add	r3, sp, #5824
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5824
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L724:
	add	r3, sp, #5888
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L727
	mvn	r3, #13
	b	.L1554
.L727:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #280
	sub	r3, r3, #56
	str	r3, [r2, #-1720]
	b	.L657
.L618:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #280
	sub	r3, r3, #16
	add	r1, sp, #5824
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5824
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #64
	add	r2, sp, #5824
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5824
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5824
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5824
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5824
	str	r2, [r3]
	add	r3, sp, #5824
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L729
	add	r3, sp, #5824
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5760
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5760
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5760
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5760
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5760
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5760
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5760
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5760
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5824
	add	r2, r2, #8
	str	r3, [r2]
	b	.L734
.L729:
	add	r3, sp, #5824
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5824
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L734
	add	r3, sp, #5760
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5760
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L734:
	add	r3, sp, #5824
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L737
	mvn	r3, #13
	b	.L1554
.L737:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #280
	sub	r3, r3, #16
	str	r3, [r2, #-1720]
	b	.L657
.L613:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #152
	sub	r3, r3, #16
	add	r1, sp, #5760
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5760
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #12
	add	r2, sp, #5760
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5760
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5760
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5760
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5760
	str	r2, [r3]
	add	r3, sp, #5760
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L739
	add	r3, sp, #5760
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5696
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5696
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5696
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5696
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5696
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5696
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5696
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5696
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5760
	add	r2, r2, #8
	str	r3, [r2]
	b	.L744
.L739:
	add	r3, sp, #5760
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5760
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L744
	add	r3, sp, #5696
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5696
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L744:
	add	r3, sp, #5760
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L747
	mvn	r3, #13
	b	.L1554
.L747:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #152
	sub	r3, r3, #16
	str	r3, [r2, #-1720]
	b	.L657
.L619:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #216
	sub	r3, r3, #20
	add	r1, sp, #5696
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5696
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #16
	add	r2, sp, #5696
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5696
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5696
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5696
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5696
	str	r2, [r3]
	add	r3, sp, #5696
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L749
	add	r3, sp, #5696
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5632
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5632
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5632
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5632
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5632
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5632
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5632
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5632
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5696
	add	r2, r2, #8
	str	r3, [r2]
	b	.L754
.L749:
	add	r3, sp, #5696
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5696
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L754
	add	r3, sp, #5632
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5632
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L754:
	add	r3, sp, #5696
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L757
	mvn	r3, #13
	b	.L1554
.L757:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #216
	sub	r3, r3, #20
	str	r3, [r2, #-1720]
	b	.L657
.L620:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #216
	sub	r3, r3, #4
	add	r1, sp, #5632
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5632
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #12
	add	r2, sp, #5632
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5632
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5632
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5632
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5632
	str	r2, [r3]
	add	r3, sp, #5632
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L759
	add	r3, sp, #5632
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5568
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5568
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5568
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5568
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5568
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5568
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5568
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5568
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5632
	add	r2, r2, #8
	str	r3, [r2]
	b	.L764
.L759:
	add	r3, sp, #5632
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5632
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L764
	add	r3, sp, #5568
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5568
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L764:
	add	r3, sp, #5632
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L767
	mvn	r3, #13
	b	.L1554
.L767:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #216
	sub	r3, r3, #4
	str	r3, [r2, #-1720]
	b	.L657
.L621:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #152
	sub	r3, r3, #28
	add	r1, sp, #5568
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5568
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #12
	add	r2, sp, #5568
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5568
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5568
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5568
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5568
	str	r2, [r3]
	add	r3, sp, #5568
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L769
	add	r3, sp, #5568
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5504
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5504
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5504
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5504
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5504
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5504
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5504
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5504
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5568
	add	r2, r2, #8
	str	r3, [r2]
	b	.L774
.L769:
	add	r3, sp, #5568
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5568
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L774
	add	r3, sp, #5504
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5504
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L774:
	add	r3, sp, #5568
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L777
	mvn	r3, #13
	b	.L1554
.L777:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #152
	sub	r3, r3, #28
	str	r3, [r2, #-1720]
	b	.L657
.L622:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #152
	sub	r3, r3, #36
	add	r1, sp, #5504
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5504
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #5504
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5504
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5504
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5504
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5504
	str	r2, [r3]
	add	r3, sp, #5504
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L779
	add	r3, sp, #5504
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5440
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5440
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5440
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5440
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5440
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5440
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5440
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5440
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5504
	add	r2, r2, #8
	str	r3, [r2]
	b	.L784
.L779:
	add	r3, sp, #5504
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5504
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L784
	add	r3, sp, #5440
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5440
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L784:
	add	r3, sp, #5504
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L787
	mvn	r3, #13
	b	.L1554
.L787:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #152
	sub	r3, r3, #36
	str	r3, [r2, #-1720]
	b	.L657
.L623:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #152
	sub	r3, r3, #44
	add	r1, sp, #5440
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5440
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #5440
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5440
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5440
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5440
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5440
	str	r2, [r3]
	add	r3, sp, #5440
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L789
	add	r3, sp, #5440
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5376
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5376
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5376
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5376
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5376
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5376
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5376
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5376
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5440
	add	r2, r2, #8
	str	r3, [r2]
	b	.L794
.L789:
	add	r3, sp, #5440
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5440
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L794
	add	r3, sp, #5376
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5376
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L794:
	add	r3, sp, #5440
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L797
	mvn	r3, #13
	b	.L1554
.L797:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #152
	sub	r3, r3, #44
	str	r3, [r2, #-1720]
	b	.L657
.L624:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #152
	sub	r3, r3, #52
	add	r1, sp, #5376
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5376
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #5376
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5376
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5376
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5376
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5376
	str	r2, [r3]
	add	r3, sp, #5376
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L799
	add	r3, sp, #5376
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5312
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5312
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5312
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5312
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5312
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5312
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5312
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5312
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5376
	add	r2, r2, #8
	str	r3, [r2]
	b	.L804
.L799:
	add	r3, sp, #5376
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5376
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L804
	add	r3, sp, #5312
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5312
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L804:
	add	r3, sp, #5376
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L807
	mvn	r3, #13
	b	.L1554
.L807:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #152
	sub	r3, r3, #52
	str	r3, [r2, #-1720]
	b	.L657
.L625:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #88
	add	r1, sp, #5312
	add	r1, r1, #16
	str	r2, [r1]
	add	r2, sp, #5312
	add	r2, r2, #12
	str	r3, [r2]
	mov	r3, #12
	add	r2, sp, #5312
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5312
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5312
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5312
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5312
	str	r2, [r3]
	add	r3, sp, #5312
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L809
	add	r3, sp, #5312
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5248
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5248
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5248
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5248
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5248
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5248
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5248
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5248
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5312
	add	r2, r2, #8
	str	r3, [r2]
	b	.L814
.L809:
	add	r3, sp, #5312
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5312
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L814
	add	r3, sp, #5248
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5248
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L814:
	add	r3, sp, #5312
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L817
	mvn	r3, #13
	b	.L1554
.L817:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #88
	str	r3, [r2, #-1720]
	b	.L657
.L626:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #88
	sub	r3, r3, #32
	add	r1, sp, #5248
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5248
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #32
	add	r2, sp, #5248
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5248
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5248
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5248
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5248
	str	r2, [r3]
	add	r3, sp, #5248
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L819
	add	r3, sp, #5248
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5184
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5184
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5184
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5184
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5184
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5184
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5184
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5184
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5248
	add	r2, r2, #8
	str	r3, [r2]
	b	.L824
.L819:
	add	r3, sp, #5248
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5248
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L824
	add	r3, sp, #5184
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5184
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L824:
	add	r3, sp, #5248
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L827
	mvn	r3, #13
	b	.L1554
.L827:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #88
	sub	r3, r3, #32
	str	r3, [r2, #-1720]
	b	.L657
.L627:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #24
	add	r1, sp, #5184
	add	r1, r1, #16
	str	r2, [r1]
	add	r2, sp, #5184
	add	r2, r2, #12
	str	r3, [r2]
	mov	r3, #32
	add	r2, sp, #5184
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5184
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5184
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5184
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5184
	str	r2, [r3]
	add	r3, sp, #5184
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L829
	add	r3, sp, #5184
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5120
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5120
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5120
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5120
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5120
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5120
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5120
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5120
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5184
	add	r2, r2, #8
	str	r3, [r2]
	b	.L834
.L829:
	add	r3, sp, #5184
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5184
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L834
	add	r3, sp, #5120
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5120
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L834:
	add	r3, sp, #5184
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L837
	mvn	r3, #13
	b	.L1554
.L837:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #24
	str	r3, [r2, #-1720]
	b	.L657
.L628:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #216
	sub	r3, r3, #28
	add	r1, sp, #5120
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5120
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #5120
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5120
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5120
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5120
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5120
	str	r2, [r3]
	add	r3, sp, #5120
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L839
	add	r3, sp, #5120
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #5056
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #5056
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5056
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #5056
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #5056
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #5056
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #5056
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #5056
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5120
	add	r2, r2, #8
	str	r3, [r2]
	b	.L844
.L839:
	add	r3, sp, #5120
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5120
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L844
	add	r3, sp, #5056
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #5056
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L844:
	add	r3, sp, #5120
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L847
	mvn	r3, #13
	b	.L1554
.L847:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #216
	sub	r3, r3, #28
	str	r3, [r2, #-1720]
	b	.L657
.L629:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #216
	sub	r3, r3, #40
	add	r1, sp, #5056
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #5056
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #12
	add	r2, sp, #5056
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #5056
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #5056
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #5056
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #5056
	str	r2, [r3]
	add	r3, sp, #5056
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L849
	add	r3, sp, #5056
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4992
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4992
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4992
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4992
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4992
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4992
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4992
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4992
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #5056
	add	r2, r2, #8
	str	r3, [r2]
	b	.L854
.L849:
	add	r3, sp, #5056
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #5056
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L854
	add	r3, sp, #4992
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4992
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L854:
	add	r3, sp, #5056
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L857
	mvn	r3, #13
	b	.L1554
.L857:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #216
	sub	r3, r3, #40
	str	r3, [r2, #-1720]
	b	.L657
.L630:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #600
	sub	r3, r3, #44
	add	r1, sp, #4992
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4992
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #20
	add	r2, sp, #4992
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4992
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4992
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4992
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4992
	str	r2, [r3]
	add	r3, sp, #4992
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L859
	add	r3, sp, #4992
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4928
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4928
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4928
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4928
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4928
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4928
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4928
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4928
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4992
	add	r2, r2, #8
	str	r3, [r2]
	b	.L864
.L859:
	add	r3, sp, #4992
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4992
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L864
	add	r3, sp, #4928
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4928
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L864:
	add	r3, sp, #4992
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L867
	mvn	r3, #13
	b	.L1554
.L867:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	sub	r3, r3, #44
	str	r3, [r2, #-1720]
	b	.L657
.L631:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #536
	add	r1, sp, #4928
	add	r1, r1, #16
	str	r2, [r1]
	add	r2, sp, #4928
	add	r2, r2, #12
	str	r3, [r2]
	mov	r3, #20
	add	r2, sp, #4928
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4928
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4928
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4928
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4928
	str	r2, [r3]
	add	r3, sp, #4928
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L869
	add	r3, sp, #4928
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4864
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4864
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4864
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4864
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4864
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4864
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4864
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4864
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4928
	add	r2, r2, #8
	str	r3, [r2]
	b	.L874
.L869:
	add	r3, sp, #4928
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4928
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L874
	add	r3, sp, #4864
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4864
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L874:
	add	r3, sp, #4928
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L877
	mvn	r3, #13
	b	.L1554
.L877:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #536
	str	r3, [r2, #-1720]
	b	.L657
.L632:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #536
	sub	r3, r3, #16
	add	r1, sp, #4864
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4864
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #16
	add	r2, sp, #4864
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4864
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4864
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4864
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4864
	str	r2, [r3]
	add	r3, sp, #4864
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L879
	add	r3, sp, #4864
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4800
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4800
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4800
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4800
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4800
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4800
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4800
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4800
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4864
	add	r2, r2, #8
	str	r3, [r2]
	b	.L884
.L879:
	add	r3, sp, #4864
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4864
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L884
	add	r3, sp, #4800
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4800
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L884:
	add	r3, sp, #4864
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L887
	mvn	r3, #13
	b	.L1554
.L887:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #536
	sub	r3, r3, #16
	str	r3, [r2, #-1720]
	b	.L657
.L633:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #536
	sub	r3, r3, #48
	add	r1, sp, #4800
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4800
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #32
	add	r2, sp, #4800
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4800
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4800
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4800
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4800
	str	r2, [r3]
	add	r3, sp, #4800
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L889
	add	r3, sp, #4800
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4736
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4736
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4736
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4736
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4736
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4736
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4736
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4736
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4800
	add	r2, r2, #8
	str	r3, [r2]
	b	.L894
.L889:
	add	r3, sp, #4800
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4800
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L894
	add	r3, sp, #4736
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4736
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L894:
	add	r3, sp, #4800
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L897
	mvn	r3, #13
	b	.L1554
.L897:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #536
	sub	r3, r3, #48
	str	r3, [r2, #-1720]
	b	.L657
.L634:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #472
	sub	r3, r3, #8
	add	r1, sp, #4736
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4736
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #24
	add	r2, sp, #4736
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4736
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4736
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4736
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4736
	str	r2, [r3]
	add	r3, sp, #4736
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L899
	add	r3, sp, #4736
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4672
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4672
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4672
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4672
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4672
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4672
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4672
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4672
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4736
	add	r2, r2, #8
	str	r3, [r2]
	b	.L904
.L899:
	add	r3, sp, #4736
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4736
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L904
	add	r3, sp, #4672
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4672
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L904:
	add	r3, sp, #4736
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L907
	mvn	r3, #13
	b	.L1554
.L907:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #8
	str	r3, [r2, #-1720]
	b	.L657
.L635:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #472
	sub	r3, r3, #10
	add	r1, sp, #4672
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4672
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #2
	add	r2, sp, #4672
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4672
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4672
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4672
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4672
	str	r2, [r3]
	add	r3, sp, #4672
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L909
	add	r3, sp, #4672
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4608
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4608
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4608
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4608
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4608
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4608
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4608
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4608
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4672
	add	r2, r2, #8
	str	r3, [r2]
	b	.L914
.L909:
	add	r3, sp, #4672
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4672
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L914
	add	r3, sp, #4608
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4608
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L914:
	add	r3, sp, #4672
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L917
	mvn	r3, #13
	b	.L1554
.L917:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #10
	str	r3, [r2, #-1720]
	b	.L657
.L636:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #472
	sub	r3, r3, #32
	add	r1, sp, #4608
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4608
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #20
	add	r2, sp, #4608
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4608
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4608
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4608
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4608
	str	r2, [r3]
	add	r3, sp, #4608
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L919
	add	r3, sp, #4608
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4544
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4544
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4544
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4544
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4544
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4544
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4544
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4544
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4608
	add	r2, r2, #8
	str	r3, [r2]
	b	.L924
.L919:
	add	r3, sp, #4608
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4608
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L924
	add	r3, sp, #4544
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4544
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L924:
	add	r3, sp, #4608
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L927
	mvn	r3, #13
	b	.L1554
.L927:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #32
	str	r3, [r2, #-1720]
	b	.L657
.L637:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #472
	sub	r3, r3, #40
	add	r1, sp, #4544
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4544
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #4544
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4544
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4544
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4544
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4544
	str	r2, [r3]
	add	r3, sp, #4544
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L929
	add	r3, sp, #4544
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4480
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4480
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4480
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4480
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4480
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4480
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4480
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4480
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4544
	add	r2, r2, #8
	str	r3, [r2]
	b	.L934
.L929:
	add	r3, sp, #4544
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4544
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L934
	add	r3, sp, #4480
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4480
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L934:
	add	r3, sp, #4544
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L937
	mvn	r3, #13
	b	.L1554
.L937:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #40
	str	r3, [r2, #-1720]
	b	.L657
.L638:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #472
	sub	r3, r3, #60
	add	r1, sp, #4480
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4480
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #20
	add	r2, sp, #4480
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4480
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4480
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4480
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4480
	str	r2, [r3]
	add	r3, sp, #4480
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L939
	add	r3, sp, #4480
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4416
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4416
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4416
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4416
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4416
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4416
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4416
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4416
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4480
	add	r2, r2, #8
	str	r3, [r2]
	b	.L944
.L939:
	add	r3, sp, #4480
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4480
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L944
	add	r3, sp, #4416
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4416
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L944:
	add	r3, sp, #4480
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L947
	mvn	r3, #13
	b	.L1554
.L947:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #60
	str	r3, [r2, #-1720]
	b	.L657
.L639:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #408
	sub	r3, r3, #20
	add	r1, sp, #4416
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4416
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #24
	add	r2, sp, #4416
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4416
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4416
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4416
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4416
	str	r2, [r3]
	add	r3, sp, #4416
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L949
	add	r3, sp, #4416
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4352
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4352
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4352
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4352
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4352
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4352
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4352
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4352
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4416
	add	r2, r2, #8
	str	r3, [r2]
	b	.L954
.L949:
	add	r3, sp, #4416
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4416
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L954
	add	r3, sp, #4352
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4352
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L954:
	add	r3, sp, #4416
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L957
	mvn	r3, #13
	b	.L1554
.L957:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #20
	str	r3, [r2, #-1720]
	b	.L657
.L640:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #408
	sub	r3, r3, #32
	add	r1, sp, #4352
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4352
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #12
	add	r2, sp, #4352
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4352
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4352
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4352
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4352
	str	r2, [r3]
	add	r3, sp, #4352
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L959
	add	r3, sp, #4352
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4288
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4288
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4288
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4288
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4288
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4288
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4288
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4288
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4352
	add	r2, r2, #8
	str	r3, [r2]
	b	.L964
.L959:
	add	r3, sp, #4352
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4352
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L964
	add	r3, sp, #4288
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4288
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L964:
	add	r3, sp, #4352
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L967
	mvn	r3, #13
	b	.L1554
.L967:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #32
	str	r3, [r2, #-1720]
	b	.L657
.L641:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #408
	sub	r3, r3, #48
	add	r1, sp, #4288
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4288
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #16
	add	r2, sp, #4288
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4288
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4288
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4288
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4288
	str	r2, [r3]
	add	r3, sp, #4288
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L969
	add	r3, sp, #4288
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4224
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4224
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4224
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4224
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4224
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4224
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4224
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4224
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4288
	add	r2, r2, #8
	str	r3, [r2]
	b	.L974
.L969:
	add	r3, sp, #4288
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4288
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L974
	add	r3, sp, #4224
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4224
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L974:
	add	r3, sp, #4288
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L977
	mvn	r3, #13
	b	.L1554
.L977:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #48
	str	r3, [r2, #-1720]
	b	.L657
.L642:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #408
	sub	r3, r3, #56
	add	r1, sp, #4224
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4224
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #8
	add	r2, sp, #4224
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4224
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4224
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4224
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4224
	str	r2, [r3]
	add	r3, sp, #4224
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L979
	add	r3, sp, #4224
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4160
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4160
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4160
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4160
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4160
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4160
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4160
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4160
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4224
	add	r2, r2, #8
	str	r3, [r2]
	b	.L984
.L979:
	add	r3, sp, #4224
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4224
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L984
	add	r3, sp, #4160
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4160
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L984:
	add	r3, sp, #4224
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L987
	mvn	r3, #13
	b	.L1554
.L987:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #56
	str	r3, [r2, #-1720]
	b	.L657
.L643:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #408
	sub	r3, r3, #60
	add	r1, sp, #4160
	add	r1, r1, #16
	str	r3, [r1]
	add	r3, sp, #4160
	add	r3, r3, #12
	str	r2, [r3]
	mov	r3, #4
	add	r2, sp, #4160
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4160
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4160
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4160
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4160
	str	r2, [r3]
	add	r3, sp, #4160
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L989
	add	r3, sp, #4160
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #60
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #12
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #56
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #52
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #4096
	add	r2, r2, #48
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #48
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #44
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #44
	ldr	r3, [r3]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #4096
	add	r2, r2, #40
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #40
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4096
	add	r3, r3, #44
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #36
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #60
	ldr	r0, [r3]
	add	r3, sp, #4096
	add	r3, r3, #56
	ldr	r1, [r3]
	add	r3, sp, #4096
	add	r3, r3, #52
	ldr	r2, [r3]
	bl	arm_copy_from_user
	add	r3, sp, #4096
	add	r3, r3, #52
	str	r0, [r3]
	add	r3, sp, #4096
	add	r3, r3, #36
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #32
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #32
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #28
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #28
	ldr	r3, [r3]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #4096
	add	r3, r3, #52
	ldr	r3, [r3]
	add	r2, sp, #4160
	add	r2, r2, #8
	str	r3, [r2]
	b	.L994
.L989:
	add	r3, sp, #4160
	add	r3, r3, #16
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #24
	str	r3, [r2]
	add	r3, sp, #4160
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #4096
	add	r2, r2, #20
	str	r3, [r2]
	add	r3, sp, #4096
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L994
	add	r3, sp, #4096
	add	r3, r3, #24
	ldr	r0, [r3]
	add	r3, sp, #4096
	add	r3, r3, #20
	ldr	r1, [r3]
	bl	__memzero
.L994:
	add	r3, sp, #4160
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L997
	mvn	r3, #13
	b	.L1554
.L997:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #60
	str	r3, [r2, #-1720]
	b	.L657
.L644:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #344
	add	r1, sp, #4096
	add	r1, r1, #16
	str	r2, [r1]
	add	r2, sp, #4096
	add	r2, r2, #12
	str	r3, [r2]
	mov	r3, #4
	add	r2, sp, #4096
	add	r2, r2, #8
	str	r3, [r2]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #4096
	add	r2, r2, #12
	ldr	r1, [r2]
	add	r2, sp, #4096
	add	r2, r2, #8
	ldr	r0, [r2]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #4096
	add	r1, r1, #4
	str	r3, [r1]
	add	r3, sp, #4096
	str	r2, [r3]
	add	r3, sp, #4096
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L999
	add	r3, sp, #4096
	add	r3, r3, #16
	ldr	r3, [r3]
	str	r3, [sp, #4092]
	add	r3, sp, #4096
	add	r3, r3, #12
	ldr	r3, [r3]
	str	r3, [sp, #4088]
	add	r3, sp, #4096
	add	r3, r3, #8
	ldr	r3, [r3]
	str	r3, [sp, #4084]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #4080]
	ldr	r3, [sp, #4080]
	str	r3, [sp, #4076]
	ldr	r3, [sp, #4076]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #4072]
	ldr	r3, [sp, #4072]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #4076]
	str	r3, [sp, #4068]
	ldr	r0, [sp, #4092]
	ldr	r1, [sp, #4088]
	ldr	r2, [sp, #4084]
	bl	arm_copy_from_user
	str	r0, [sp, #4084]
	ldr	r3, [sp, #4068]
	str	r3, [sp, #4064]
	ldr	r3, [sp, #4064]
	str	r3, [sp, #4060]
	ldr	r3, [sp, #4060]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #4084]
	add	r2, sp, #4096
	add	r2, r2, #8
	str	r3, [r2]
	b	.L1004
.L999:
	add	r3, sp, #4096
	add	r3, r3, #16
	ldr	r3, [r3]
	str	r3, [sp, #4056]
	add	r3, sp, #4096
	add	r3, r3, #8
	ldr	r3, [r3]
	str	r3, [sp, #4052]
	ldr	r3, [sp, #4052]
	cmp	r3, #0
	beq	.L1004
	ldr	r0, [sp, #4056]
	ldr	r1, [sp, #4052]
	bl	__memzero
.L1004:
	add	r3, sp, #4096
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L1007
	mvn	r3, #13
	b	.L1554
.L1007:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #344
	str	r3, [r2, #-1720]
	b	.L657
.L645:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #344
	sub	r3, r3, #8
	str	r3, [sp, #4048]
	str	r2, [sp, #4044]
	mov	r3, #8
	str	r3, [sp, #4040]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #4044]
	ldr	r0, [sp, #4040]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #4036]
	str	r2, [sp, #4032]
	ldr	r3, [sp, #4036]
	cmp	r3, #0
	bne	.L1009
	ldr	r3, [sp, #4048]
	str	r3, [sp, #4028]
	ldr	r3, [sp, #4044]
	str	r3, [sp, #4024]
	ldr	r3, [sp, #4040]
	str	r3, [sp, #4020]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #4016]
	ldr	r3, [sp, #4016]
	str	r3, [sp, #4012]
	ldr	r3, [sp, #4012]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #4008]
	ldr	r3, [sp, #4008]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #4012]
	str	r3, [sp, #4004]
	ldr	r0, [sp, #4028]
	ldr	r1, [sp, #4024]
	ldr	r2, [sp, #4020]
	bl	arm_copy_from_user
	str	r0, [sp, #4020]
	ldr	r3, [sp, #4004]
	str	r3, [sp, #4000]
	ldr	r3, [sp, #4000]
	str	r3, [sp, #3996]
	ldr	r3, [sp, #3996]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #4020]
	str	r3, [sp, #4040]
	b	.L1014
.L1009:
	ldr	r3, [sp, #4048]
	str	r3, [sp, #3992]
	ldr	r3, [sp, #4040]
	str	r3, [sp, #3988]
	ldr	r3, [sp, #3988]
	cmp	r3, #0
	beq	.L1014
	ldr	r0, [sp, #3992]
	ldr	r1, [sp, #3988]
	bl	__memzero
.L1014:
	ldr	r3, [sp, #4040]
	cmp	r3, #0
	beq	.L1017
	mvn	r3, #13
	b	.L1554
.L1017:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #344
	sub	r3, r3, #8
	str	r3, [r2, #-1720]
	b	.L657
.L646:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1720]
	add	r3, sp, #344
	sub	r3, r3, #16
	str	r3, [sp, #3984]
	str	r2, [sp, #3980]
	mov	r3, #8
	str	r3, [sp, #3976]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3980]
	ldr	r0, [sp, #3976]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3972]
	str	r2, [sp, #3968]
	ldr	r3, [sp, #3972]
	cmp	r3, #0
	bne	.L1019
	ldr	r3, [sp, #3984]
	str	r3, [sp, #3964]
	ldr	r3, [sp, #3980]
	str	r3, [sp, #3960]
	ldr	r3, [sp, #3976]
	str	r3, [sp, #3956]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3952]
	ldr	r3, [sp, #3952]
	str	r3, [sp, #3948]
	ldr	r3, [sp, #3948]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3944]
	ldr	r3, [sp, #3944]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3948]
	str	r3, [sp, #3940]
	ldr	r0, [sp, #3964]
	ldr	r1, [sp, #3960]
	ldr	r2, [sp, #3956]
	bl	arm_copy_from_user
	str	r0, [sp, #3956]
	ldr	r3, [sp, #3940]
	str	r3, [sp, #3936]
	ldr	r3, [sp, #3936]
	str	r3, [sp, #3932]
	ldr	r3, [sp, #3932]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3956]
	str	r3, [sp, #3976]
	b	.L1024
.L1019:
	ldr	r3, [sp, #3984]
	str	r3, [sp, #3928]
	ldr	r3, [sp, #3976]
	str	r3, [sp, #3924]
	ldr	r3, [sp, #3924]
	cmp	r3, #0
	beq	.L1024
	ldr	r0, [sp, #3928]
	ldr	r1, [sp, #3924]
	bl	__memzero
.L1024:
	ldr	r3, [sp, #3976]
	cmp	r3, #0
	beq	.L1027
	mvn	r3, #13
	b	.L1554
.L1027:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #344
	sub	r3, r3, #16
	str	r3, [r2, #-1720]
	b	.L657
.L1555:
	mov	r0, r0	@ nop
.L657:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1728]
	movw	r3, #:lower16:qdma_operation
	movt	r3, #:upper16:qdma_operation
	ldr	r3, [r3, r2, asl #2]
	cmp	r3, #0
	bne	.L1028
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrb	r3, [r3, #541]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1029
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1728]
	str	r3, [sp]
	movw	r0, #:lower16:.LC54
	movt	r0, #:upper16:.LC54
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L1556
	movw	r3, #3210
	bl	printk
.L1029:
	mvn	r3, #13
	b	.L1554
.L1028:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r2, [r3, #-1728]
	movw	r3, #:lower16:qdma_operation
	movt	r3, #:upper16:qdma_operation
	ldr	r3, [r3, r2, asl #2]
	add	r2, sp, #600
	mov	r0, r2
	blx	r3
	add	r3, sp, #6400
	add	r3, r3, #20
	str	r0, [r3]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1728]
	sub	r3, r3, #14
	cmp	r3, #138
	ldrls	pc, [pc, r3, asl #2]
	b	.L1030
.L1032:
	.word	.L1031
	.word	.L1033
	.word	.L1033
	.word	.L1030
	.word	.L1034
	.word	.L1034
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1035
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1036
	.word	.L1030
	.word	.L1030
	.word	.L1037
	.word	.L1030
	.word	.L1038
	.word	.L1030
	.word	.L1039
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1040
	.word	.L1030
	.word	.L1030
	.word	.L1041
	.word	.L1030
	.word	.L1042
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1043
	.word	.L1030
	.word	.L1044
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1045
	.word	.L1030
	.word	.L1046
	.word	.L1030
	.word	.L1047
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1048
	.word	.L1030
	.word	.L1049
	.word	.L1030
	.word	.L1030
	.word	.L1050
	.word	.L1051
	.word	.L1030
	.word	.L1030
	.word	.L1052
	.word	.L1030
	.word	.L1030
	.word	.L1052
	.word	.L1030
	.word	.L1053
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1030
	.word	.L1054
	.word	.L1030
	.word	.L1055
	.word	.L1030
	.word	.L1056
	.word	.L1030
	.word	.L1057
	.word	.L1030
	.word	.L1058
.L1031:
	add	r3, sp, #600
	str	r3, [sp, #3920]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3916]
	mov	r3, #28
	str	r3, [sp, #3912]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3916]
	ldr	r0, [sp, #3912]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3908]
	str	r2, [sp, #3904]
	ldr	r3, [sp, #3908]
	cmp	r3, #0
	bne	.L1060
	ldr	r3, [sp, #3920]
	str	r3, [sp, #3900]
	ldr	r3, [sp, #3916]
	str	r3, [sp, #3896]
	ldr	r3, [sp, #3912]
	str	r3, [sp, #3892]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3888]
	ldr	r3, [sp, #3888]
	str	r3, [sp, #3884]
	ldr	r3, [sp, #3884]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3880]
	ldr	r3, [sp, #3880]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3884]
	str	r3, [sp, #3876]
	ldr	r0, [sp, #3900]
	ldr	r1, [sp, #3896]
	ldr	r2, [sp, #3892]
	bl	arm_copy_from_user
	str	r0, [sp, #3892]
	ldr	r3, [sp, #3876]
	str	r3, [sp, #3872]
	ldr	r3, [sp, #3872]
	str	r3, [sp, #3868]
	ldr	r3, [sp, #3868]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3892]
	str	r3, [sp, #3912]
	b	.L1065
.L1060:
	ldr	r3, [sp, #3920]
	str	r3, [sp, #3864]
	ldr	r3, [sp, #3912]
	str	r3, [sp, #3860]
	ldr	r3, [sp, #3860]
	cmp	r3, #0
	beq	.L1065
	ldr	r0, [sp, #3864]
	ldr	r1, [sp, #3860]
	bl	__memzero
.L1065:
	ldr	r3, [sp, #3912]
	cmp	r3, #0
	beq	.L1068
	mvn	r3, #13
	b	.L1554
.L1068:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1712]
	str	r3, [sp, #3856]
	add	r3, sp, #600
	sub	r3, r3, #24
	str	r3, [sp, #3852]
	mov	r3, #24
	str	r3, [sp, #3848]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3856]
	ldr	r0, [sp, #3848]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3844]
	str	r2, [sp, #3840]
	ldr	r3, [sp, #3844]
	cmp	r3, #0
	bne	.L1070
	ldr	r3, [sp, #3856]
	str	r3, [sp, #3836]
	ldr	r3, [sp, #3852]
	str	r3, [sp, #3832]
	ldr	r3, [sp, #3848]
	str	r3, [sp, #3828]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3824]
	ldr	r3, [sp, #3824]
	str	r3, [sp, #3820]
	ldr	r3, [sp, #3820]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3816]
	ldr	r3, [sp, #3816]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3820]
	str	r3, [sp, #3812]
	ldr	r0, [sp, #3836]
	ldr	r1, [sp, #3832]
	ldr	r2, [sp, #3828]
	bl	arm_copy_to_user
	str	r0, [sp, #3828]
	ldr	r3, [sp, #3812]
	str	r3, [sp, #3808]
	ldr	r3, [sp, #3808]
	str	r3, [sp, #3804]
	ldr	r3, [sp, #3804]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3828]
	str	r3, [sp, #3848]
.L1070:
	ldr	r3, [sp, #3848]
	cmp	r3, #0
	beq	.L1076
	mvn	r3, #13
	b	.L1554
.L1076:
	b	.L1077
.L1033:
	add	r3, sp, #600
	str	r3, [sp, #3800]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3796]
	mov	r3, #28
	str	r3, [sp, #3792]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3796]
	ldr	r0, [sp, #3792]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3788]
	str	r2, [sp, #3784]
	ldr	r3, [sp, #3788]
	cmp	r3, #0
	bne	.L1079
	ldr	r3, [sp, #3800]
	str	r3, [sp, #3780]
	ldr	r3, [sp, #3796]
	str	r3, [sp, #3776]
	ldr	r3, [sp, #3792]
	str	r3, [sp, #3772]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3768]
	ldr	r3, [sp, #3768]
	str	r3, [sp, #3764]
	ldr	r3, [sp, #3764]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3760]
	ldr	r3, [sp, #3760]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3764]
	str	r3, [sp, #3756]
	ldr	r0, [sp, #3780]
	ldr	r1, [sp, #3776]
	ldr	r2, [sp, #3772]
	bl	arm_copy_from_user
	str	r0, [sp, #3772]
	ldr	r3, [sp, #3756]
	str	r3, [sp, #3752]
	ldr	r3, [sp, #3752]
	str	r3, [sp, #3748]
	ldr	r3, [sp, #3748]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3772]
	str	r3, [sp, #3792]
	b	.L1084
.L1079:
	ldr	r3, [sp, #3800]
	str	r3, [sp, #3744]
	ldr	r3, [sp, #3792]
	str	r3, [sp, #3740]
	ldr	r3, [sp, #3740]
	cmp	r3, #0
	beq	.L1084
	ldr	r0, [sp, #3744]
	ldr	r1, [sp, #3740]
	bl	__memzero
.L1084:
	ldr	r3, [sp, #3792]
	cmp	r3, #0
	beq	.L1087
	mvn	r3, #13
	b	.L1554
.L1087:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3736]
	add	r3, sp, #216
	sub	r3, r3, #48
	str	r3, [sp, #3732]
	mov	r3, #8
	str	r3, [sp, #3728]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3736]
	ldr	r0, [sp, #3728]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3724]
	str	r2, [sp, #3720]
	ldr	r3, [sp, #3724]
	cmp	r3, #0
	bne	.L1089
	ldr	r3, [sp, #3736]
	str	r3, [sp, #3716]
	ldr	r3, [sp, #3732]
	str	r3, [sp, #3712]
	ldr	r3, [sp, #3728]
	str	r3, [sp, #3708]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3704]
	ldr	r3, [sp, #3704]
	str	r3, [sp, #3700]
	ldr	r3, [sp, #3700]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3696]
	ldr	r3, [sp, #3696]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3700]
	str	r3, [sp, #3692]
	ldr	r0, [sp, #3716]
	ldr	r1, [sp, #3712]
	ldr	r2, [sp, #3708]
	bl	arm_copy_to_user
	str	r0, [sp, #3708]
	ldr	r3, [sp, #3692]
	str	r3, [sp, #3688]
	ldr	r3, [sp, #3688]
	str	r3, [sp, #3684]
	ldr	r3, [sp, #3684]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3708]
	str	r3, [sp, #3728]
.L1089:
	ldr	r3, [sp, #3728]
	cmp	r3, #0
	beq	.L1095
	mvn	r3, #13
	b	.L1554
.L1095:
	b	.L1077
.L1034:
	add	r3, sp, #600
	str	r3, [sp, #3680]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3676]
	mov	r3, #28
	str	r3, [sp, #3672]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3676]
	ldr	r0, [sp, #3672]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3668]
	str	r2, [sp, #3664]
	ldr	r3, [sp, #3668]
	cmp	r3, #0
	bne	.L1097
	ldr	r3, [sp, #3680]
	str	r3, [sp, #3660]
	ldr	r3, [sp, #3676]
	str	r3, [sp, #3656]
	ldr	r3, [sp, #3672]
	str	r3, [sp, #3652]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3648]
	ldr	r3, [sp, #3648]
	str	r3, [sp, #3644]
	ldr	r3, [sp, #3644]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3640]
	ldr	r3, [sp, #3640]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3644]
	str	r3, [sp, #3636]
	ldr	r0, [sp, #3660]
	ldr	r1, [sp, #3656]
	ldr	r2, [sp, #3652]
	bl	arm_copy_from_user
	str	r0, [sp, #3652]
	ldr	r3, [sp, #3636]
	str	r3, [sp, #3632]
	ldr	r3, [sp, #3632]
	str	r3, [sp, #3628]
	ldr	r3, [sp, #3628]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3652]
	str	r3, [sp, #3672]
	b	.L1102
.L1097:
	ldr	r3, [sp, #3680]
	str	r3, [sp, #3624]
	ldr	r3, [sp, #3672]
	str	r3, [sp, #3620]
	ldr	r3, [sp, #3620]
	cmp	r3, #0
	beq	.L1102
	ldr	r0, [sp, #3624]
	ldr	r1, [sp, #3620]
	bl	__memzero
.L1102:
	ldr	r3, [sp, #3672]
	cmp	r3, #0
	beq	.L1105
	mvn	r3, #13
	b	.L1554
.L1105:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3616]
	add	r3, sp, #216
	sub	r3, r3, #56
	str	r3, [sp, #3612]
	mov	r3, #8
	str	r3, [sp, #3608]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3616]
	ldr	r0, [sp, #3608]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3604]
	str	r2, [sp, #3600]
	ldr	r3, [sp, #3604]
	cmp	r3, #0
	bne	.L1107
	ldr	r3, [sp, #3616]
	str	r3, [sp, #3596]
	ldr	r3, [sp, #3612]
	str	r3, [sp, #3592]
	ldr	r3, [sp, #3608]
	str	r3, [sp, #3588]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3584]
	ldr	r3, [sp, #3584]
	str	r3, [sp, #3580]
	ldr	r3, [sp, #3580]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3576]
	ldr	r3, [sp, #3576]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3580]
	str	r3, [sp, #3572]
	ldr	r0, [sp, #3596]
	ldr	r1, [sp, #3592]
	ldr	r2, [sp, #3588]
	bl	arm_copy_to_user
	str	r0, [sp, #3588]
	ldr	r3, [sp, #3572]
	str	r3, [sp, #3568]
	ldr	r3, [sp, #3568]
	str	r3, [sp, #3564]
	ldr	r3, [sp, #3564]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3588]
	str	r3, [sp, #3608]
.L1107:
	ldr	r3, [sp, #3608]
	cmp	r3, #0
	beq	.L1113
	mvn	r3, #13
	b	.L1554
.L1113:
	b	.L1077
.L1036:
	add	r3, sp, #600
	str	r3, [sp, #3560]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3556]
	mov	r3, #28
	str	r3, [sp, #3552]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3556]
	ldr	r0, [sp, #3552]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3548]
	str	r2, [sp, #3544]
	ldr	r3, [sp, #3548]
	cmp	r3, #0
	bne	.L1115
	ldr	r3, [sp, #3560]
	str	r3, [sp, #3540]
	ldr	r3, [sp, #3556]
	str	r3, [sp, #3536]
	ldr	r3, [sp, #3552]
	str	r3, [sp, #3532]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3528]
	ldr	r3, [sp, #3528]
	str	r3, [sp, #3524]
	ldr	r3, [sp, #3524]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3520]
	ldr	r3, [sp, #3520]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3524]
	str	r3, [sp, #3516]
	ldr	r0, [sp, #3540]
	ldr	r1, [sp, #3536]
	ldr	r2, [sp, #3532]
	bl	arm_copy_from_user
	str	r0, [sp, #3532]
	ldr	r3, [sp, #3516]
	str	r3, [sp, #3512]
	ldr	r3, [sp, #3512]
	str	r3, [sp, #3508]
	ldr	r3, [sp, #3508]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3532]
	str	r3, [sp, #3552]
	b	.L1120
.L1115:
	ldr	r3, [sp, #3560]
	str	r3, [sp, #3504]
	ldr	r3, [sp, #3552]
	str	r3, [sp, #3500]
	ldr	r3, [sp, #3500]
	cmp	r3, #0
	beq	.L1120
	ldr	r0, [sp, #3504]
	ldr	r1, [sp, #3500]
	bl	__memzero
.L1120:
	ldr	r3, [sp, #3552]
	cmp	r3, #0
	beq	.L1123
	mvn	r3, #13
	b	.L1554
.L1123:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3496]
	add	r3, sp, #280
	sub	r3, r3, #20
	str	r3, [sp, #3492]
	mov	r3, #4
	str	r3, [sp, #3488]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3496]
	ldr	r0, [sp, #3488]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3484]
	str	r2, [sp, #3480]
	ldr	r3, [sp, #3484]
	cmp	r3, #0
	bne	.L1125
	ldr	r3, [sp, #3496]
	str	r3, [sp, #3476]
	ldr	r3, [sp, #3492]
	str	r3, [sp, #3472]
	ldr	r3, [sp, #3488]
	str	r3, [sp, #3468]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3464]
	ldr	r3, [sp, #3464]
	str	r3, [sp, #3460]
	ldr	r3, [sp, #3460]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3456]
	ldr	r3, [sp, #3456]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3460]
	str	r3, [sp, #3452]
	ldr	r0, [sp, #3476]
	ldr	r1, [sp, #3472]
	ldr	r2, [sp, #3468]
	bl	arm_copy_to_user
	str	r0, [sp, #3468]
	ldr	r3, [sp, #3452]
	str	r3, [sp, #3448]
	ldr	r3, [sp, #3448]
	str	r3, [sp, #3444]
	ldr	r3, [sp, #3444]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3468]
	str	r3, [sp, #3488]
.L1125:
	ldr	r3, [sp, #3488]
	cmp	r3, #0
	beq	.L1131
	mvn	r3, #13
	b	.L1554
.L1131:
	b	.L1077
.L1037:
	add	r3, sp, #600
	str	r3, [sp, #3440]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3436]
	mov	r3, #28
	str	r3, [sp, #3432]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3436]
	ldr	r0, [sp, #3432]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3428]
	str	r2, [sp, #3424]
	ldr	r3, [sp, #3428]
	cmp	r3, #0
	bne	.L1133
	ldr	r3, [sp, #3440]
	str	r3, [sp, #3420]
	ldr	r3, [sp, #3436]
	str	r3, [sp, #3416]
	ldr	r3, [sp, #3432]
	str	r3, [sp, #3412]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3408]
	ldr	r3, [sp, #3408]
	str	r3, [sp, #3404]
	ldr	r3, [sp, #3404]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3400]
	ldr	r3, [sp, #3400]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3404]
	str	r3, [sp, #3396]
	ldr	r0, [sp, #3420]
	ldr	r1, [sp, #3416]
	ldr	r2, [sp, #3412]
	bl	arm_copy_from_user
	str	r0, [sp, #3412]
	ldr	r3, [sp, #3396]
	str	r3, [sp, #3392]
	ldr	r3, [sp, #3392]
	str	r3, [sp, #3388]
	ldr	r3, [sp, #3388]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3412]
	str	r3, [sp, #3432]
	b	.L1138
.L1133:
	ldr	r3, [sp, #3440]
	str	r3, [sp, #3384]
	ldr	r3, [sp, #3432]
	str	r3, [sp, #3380]
	ldr	r3, [sp, #3380]
	cmp	r3, #0
	beq	.L1138
	ldr	r0, [sp, #3384]
	ldr	r1, [sp, #3380]
	bl	__memzero
.L1138:
	ldr	r3, [sp, #3432]
	cmp	r3, #0
	beq	.L1141
	mvn	r3, #13
	b	.L1554
.L1141:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3376]
	add	r3, sp, #280
	sub	r3, r3, #28
	str	r3, [sp, #3372]
	mov	r3, #8
	str	r3, [sp, #3368]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3376]
	ldr	r0, [sp, #3368]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3364]
	str	r2, [sp, #3360]
	ldr	r3, [sp, #3364]
	cmp	r3, #0
	bne	.L1143
	ldr	r3, [sp, #3376]
	str	r3, [sp, #3356]
	ldr	r3, [sp, #3372]
	str	r3, [sp, #3352]
	ldr	r3, [sp, #3368]
	str	r3, [sp, #3348]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3344]
	ldr	r3, [sp, #3344]
	str	r3, [sp, #3340]
	ldr	r3, [sp, #3340]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3336]
	ldr	r3, [sp, #3336]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3340]
	str	r3, [sp, #3332]
	ldr	r0, [sp, #3356]
	ldr	r1, [sp, #3352]
	ldr	r2, [sp, #3348]
	bl	arm_copy_to_user
	str	r0, [sp, #3348]
	ldr	r3, [sp, #3332]
	str	r3, [sp, #3328]
	ldr	r3, [sp, #3328]
	str	r3, [sp, #3324]
	ldr	r3, [sp, #3324]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3348]
	str	r3, [sp, #3368]
.L1143:
	ldr	r3, [sp, #3368]
	cmp	r3, #0
	beq	.L1149
	mvn	r3, #13
	b	.L1554
.L1149:
	b	.L1077
.L1038:
	add	r3, sp, #600
	str	r3, [sp, #3320]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3316]
	mov	r3, #28
	str	r3, [sp, #3312]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3316]
	ldr	r0, [sp, #3312]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3308]
	str	r2, [sp, #3304]
	ldr	r3, [sp, #3308]
	cmp	r3, #0
	bne	.L1151
	ldr	r3, [sp, #3320]
	str	r3, [sp, #3300]
	ldr	r3, [sp, #3316]
	str	r3, [sp, #3296]
	ldr	r3, [sp, #3312]
	str	r3, [sp, #3292]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3288]
	ldr	r3, [sp, #3288]
	str	r3, [sp, #3284]
	ldr	r3, [sp, #3284]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3280]
	ldr	r3, [sp, #3280]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3284]
	str	r3, [sp, #3276]
	ldr	r0, [sp, #3300]
	ldr	r1, [sp, #3296]
	ldr	r2, [sp, #3292]
	bl	arm_copy_from_user
	str	r0, [sp, #3292]
	ldr	r3, [sp, #3276]
	str	r3, [sp, #3272]
	ldr	r3, [sp, #3272]
	str	r3, [sp, #3268]
	ldr	r3, [sp, #3268]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3292]
	str	r3, [sp, #3312]
	b	.L1156
.L1151:
	ldr	r3, [sp, #3320]
	str	r3, [sp, #3264]
	ldr	r3, [sp, #3312]
	str	r3, [sp, #3260]
	ldr	r3, [sp, #3260]
	cmp	r3, #0
	beq	.L1156
	ldr	r0, [sp, #3264]
	ldr	r1, [sp, #3260]
	bl	__memzero
.L1156:
	ldr	r3, [sp, #3312]
	cmp	r3, #0
	beq	.L1159
	mvn	r3, #13
	b	.L1554
.L1159:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3256]
	add	r3, sp, #280
	sub	r3, r3, #36
	str	r3, [sp, #3252]
	mov	r3, #8
	str	r3, [sp, #3248]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3256]
	ldr	r0, [sp, #3248]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3244]
	str	r2, [sp, #3240]
	ldr	r3, [sp, #3244]
	cmp	r3, #0
	bne	.L1161
	ldr	r3, [sp, #3256]
	str	r3, [sp, #3236]
	ldr	r3, [sp, #3252]
	str	r3, [sp, #3232]
	ldr	r3, [sp, #3248]
	str	r3, [sp, #3228]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3224]
	ldr	r3, [sp, #3224]
	str	r3, [sp, #3220]
	ldr	r3, [sp, #3220]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3216]
	ldr	r3, [sp, #3216]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3220]
	str	r3, [sp, #3212]
	ldr	r0, [sp, #3236]
	ldr	r1, [sp, #3232]
	ldr	r2, [sp, #3228]
	bl	arm_copy_to_user
	str	r0, [sp, #3228]
	ldr	r3, [sp, #3212]
	str	r3, [sp, #3208]
	ldr	r3, [sp, #3208]
	str	r3, [sp, #3204]
	ldr	r3, [sp, #3204]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3228]
	str	r3, [sp, #3248]
.L1161:
	ldr	r3, [sp, #3248]
	cmp	r3, #0
	beq	.L1167
	mvn	r3, #13
	b	.L1554
.L1167:
	b	.L1077
.L1557:
	.align	2
.L1556:
	.word	.LC4+60
.L1039:
	add	r3, sp, #600
	str	r3, [sp, #3200]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3196]
	mov	r3, #28
	str	r3, [sp, #3192]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3196]
	ldr	r0, [sp, #3192]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3188]
	str	r2, [sp, #3184]
	ldr	r3, [sp, #3188]
	cmp	r3, #0
	bne	.L1169
	ldr	r3, [sp, #3200]
	str	r3, [sp, #3180]
	ldr	r3, [sp, #3196]
	str	r3, [sp, #3176]
	ldr	r3, [sp, #3192]
	str	r3, [sp, #3172]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3168]
	ldr	r3, [sp, #3168]
	str	r3, [sp, #3164]
	ldr	r3, [sp, #3164]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3160]
	ldr	r3, [sp, #3160]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3164]
	str	r3, [sp, #3156]
	ldr	r0, [sp, #3180]
	ldr	r1, [sp, #3176]
	ldr	r2, [sp, #3172]
	bl	arm_copy_from_user
	str	r0, [sp, #3172]
	ldr	r3, [sp, #3156]
	str	r3, [sp, #3152]
	ldr	r3, [sp, #3152]
	str	r3, [sp, #3148]
	ldr	r3, [sp, #3148]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3172]
	str	r3, [sp, #3192]
	b	.L1174
.L1169:
	ldr	r3, [sp, #3200]
	str	r3, [sp, #3144]
	ldr	r3, [sp, #3192]
	str	r3, [sp, #3140]
	ldr	r3, [sp, #3140]
	cmp	r3, #0
	beq	.L1174
	ldr	r0, [sp, #3144]
	ldr	r1, [sp, #3140]
	bl	__memzero
.L1174:
	ldr	r3, [sp, #3192]
	cmp	r3, #0
	beq	.L1177
	mvn	r3, #13
	b	.L1554
.L1177:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3136]
	add	r3, sp, #280
	sub	r3, r3, #56
	str	r3, [sp, #3132]
	mov	r3, #20
	str	r3, [sp, #3128]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3136]
	ldr	r0, [sp, #3128]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3124]
	str	r2, [sp, #3120]
	ldr	r3, [sp, #3124]
	cmp	r3, #0
	bne	.L1179
	ldr	r3, [sp, #3136]
	str	r3, [sp, #3116]
	ldr	r3, [sp, #3132]
	str	r3, [sp, #3112]
	ldr	r3, [sp, #3128]
	str	r3, [sp, #3108]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3104]
	ldr	r3, [sp, #3104]
	str	r3, [sp, #3100]
	ldr	r3, [sp, #3100]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3096]
	ldr	r3, [sp, #3096]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3100]
	str	r3, [sp, #3092]
	ldr	r0, [sp, #3116]
	ldr	r1, [sp, #3112]
	ldr	r2, [sp, #3108]
	bl	arm_copy_to_user
	str	r0, [sp, #3108]
	ldr	r3, [sp, #3092]
	str	r3, [sp, #3088]
	ldr	r3, [sp, #3088]
	str	r3, [sp, #3084]
	ldr	r3, [sp, #3084]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3108]
	str	r3, [sp, #3128]
.L1179:
	ldr	r3, [sp, #3128]
	cmp	r3, #0
	beq	.L1185
	mvn	r3, #13
	b	.L1554
.L1185:
	b	.L1077
.L1040:
	add	r3, sp, #600
	str	r3, [sp, #3080]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #3076]
	mov	r3, #28
	str	r3, [sp, #3072]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3076]
	ldr	r0, [sp, #3072]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3068]
	str	r2, [sp, #3064]
	ldr	r3, [sp, #3068]
	cmp	r3, #0
	bne	.L1187
	ldr	r3, [sp, #3080]
	str	r3, [sp, #3060]
	ldr	r3, [sp, #3076]
	str	r3, [sp, #3056]
	ldr	r3, [sp, #3072]
	str	r3, [sp, #3052]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #3048]
	ldr	r3, [sp, #3048]
	str	r3, [sp, #3044]
	ldr	r3, [sp, #3044]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #3040]
	ldr	r3, [sp, #3040]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3044]
	str	r3, [sp, #3036]
	ldr	r0, [sp, #3060]
	ldr	r1, [sp, #3056]
	ldr	r2, [sp, #3052]
	bl	arm_copy_from_user
	str	r0, [sp, #3052]
	ldr	r3, [sp, #3036]
	str	r3, [sp, #3032]
	ldr	r3, [sp, #3032]
	str	r3, [sp, #3028]
	ldr	r3, [sp, #3028]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #3052]
	str	r3, [sp, #3072]
	b	.L1192
.L1187:
	ldr	r3, [sp, #3080]
	str	r3, [sp, #3024]
	ldr	r3, [sp, #3072]
	str	r3, [sp, #3020]
	ldr	r3, [sp, #3020]
	cmp	r3, #0
	beq	.L1192
	ldr	r0, [sp, #3024]
	ldr	r1, [sp, #3020]
	bl	__memzero
.L1192:
	ldr	r3, [sp, #3072]
	cmp	r3, #0
	beq	.L1195
	mvn	r3, #13
	b	.L1554
.L1195:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #3016]
	add	r3, sp, #280
	sub	r3, r3, #16
	str	r3, [sp, #3012]
	mov	r3, #64
	str	r3, [sp, #3008]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #3016]
	ldr	r0, [sp, #3008]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #3004]
	str	r2, [sp, #3000]
	ldr	r3, [sp, #3004]
	cmp	r3, #0
	bne	.L1197
	ldr	r3, [sp, #3016]
	str	r3, [sp, #2996]
	ldr	r3, [sp, #3012]
	str	r3, [sp, #2992]
	ldr	r3, [sp, #3008]
	str	r3, [sp, #2988]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2984]
	ldr	r3, [sp, #2984]
	str	r3, [sp, #2980]
	ldr	r3, [sp, #2980]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2976]
	ldr	r3, [sp, #2976]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2980]
	str	r3, [sp, #2972]
	ldr	r0, [sp, #2996]
	ldr	r1, [sp, #2992]
	ldr	r2, [sp, #2988]
	bl	arm_copy_to_user
	str	r0, [sp, #2988]
	ldr	r3, [sp, #2972]
	str	r3, [sp, #2968]
	ldr	r3, [sp, #2968]
	str	r3, [sp, #2964]
	ldr	r3, [sp, #2964]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2988]
	str	r3, [sp, #3008]
.L1197:
	ldr	r3, [sp, #3008]
	cmp	r3, #0
	beq	.L1203
	mvn	r3, #13
	b	.L1554
.L1203:
	b	.L1077
.L1035:
	add	r3, sp, #600
	str	r3, [sp, #2960]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #2956]
	mov	r3, #28
	str	r3, [sp, #2952]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2956]
	ldr	r0, [sp, #2952]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2948]
	str	r2, [sp, #2944]
	ldr	r3, [sp, #2948]
	cmp	r3, #0
	bne	.L1205
	ldr	r3, [sp, #2960]
	str	r3, [sp, #2940]
	ldr	r3, [sp, #2956]
	str	r3, [sp, #2936]
	ldr	r3, [sp, #2952]
	str	r3, [sp, #2932]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2928]
	ldr	r3, [sp, #2928]
	str	r3, [sp, #2924]
	ldr	r3, [sp, #2924]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2920]
	ldr	r3, [sp, #2920]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2924]
	str	r3, [sp, #2916]
	ldr	r0, [sp, #2940]
	ldr	r1, [sp, #2936]
	ldr	r2, [sp, #2932]
	bl	arm_copy_from_user
	str	r0, [sp, #2932]
	ldr	r3, [sp, #2916]
	str	r3, [sp, #2912]
	ldr	r3, [sp, #2912]
	str	r3, [sp, #2908]
	ldr	r3, [sp, #2908]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2932]
	str	r3, [sp, #2952]
	b	.L1210
.L1205:
	ldr	r3, [sp, #2960]
	str	r3, [sp, #2904]
	ldr	r3, [sp, #2952]
	str	r3, [sp, #2900]
	ldr	r3, [sp, #2900]
	cmp	r3, #0
	beq	.L1210
	ldr	r0, [sp, #2904]
	ldr	r1, [sp, #2900]
	bl	__memzero
.L1210:
	ldr	r3, [sp, #2952]
	cmp	r3, #0
	beq	.L1213
	mvn	r3, #13
	b	.L1554
.L1213:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #2896]
	add	r3, sp, #152
	sub	r3, r3, #16
	str	r3, [sp, #2892]
	mov	r3, #12
	str	r3, [sp, #2888]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2896]
	ldr	r0, [sp, #2888]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2884]
	str	r2, [sp, #2880]
	ldr	r3, [sp, #2884]
	cmp	r3, #0
	bne	.L1215
	ldr	r3, [sp, #2896]
	str	r3, [sp, #2876]
	ldr	r3, [sp, #2892]
	str	r3, [sp, #2872]
	ldr	r3, [sp, #2888]
	str	r3, [sp, #2868]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2864]
	ldr	r3, [sp, #2864]
	str	r3, [sp, #2860]
	ldr	r3, [sp, #2860]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2856]
	ldr	r3, [sp, #2856]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2860]
	str	r3, [sp, #2852]
	ldr	r0, [sp, #2876]
	ldr	r1, [sp, #2872]
	ldr	r2, [sp, #2868]
	bl	arm_copy_to_user
	str	r0, [sp, #2868]
	ldr	r3, [sp, #2852]
	str	r3, [sp, #2848]
	ldr	r3, [sp, #2848]
	str	r3, [sp, #2844]
	ldr	r3, [sp, #2844]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2868]
	str	r3, [sp, #2888]
.L1215:
	ldr	r3, [sp, #2888]
	cmp	r3, #0
	beq	.L1221
	mvn	r3, #13
	b	.L1554
.L1221:
	b	.L1077
.L1041:
	add	r3, sp, #600
	str	r3, [sp, #2840]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #2836]
	mov	r3, #28
	str	r3, [sp, #2832]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2836]
	ldr	r0, [sp, #2832]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2828]
	str	r2, [sp, #2824]
	ldr	r3, [sp, #2828]
	cmp	r3, #0
	bne	.L1223
	ldr	r3, [sp, #2840]
	str	r3, [sp, #2820]
	ldr	r3, [sp, #2836]
	str	r3, [sp, #2816]
	ldr	r3, [sp, #2832]
	str	r3, [sp, #2812]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2808]
	ldr	r3, [sp, #2808]
	str	r3, [sp, #2804]
	ldr	r3, [sp, #2804]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2800]
	ldr	r3, [sp, #2800]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2804]
	str	r3, [sp, #2796]
	ldr	r0, [sp, #2820]
	ldr	r1, [sp, #2816]
	ldr	r2, [sp, #2812]
	bl	arm_copy_from_user
	str	r0, [sp, #2812]
	ldr	r3, [sp, #2796]
	str	r3, [sp, #2792]
	ldr	r3, [sp, #2792]
	str	r3, [sp, #2788]
	ldr	r3, [sp, #2788]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2812]
	str	r3, [sp, #2832]
	b	.L1228
.L1223:
	ldr	r3, [sp, #2840]
	str	r3, [sp, #2784]
	ldr	r3, [sp, #2832]
	str	r3, [sp, #2780]
	ldr	r3, [sp, #2780]
	cmp	r3, #0
	beq	.L1228
	ldr	r0, [sp, #2784]
	ldr	r1, [sp, #2780]
	bl	__memzero
.L1228:
	ldr	r3, [sp, #2832]
	cmp	r3, #0
	beq	.L1231
	mvn	r3, #13
	b	.L1554
.L1231:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #2776]
	add	r3, sp, #216
	sub	r3, r3, #20
	str	r3, [sp, #2772]
	mov	r3, #16
	str	r3, [sp, #2768]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2776]
	ldr	r0, [sp, #2768]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2764]
	str	r2, [sp, #2760]
	ldr	r3, [sp, #2764]
	cmp	r3, #0
	bne	.L1233
	ldr	r3, [sp, #2776]
	str	r3, [sp, #2756]
	ldr	r3, [sp, #2772]
	str	r3, [sp, #2752]
	ldr	r3, [sp, #2768]
	str	r3, [sp, #2748]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2744]
	ldr	r3, [sp, #2744]
	str	r3, [sp, #2740]
	ldr	r3, [sp, #2740]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2736]
	ldr	r3, [sp, #2736]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2740]
	str	r3, [sp, #2732]
	ldr	r0, [sp, #2756]
	ldr	r1, [sp, #2752]
	ldr	r2, [sp, #2748]
	bl	arm_copy_to_user
	str	r0, [sp, #2748]
	ldr	r3, [sp, #2732]
	str	r3, [sp, #2728]
	ldr	r3, [sp, #2728]
	str	r3, [sp, #2724]
	ldr	r3, [sp, #2724]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2748]
	str	r3, [sp, #2768]
.L1233:
	ldr	r3, [sp, #2768]
	cmp	r3, #0
	beq	.L1239
	mvn	r3, #13
	b	.L1554
.L1239:
	b	.L1077
.L1042:
	add	r3, sp, #600
	str	r3, [sp, #2720]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #2716]
	mov	r3, #28
	str	r3, [sp, #2712]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2716]
	ldr	r0, [sp, #2712]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2708]
	str	r2, [sp, #2704]
	ldr	r3, [sp, #2708]
	cmp	r3, #0
	bne	.L1241
	ldr	r3, [sp, #2720]
	str	r3, [sp, #2700]
	ldr	r3, [sp, #2716]
	str	r3, [sp, #2696]
	ldr	r3, [sp, #2712]
	str	r3, [sp, #2692]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2688]
	ldr	r3, [sp, #2688]
	str	r3, [sp, #2684]
	ldr	r3, [sp, #2684]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2680]
	ldr	r3, [sp, #2680]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2684]
	str	r3, [sp, #2676]
	ldr	r0, [sp, #2700]
	ldr	r1, [sp, #2696]
	ldr	r2, [sp, #2692]
	bl	arm_copy_from_user
	str	r0, [sp, #2692]
	ldr	r3, [sp, #2676]
	str	r3, [sp, #2672]
	ldr	r3, [sp, #2672]
	str	r3, [sp, #2668]
	ldr	r3, [sp, #2668]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2692]
	str	r3, [sp, #2712]
	b	.L1246
.L1241:
	ldr	r3, [sp, #2720]
	str	r3, [sp, #2664]
	ldr	r3, [sp, #2712]
	str	r3, [sp, #2660]
	ldr	r3, [sp, #2660]
	cmp	r3, #0
	beq	.L1246
	ldr	r0, [sp, #2664]
	ldr	r1, [sp, #2660]
	bl	__memzero
.L1246:
	ldr	r3, [sp, #2712]
	cmp	r3, #0
	beq	.L1249
	mvn	r3, #13
	b	.L1554
.L1249:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #2656]
	add	r3, sp, #216
	sub	r3, r3, #4
	str	r3, [sp, #2652]
	mov	r3, #12
	str	r3, [sp, #2648]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2656]
	ldr	r0, [sp, #2648]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2644]
	str	r2, [sp, #2640]
	ldr	r3, [sp, #2644]
	cmp	r3, #0
	bne	.L1251
	ldr	r3, [sp, #2656]
	str	r3, [sp, #2636]
	ldr	r3, [sp, #2652]
	str	r3, [sp, #2632]
	ldr	r3, [sp, #2648]
	str	r3, [sp, #2628]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2624]
	ldr	r3, [sp, #2624]
	str	r3, [sp, #2620]
	ldr	r3, [sp, #2620]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2616]
	ldr	r3, [sp, #2616]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2620]
	str	r3, [sp, #2612]
	ldr	r0, [sp, #2636]
	ldr	r1, [sp, #2632]
	ldr	r2, [sp, #2628]
	bl	arm_copy_to_user
	str	r0, [sp, #2628]
	ldr	r3, [sp, #2612]
	str	r3, [sp, #2608]
	ldr	r3, [sp, #2608]
	str	r3, [sp, #2604]
	ldr	r3, [sp, #2604]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2628]
	str	r3, [sp, #2648]
.L1251:
	ldr	r3, [sp, #2648]
	cmp	r3, #0
	beq	.L1257
	mvn	r3, #13
	b	.L1554
.L1257:
	b	.L1077
.L1043:
	add	r3, sp, #600
	str	r3, [sp, #2600]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #2596]
	mov	r3, #28
	str	r3, [sp, #2592]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2596]
	ldr	r0, [sp, #2592]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2588]
	str	r2, [sp, #2584]
	ldr	r3, [sp, #2588]
	cmp	r3, #0
	bne	.L1259
	ldr	r3, [sp, #2600]
	str	r3, [sp, #2580]
	ldr	r3, [sp, #2596]
	str	r3, [sp, #2576]
	ldr	r3, [sp, #2592]
	str	r3, [sp, #2572]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2568]
	ldr	r3, [sp, #2568]
	str	r3, [sp, #2564]
	ldr	r3, [sp, #2564]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2560]
	ldr	r3, [sp, #2560]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2564]
	str	r3, [sp, #2556]
	ldr	r0, [sp, #2580]
	ldr	r1, [sp, #2576]
	ldr	r2, [sp, #2572]
	bl	arm_copy_from_user
	str	r0, [sp, #2572]
	ldr	r3, [sp, #2556]
	str	r3, [sp, #2552]
	ldr	r3, [sp, #2552]
	str	r3, [sp, #2548]
	ldr	r3, [sp, #2548]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2572]
	str	r3, [sp, #2592]
	b	.L1264
.L1259:
	ldr	r3, [sp, #2600]
	str	r3, [sp, #2544]
	ldr	r3, [sp, #2592]
	str	r3, [sp, #2540]
	ldr	r3, [sp, #2540]
	cmp	r3, #0
	beq	.L1264
	ldr	r0, [sp, #2544]
	ldr	r1, [sp, #2540]
	bl	__memzero
.L1264:
	ldr	r3, [sp, #2592]
	cmp	r3, #0
	beq	.L1267
	mvn	r3, #13
	b	.L1554
.L1267:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #2536]
	add	r3, sp, #216
	sub	r3, r3, #28
	str	r3, [sp, #2532]
	mov	r3, #8
	str	r3, [sp, #2528]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2536]
	ldr	r0, [sp, #2528]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2524]
	str	r2, [sp, #2520]
	ldr	r3, [sp, #2524]
	cmp	r3, #0
	bne	.L1269
	ldr	r3, [sp, #2536]
	str	r3, [sp, #2516]
	ldr	r3, [sp, #2532]
	str	r3, [sp, #2512]
	ldr	r3, [sp, #2528]
	str	r3, [sp, #2508]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2504]
	ldr	r3, [sp, #2504]
	str	r3, [sp, #2500]
	ldr	r3, [sp, #2500]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2496]
	ldr	r3, [sp, #2496]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2500]
	str	r3, [sp, #2492]
	ldr	r0, [sp, #2516]
	ldr	r1, [sp, #2512]
	ldr	r2, [sp, #2508]
	bl	arm_copy_to_user
	str	r0, [sp, #2508]
	ldr	r3, [sp, #2492]
	str	r3, [sp, #2488]
	ldr	r3, [sp, #2488]
	str	r3, [sp, #2484]
	ldr	r3, [sp, #2484]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2508]
	str	r3, [sp, #2528]
.L1269:
	ldr	r3, [sp, #2528]
	cmp	r3, #0
	beq	.L1275
	mvn	r3, #13
	b	.L1554
.L1275:
	b	.L1077
.L1044:
	add	r3, sp, #600
	str	r3, [sp, #2480]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #2476]
	mov	r3, #28
	str	r3, [sp, #2472]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2476]
	ldr	r0, [sp, #2472]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2468]
	str	r2, [sp, #2464]
	ldr	r3, [sp, #2468]
	cmp	r3, #0
	bne	.L1277
	ldr	r3, [sp, #2480]
	str	r3, [sp, #2460]
	ldr	r3, [sp, #2476]
	str	r3, [sp, #2456]
	ldr	r3, [sp, #2472]
	str	r3, [sp, #2452]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2448]
	ldr	r3, [sp, #2448]
	str	r3, [sp, #2444]
	ldr	r3, [sp, #2444]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2440]
	ldr	r3, [sp, #2440]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2444]
	str	r3, [sp, #2436]
	ldr	r0, [sp, #2460]
	ldr	r1, [sp, #2456]
	ldr	r2, [sp, #2452]
	bl	arm_copy_from_user
	str	r0, [sp, #2452]
	ldr	r3, [sp, #2436]
	str	r3, [sp, #2432]
	ldr	r3, [sp, #2432]
	str	r3, [sp, #2428]
	ldr	r3, [sp, #2428]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2452]
	str	r3, [sp, #2472]
	b	.L1282
.L1277:
	ldr	r3, [sp, #2480]
	str	r3, [sp, #2424]
	ldr	r3, [sp, #2472]
	str	r3, [sp, #2420]
	ldr	r3, [sp, #2420]
	cmp	r3, #0
	beq	.L1282
	ldr	r0, [sp, #2424]
	ldr	r1, [sp, #2420]
	bl	__memzero
.L1282:
	ldr	r3, [sp, #2472]
	cmp	r3, #0
	beq	.L1285
	mvn	r3, #13
	b	.L1554
.L1285:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	str	r3, [sp, #2416]
	add	r3, sp, #216
	sub	r3, r3, #40
	str	r3, [sp, #2412]
	mov	r3, #12
	str	r3, [sp, #2408]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2416]
	ldr	r0, [sp, #2408]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2404]
	str	r2, [sp, #2400]
	ldr	r3, [sp, #2404]
	cmp	r3, #0
	bne	.L1287
	ldr	r3, [sp, #2416]
	str	r3, [sp, #2396]
	ldr	r3, [sp, #2412]
	str	r3, [sp, #2392]
	ldr	r3, [sp, #2408]
	str	r3, [sp, #2388]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	str	r3, [sp, #2384]
	ldr	r3, [sp, #2384]
	str	r3, [sp, #2380]
	ldr	r3, [sp, #2380]
	bic	r3, r3, #12
	orr	r3, r3, #4
	str	r3, [sp, #2376]
	ldr	r3, [sp, #2376]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2380]
	str	r3, [sp, #2372]
	ldr	r0, [sp, #2396]
	ldr	r1, [sp, #2392]
	ldr	r2, [sp, #2388]
	bl	arm_copy_to_user
	str	r0, [sp, #2388]
	ldr	r3, [sp, #2372]
	str	r3, [sp, #2368]
	ldr	r3, [sp, #2368]
	str	r3, [sp, #2364]
	ldr	r3, [sp, #2364]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2388]
	str	r3, [sp, #2408]
.L1287:
	ldr	r3, [sp, #2408]
	cmp	r3, #0
	beq	.L1293
	mvn	r3, #13
	b	.L1554
.L1293:
	b	.L1077
.L1045:
	add	r3, sp, #600
	str	r3, [sp, #2360]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [sp, #2356]
	mov	r3, #28
	str	r3, [sp, #2352]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	ldr	r1, [sp, #2356]
	ldr	r0, [sp, #2352]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	str	r3, [sp, #2348]
	str	r2, [sp, #2344]
	ldr	r3, [sp, #2348]
	cmp	r3, #0
	bne	.L1295
	ldr	r3, [sp, #2360]
	str	r3, [sp, #2340]
	ldr	r3, [sp, #2356]
	str	r3, [sp, #2336]
	ldr	r3, [sp, #2352]
	str	r3, [sp, #2332]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-4]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-4]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-8]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-8]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-4]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-12]
	ldr	r0, [sp, #2340]
	ldr	r1, [sp, #2336]
	ldr	r2, [sp, #2332]
	bl	arm_copy_from_user
	str	r0, [sp, #2332]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-12]
	str	r3, [r2, #-16]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-16]
	str	r3, [r2, #-20]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-20]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	ldr	r3, [sp, #2332]
	str	r3, [sp, #2352]
	b	.L1300
.L1295:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	ldr	r3, [sp, #2360]
	str	r3, [r2, #-24]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	ldr	r3, [sp, #2352]
	str	r3, [r2, #-28]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-28]
	cmp	r3, #0
	beq	.L1300
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-24]
	ldr	r1, [r3, #-28]
	bl	__memzero
.L1300:
	ldr	r3, [sp, #2352]
	cmp	r3, #0
	beq	.L1303
	mvn	r3, #13
	b	.L1554
.L1303:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-32]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	sub	r3, r3, #44
	str	r3, [r2, #-36]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #20
	str	r3, [r2, #-40]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-32]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-40]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-44]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-48]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-44]
	cmp	r3, #0
	bne	.L1305
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-32]
	str	r3, [r2, #-52]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-36]
	str	r3, [r2, #-56]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-40]
	str	r3, [r2, #-60]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-64]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-64]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-68]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-68]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-72]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-72]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-68]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-76]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-52]
	ldr	r1, [r2, #-56]
	ldr	r2, [r3, #-60]
	bl	arm_copy_to_user
	str	r0, [r4, #-60]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-76]
	str	r3, [r2, #-80]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-80]
	str	r3, [r2, #-84]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-84]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-60]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-40]
.L1305:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-40]
	cmp	r3, #0
	beq	.L1311
	mvn	r3, #13
	b	.L1554
.L1311:
	b	.L1077
.L1046:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-88]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-92]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-96]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-92]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-96]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-100]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-104]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-100]
	cmp	r3, #0
	bne	.L1313
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-88]
	str	r3, [r2, #-108]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-92]
	str	r3, [r2, #-112]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-96]
	str	r3, [r2, #-116]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-120]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-120]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-124]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-124]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-128]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-128]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-124]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-132]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-108]
	ldr	r1, [r2, #-112]
	ldr	r2, [r3, #-116]
	bl	arm_copy_from_user
	str	r0, [r4, #-116]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-132]
	str	r3, [r2, #-136]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-136]
	str	r3, [r2, #-140]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-140]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-116]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-96]
	b	.L1318
.L1313:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-88]
	str	r3, [r2, #-144]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-96]
	str	r3, [r2, #-148]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-148]
	cmp	r3, #0
	beq	.L1318
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-144]
	ldr	r1, [r3, #-148]
	bl	__memzero
.L1318:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-96]
	cmp	r3, #0
	beq	.L1321
	mvn	r3, #13
	b	.L1554
.L1321:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-152]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #536
	str	r3, [r2, #-156]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #20
	str	r3, [r2, #-160]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-152]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-160]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-164]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-168]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-164]
	cmp	r3, #0
	bne	.L1323
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-152]
	str	r3, [r2, #-172]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-156]
	str	r3, [r2, #-176]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-160]
	str	r3, [r2, #-180]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-184]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-184]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-188]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-188]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-192]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-192]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-188]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-196]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-172]
	ldr	r1, [r2, #-176]
	ldr	r2, [r3, #-180]
	bl	arm_copy_to_user
	str	r0, [r4, #-180]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-196]
	str	r3, [r2, #-200]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-200]
	str	r3, [r2, #-204]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-204]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-180]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-160]
.L1323:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-160]
	cmp	r3, #0
	beq	.L1329
	mvn	r3, #13
	b	.L1554
.L1329:
	b	.L1077
.L1047:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-208]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-212]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-216]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-212]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-216]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-220]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-224]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-220]
	cmp	r3, #0
	bne	.L1331
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-208]
	str	r3, [r2, #-228]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-212]
	str	r3, [r2, #-232]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-216]
	str	r3, [r2, #-236]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-240]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-240]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-244]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-244]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-248]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-248]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-244]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-252]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-228]
	ldr	r1, [r2, #-232]
	ldr	r2, [r3, #-236]
	bl	arm_copy_from_user
	str	r0, [r4, #-236]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-252]
	str	r3, [r2, #-256]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-256]
	str	r3, [r2, #-260]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-260]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-236]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-216]
	b	.L1336
.L1331:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-208]
	str	r3, [r2, #-264]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-216]
	str	r3, [r2, #-268]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-268]
	cmp	r3, #0
	beq	.L1336
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-264]
	ldr	r1, [r3, #-268]
	bl	__memzero
.L1336:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-216]
	cmp	r3, #0
	beq	.L1339
	mvn	r3, #13
	b	.L1554
.L1339:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-272]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #536
	sub	r3, r3, #16
	str	r3, [r2, #-276]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #16
	str	r3, [r2, #-280]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-272]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-280]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-284]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-288]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-284]
	cmp	r3, #0
	bne	.L1341
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-272]
	str	r3, [r2, #-292]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-276]
	str	r3, [r2, #-296]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-280]
	str	r3, [r2, #-300]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-304]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-304]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-308]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-308]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-312]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-312]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-308]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-316]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-292]
	ldr	r1, [r2, #-296]
	ldr	r2, [r3, #-300]
	bl	arm_copy_to_user
	str	r0, [r4, #-300]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-316]
	str	r3, [r2, #-320]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-320]
	str	r3, [r2, #-324]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-324]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-300]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-280]
.L1341:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-280]
	cmp	r3, #0
	beq	.L1347
	mvn	r3, #13
	b	.L1554
.L1347:
	b	.L1077
.L1048:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-328]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-332]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-336]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-332]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-336]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-340]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-344]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-340]
	cmp	r3, #0
	bne	.L1349
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-328]
	str	r3, [r2, #-348]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-332]
	str	r3, [r2, #-352]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-336]
	str	r3, [r2, #-356]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-360]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-360]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-364]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-364]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-368]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-368]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-364]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-372]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-348]
	ldr	r1, [r2, #-352]
	ldr	r2, [r3, #-356]
	bl	arm_copy_from_user
	str	r0, [r4, #-356]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-372]
	str	r3, [r2, #-376]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-376]
	str	r3, [r2, #-380]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-380]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-356]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-336]
	b	.L1354
.L1349:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-328]
	str	r3, [r2, #-384]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-336]
	str	r3, [r2, #-388]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-388]
	cmp	r3, #0
	beq	.L1354
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-384]
	ldr	r1, [r3, #-388]
	bl	__memzero
.L1354:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-336]
	cmp	r3, #0
	beq	.L1357
	mvn	r3, #13
	b	.L1554
.L1357:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-392]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #536
	sub	r3, r3, #48
	str	r3, [r2, #-396]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #32
	str	r3, [r2, #-400]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-392]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-400]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-404]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-408]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-404]
	cmp	r3, #0
	bne	.L1359
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-392]
	str	r3, [r2, #-412]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-396]
	str	r3, [r2, #-416]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-400]
	str	r3, [r2, #-420]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-424]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-424]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-428]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-428]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-432]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-432]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-428]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-436]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-412]
	ldr	r1, [r2, #-416]
	ldr	r2, [r3, #-420]
	bl	arm_copy_to_user
	str	r0, [r4, #-420]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-436]
	str	r3, [r2, #-440]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-440]
	str	r3, [r2, #-444]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-444]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-420]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-400]
.L1359:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-400]
	cmp	r3, #0
	beq	.L1365
	mvn	r3, #13
	b	.L1554
.L1365:
	b	.L1077
.L1049:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-448]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-452]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-456]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-452]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-456]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-460]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-464]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-460]
	cmp	r3, #0
	bne	.L1367
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-448]
	str	r3, [r2, #-468]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-452]
	str	r3, [r2, #-472]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-456]
	str	r3, [r2, #-476]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-480]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-480]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-484]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-484]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-488]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-488]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-484]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-492]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-468]
	ldr	r1, [r2, #-472]
	ldr	r2, [r3, #-476]
	bl	arm_copy_from_user
	str	r0, [r4, #-476]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-492]
	str	r3, [r2, #-496]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-496]
	str	r3, [r2, #-500]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-500]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-476]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-456]
	b	.L1372
.L1367:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-448]
	str	r3, [r2, #-504]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-456]
	str	r3, [r2, #-508]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-508]
	cmp	r3, #0
	beq	.L1372
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-504]
	ldr	r1, [r3, #-508]
	bl	__memzero
.L1372:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-456]
	cmp	r3, #0
	beq	.L1375
	mvn	r3, #13
	b	.L1554
.L1375:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-512]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #8
	str	r3, [r2, #-516]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #24
	str	r3, [r2, #-520]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-512]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-520]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-524]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-528]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-524]
	cmp	r3, #0
	bne	.L1377
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-512]
	str	r3, [r2, #-532]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-516]
	str	r3, [r2, #-536]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-520]
	str	r3, [r2, #-540]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-544]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-544]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-548]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-548]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-552]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-552]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-548]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-556]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-532]
	ldr	r1, [r2, #-536]
	ldr	r2, [r3, #-540]
	bl	arm_copy_to_user
	str	r0, [r4, #-540]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-556]
	str	r3, [r2, #-560]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-560]
	str	r3, [r2, #-564]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-564]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-540]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-520]
.L1377:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-520]
	cmp	r3, #0
	beq	.L1383
	mvn	r3, #13
	b	.L1554
.L1383:
	b	.L1077
.L1050:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-568]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-572]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-576]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-572]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-576]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-580]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-584]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-580]
	cmp	r3, #0
	bne	.L1385
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-568]
	str	r3, [r2, #-588]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-572]
	str	r3, [r2, #-592]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-576]
	str	r3, [r2, #-596]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-600]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-600]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-604]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-604]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-608]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-608]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-604]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-612]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-588]
	ldr	r1, [r2, #-592]
	ldr	r2, [r3, #-596]
	bl	arm_copy_from_user
	str	r0, [r4, #-596]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-612]
	str	r3, [r2, #-616]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-616]
	str	r3, [r2, #-620]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-620]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-596]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-576]
	b	.L1390
.L1385:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-568]
	str	r3, [r2, #-624]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-576]
	str	r3, [r2, #-628]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-628]
	cmp	r3, #0
	beq	.L1390
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-624]
	ldr	r1, [r3, #-628]
	bl	__memzero
.L1390:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-576]
	cmp	r3, #0
	beq	.L1393
	mvn	r3, #13
	b	.L1554
.L1393:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-632]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #10
	str	r3, [r2, #-636]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #2
	str	r3, [r2, #-640]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-632]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-640]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-644]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-648]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-644]
	cmp	r3, #0
	bne	.L1395
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-632]
	str	r3, [r2, #-652]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-636]
	str	r3, [r2, #-656]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-640]
	str	r3, [r2, #-660]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-664]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-664]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-668]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-668]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-672]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-672]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-668]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-676]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-652]
	ldr	r1, [r2, #-656]
	ldr	r2, [r3, #-660]
	bl	arm_copy_to_user
	str	r0, [r4, #-660]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-676]
	str	r3, [r2, #-680]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-680]
	str	r3, [r2, #-684]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-684]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-660]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-640]
.L1395:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-640]
	cmp	r3, #0
	beq	.L1401
	mvn	r3, #13
	b	.L1554
.L1401:
	b	.L1077
.L1051:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-688]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-692]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-696]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-692]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-696]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-700]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-704]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-700]
	cmp	r3, #0
	bne	.L1403
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-688]
	str	r3, [r2, #-708]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-692]
	str	r3, [r2, #-712]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-696]
	str	r3, [r2, #-716]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-720]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-724]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-724]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-728]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-728]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-724]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-732]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-708]
	ldr	r1, [r2, #-712]
	ldr	r2, [r3, #-716]
	bl	arm_copy_from_user
	str	r0, [r4, #-716]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-732]
	str	r3, [r2, #-736]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-736]
	str	r3, [r2, #-740]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-740]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-716]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-696]
	b	.L1408
.L1403:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-688]
	str	r3, [r2, #-744]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-696]
	str	r3, [r2, #-748]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-748]
	cmp	r3, #0
	beq	.L1408
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-744]
	ldr	r1, [r3, #-748]
	bl	__memzero
.L1408:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-696]
	cmp	r3, #0
	beq	.L1411
	mvn	r3, #13
	b	.L1554
.L1411:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-752]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #32
	str	r3, [r2, #-756]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #20
	str	r3, [r2, #-760]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-752]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-760]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-764]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-768]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-764]
	cmp	r3, #0
	bne	.L1413
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-752]
	str	r3, [r2, #-772]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-756]
	str	r3, [r2, #-776]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-760]
	str	r3, [r2, #-780]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-784]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-784]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-788]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-788]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-792]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-792]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-788]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-796]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-772]
	ldr	r1, [r2, #-776]
	ldr	r2, [r3, #-780]
	bl	arm_copy_to_user
	str	r0, [r4, #-780]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-796]
	str	r3, [r2, #-800]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-800]
	str	r3, [r2, #-804]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-804]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-780]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-760]
.L1413:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-760]
	cmp	r3, #0
	beq	.L1419
	mvn	r3, #13
	b	.L1554
.L1419:
	b	.L1077
.L1052:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-808]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-812]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-816]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-812]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-816]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-820]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-824]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-820]
	cmp	r3, #0
	bne	.L1421
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-808]
	str	r3, [r2, #-828]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-812]
	str	r3, [r2, #-832]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-816]
	str	r3, [r2, #-836]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-840]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-840]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-844]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-844]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-848]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-848]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-844]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-852]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-828]
	ldr	r1, [r2, #-832]
	ldr	r2, [r3, #-836]
	bl	arm_copy_from_user
	str	r0, [r4, #-836]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-852]
	str	r3, [r2, #-856]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-856]
	str	r3, [r2, #-860]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-860]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-836]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-816]
	b	.L1426
.L1421:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-808]
	str	r3, [r2, #-864]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-816]
	str	r3, [r2, #-868]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-868]
	cmp	r3, #0
	beq	.L1426
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-864]
	ldr	r1, [r3, #-868]
	bl	__memzero
.L1426:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-816]
	cmp	r3, #0
	beq	.L1429
	mvn	r3, #13
	b	.L1554
.L1429:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-872]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #472
	sub	r3, r3, #60
	str	r3, [r2, #-876]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #20
	str	r3, [r2, #-880]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-872]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-880]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-884]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-888]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-884]
	cmp	r3, #0
	bne	.L1431
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-872]
	str	r3, [r2, #-892]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-876]
	str	r3, [r2, #-896]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-880]
	str	r3, [r2, #-900]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-904]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-904]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-908]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-908]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-912]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-912]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-908]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-916]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-892]
	ldr	r1, [r2, #-896]
	ldr	r2, [r3, #-900]
	bl	arm_copy_to_user
	str	r0, [r4, #-900]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-916]
	str	r3, [r2, #-920]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-920]
	str	r3, [r2, #-924]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-924]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-900]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-880]
.L1431:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-880]
	cmp	r3, #0
	beq	.L1437
	mvn	r3, #13
	b	.L1554
.L1437:
	b	.L1077
.L1053:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-928]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-932]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-936]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-932]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-936]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-940]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-944]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-940]
	cmp	r3, #0
	bne	.L1439
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-928]
	str	r3, [r2, #-948]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-932]
	str	r3, [r2, #-952]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-936]
	str	r3, [r2, #-956]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-960]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-960]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-964]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-964]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-968]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-968]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-964]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-972]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-948]
	ldr	r1, [r2, #-952]
	ldr	r2, [r3, #-956]
	bl	arm_copy_from_user
	str	r0, [r4, #-956]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-972]
	str	r3, [r2, #-976]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-976]
	str	r3, [r2, #-980]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-980]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-956]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-936]
	b	.L1444
.L1439:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-928]
	str	r3, [r2, #-984]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-936]
	str	r3, [r2, #-988]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-988]
	cmp	r3, #0
	beq	.L1444
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-984]
	ldr	r1, [r3, #-988]
	bl	__memzero
.L1444:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-936]
	cmp	r3, #0
	beq	.L1447
	mvn	r3, #13
	b	.L1554
.L1447:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-992]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #20
	str	r3, [r2, #-996]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #24
	str	r3, [r2, #-1000]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-992]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1000]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1004]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1008]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1004]
	cmp	r3, #0
	bne	.L1449
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-992]
	str	r3, [r2, #-1012]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-996]
	str	r3, [r2, #-1016]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1000]
	str	r3, [r2, #-1020]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1024]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1024]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1028]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1028]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1032]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1032]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1028]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1036]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1012]
	ldr	r1, [r2, #-1016]
	ldr	r2, [r3, #-1020]
	bl	arm_copy_to_user
	str	r0, [r4, #-1020]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1036]
	str	r3, [r2, #-1040]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1040]
	str	r3, [r2, #-1044]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1044]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1020]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1000]
.L1449:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1000]
	cmp	r3, #0
	beq	.L1455
	mvn	r3, #13
	b	.L1554
.L1455:
	b	.L1077
.L1054:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-1048]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-1052]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-1056]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1052]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1056]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1060]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1064]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1060]
	cmp	r3, #0
	bne	.L1457
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1048]
	str	r3, [r2, #-1068]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1052]
	str	r3, [r2, #-1072]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1056]
	str	r3, [r2, #-1076]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1080]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1080]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1084]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1084]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1088]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1088]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1084]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1092]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1068]
	ldr	r1, [r2, #-1072]
	ldr	r2, [r3, #-1076]
	bl	arm_copy_from_user
	str	r0, [r4, #-1076]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1092]
	str	r3, [r2, #-1096]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1096]
	str	r3, [r2, #-1100]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1100]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1076]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1056]
	b	.L1462
.L1457:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1048]
	str	r3, [r2, #-1104]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1056]
	str	r3, [r2, #-1108]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1108]
	cmp	r3, #0
	beq	.L1462
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-1104]
	ldr	r1, [r3, #-1108]
	bl	__memzero
.L1462:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1056]
	cmp	r3, #0
	beq	.L1465
	mvn	r3, #13
	b	.L1554
.L1465:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1112]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #32
	str	r3, [r2, #-1116]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #12
	str	r3, [r2, #-1120]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1112]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1120]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1124]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1128]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1124]
	cmp	r3, #0
	bne	.L1467
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1112]
	str	r3, [r2, #-1132]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1116]
	str	r3, [r2, #-1136]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1120]
	str	r3, [r2, #-1140]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1144]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1144]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1148]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1148]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1152]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1152]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1148]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1156]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1132]
	ldr	r1, [r2, #-1136]
	ldr	r2, [r3, #-1140]
	bl	arm_copy_to_user
	str	r0, [r4, #-1140]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1156]
	str	r3, [r2, #-1160]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1160]
	str	r3, [r2, #-1164]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1164]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1140]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1120]
.L1467:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1120]
	cmp	r3, #0
	beq	.L1473
	mvn	r3, #13
	b	.L1554
.L1473:
	b	.L1077
.L1055:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-1168]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-1172]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-1176]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1172]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1176]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1180]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1184]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1180]
	cmp	r3, #0
	bne	.L1475
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1168]
	str	r3, [r2, #-1188]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1172]
	str	r3, [r2, #-1192]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1176]
	str	r3, [r2, #-1196]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1200]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1200]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1204]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1204]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1208]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1208]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1204]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1212]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1188]
	ldr	r1, [r2, #-1192]
	ldr	r2, [r3, #-1196]
	bl	arm_copy_from_user
	str	r0, [r4, #-1196]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1212]
	str	r3, [r2, #-1216]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1216]
	str	r3, [r2, #-1220]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1220]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1196]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1176]
	b	.L1480
.L1475:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1168]
	str	r3, [r2, #-1224]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1176]
	str	r3, [r2, #-1228]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1228]
	cmp	r3, #0
	beq	.L1480
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-1224]
	ldr	r1, [r3, #-1228]
	bl	__memzero
.L1480:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1176]
	cmp	r3, #0
	beq	.L1483
	mvn	r3, #13
	b	.L1554
.L1483:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1232]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #48
	str	r3, [r2, #-1236]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #16
	str	r3, [r2, #-1240]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1232]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1240]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1244]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1248]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1244]
	cmp	r3, #0
	bne	.L1485
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1232]
	str	r3, [r2, #-1252]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1236]
	str	r3, [r2, #-1256]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1240]
	str	r3, [r2, #-1260]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1264]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1264]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1268]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1268]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1272]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1272]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1268]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1276]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1252]
	ldr	r1, [r2, #-1256]
	ldr	r2, [r3, #-1260]
	bl	arm_copy_to_user
	str	r0, [r4, #-1260]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1276]
	str	r3, [r2, #-1280]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1280]
	str	r3, [r2, #-1284]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1284]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1260]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1240]
.L1485:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1240]
	cmp	r3, #0
	beq	.L1491
	mvn	r3, #13
	b	.L1554
.L1491:
	b	.L1077
.L1056:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-1288]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-1292]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-1296]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1292]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1296]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1300]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1304]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1300]
	cmp	r3, #0
	bne	.L1493
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1288]
	str	r3, [r2, #-1308]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1292]
	str	r3, [r2, #-1312]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1296]
	str	r3, [r2, #-1316]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1320]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1320]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1324]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1324]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1328]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1328]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1324]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1332]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1308]
	ldr	r1, [r2, #-1312]
	ldr	r2, [r3, #-1316]
	bl	arm_copy_from_user
	str	r0, [r4, #-1316]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1332]
	str	r3, [r2, #-1336]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1336]
	str	r3, [r2, #-1340]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1340]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1316]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1296]
	b	.L1498
.L1493:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1288]
	str	r3, [r2, #-1344]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1296]
	str	r3, [r2, #-1348]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1348]
	cmp	r3, #0
	beq	.L1498
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-1344]
	ldr	r1, [r3, #-1348]
	bl	__memzero
.L1498:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1296]
	cmp	r3, #0
	beq	.L1501
	mvn	r3, #13
	b	.L1554
.L1501:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1352]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #56
	str	r3, [r2, #-1356]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #8
	str	r3, [r2, #-1360]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1352]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1360]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1364]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1368]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1364]
	cmp	r3, #0
	bne	.L1503
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1352]
	str	r3, [r2, #-1372]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1356]
	str	r3, [r2, #-1376]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1360]
	str	r3, [r2, #-1380]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1384]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1384]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1388]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1388]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1392]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1392]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1388]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1396]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1372]
	ldr	r1, [r2, #-1376]
	ldr	r2, [r3, #-1380]
	bl	arm_copy_to_user
	str	r0, [r4, #-1380]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1396]
	str	r3, [r2, #-1400]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1400]
	str	r3, [r2, #-1404]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1404]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1380]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1360]
.L1503:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1360]
	cmp	r3, #0
	beq	.L1509
	mvn	r3, #13
	b	.L1554
.L1509:
	b	.L1077
.L1057:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-1408]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-1412]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-1416]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1412]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1416]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1420]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1424]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1420]
	cmp	r3, #0
	bne	.L1511
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1408]
	str	r3, [r2, #-1428]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1412]
	str	r3, [r2, #-1432]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1416]
	str	r3, [r2, #-1436]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1440]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1440]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1444]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1444]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1448]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1448]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1444]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1452]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1428]
	ldr	r1, [r2, #-1432]
	ldr	r2, [r3, #-1436]
	bl	arm_copy_from_user
	str	r0, [r4, #-1436]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1452]
	str	r3, [r2, #-1456]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1456]
	str	r3, [r2, #-1460]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1460]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1436]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1416]
	b	.L1516
.L1511:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1408]
	str	r3, [r2, #-1464]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1416]
	str	r3, [r2, #-1468]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1468]
	cmp	r3, #0
	beq	.L1516
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-1464]
	ldr	r1, [r3, #-1468]
	bl	__memzero
.L1516:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1416]
	cmp	r3, #0
	beq	.L1519
	mvn	r3, #13
	b	.L1554
.L1519:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1472]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #408
	sub	r3, r3, #60
	str	r3, [r2, #-1476]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #4
	str	r3, [r2, #-1480]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1472]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1480]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1484]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1488]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1484]
	cmp	r3, #0
	bne	.L1521
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1472]
	str	r3, [r2, #-1492]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1476]
	str	r3, [r2, #-1496]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1480]
	str	r3, [r2, #-1500]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1504]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1504]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1508]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1508]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1512]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1512]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1508]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1516]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1492]
	ldr	r1, [r2, #-1496]
	ldr	r2, [r3, #-1500]
	bl	arm_copy_to_user
	str	r0, [r4, #-1500]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1516]
	str	r3, [r2, #-1520]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1520]
	str	r3, [r2, #-1524]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1524]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1500]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1480]
.L1521:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1480]
	cmp	r3, #0
	beq	.L1527
	mvn	r3, #13
	b	.L1554
.L1527:
	b	.L1077
.L1058:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-1528]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-1532]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-1536]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1532]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1536]
#APP
@ 545 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1540]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1544]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1540]
	cmp	r3, #0
	bne	.L1529
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1528]
	str	r3, [r2, #-1548]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1532]
	str	r3, [r2, #-1552]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1536]
	str	r3, [r2, #-1556]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1560]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1560]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1564]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1564]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1568]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1568]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1564]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1572]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1548]
	ldr	r1, [r2, #-1552]
	ldr	r2, [r3, #-1556]
	bl	arm_copy_from_user
	str	r0, [r4, #-1556]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1572]
	str	r3, [r2, #-1576]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1576]
	str	r3, [r2, #-1580]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1580]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1556]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1536]
	b	.L1534
.L1529:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1528]
	str	r3, [r2, #-1584]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1536]
	str	r3, [r2, #-1588]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1588]
	cmp	r3, #0
	beq	.L1534
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r2, #-1584]
	ldr	r1, [r3, #-1588]
	bl	__memzero
.L1534:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1536]
	cmp	r3, #0
	beq	.L1537
	mvn	r3, #13
	b	.L1554
.L1537:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1720]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1592]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #344
	str	r3, [r2, #-1596]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #4
	str	r3, [r2, #-1600]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1592]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1600]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1604]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1608]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1604]
	cmp	r3, #0
	bne	.L1539
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1592]
	str	r3, [r2, #-1612]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1596]
	str	r3, [r2, #-1616]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1600]
	str	r3, [r2, #-1620]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1624]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1624]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1628]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1628]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1632]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1632]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1628]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1636]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1612]
	ldr	r1, [r2, #-1616]
	ldr	r2, [r3, #-1620]
	bl	arm_copy_to_user
	str	r0, [r4, #-1620]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1636]
	str	r3, [r2, #-1640]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1640]
	str	r3, [r2, #-1644]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1644]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1620]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1600]
.L1539:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1600]
	cmp	r3, #0
	beq	.L1545
	mvn	r3, #13
	b	.L1554
.L1545:
	b	.L1077
.L1030:
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-2316]
	str	r3, [r2, #-1648]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #600
	str	r3, [r2, #-1652]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	mov	r3, #28
	str	r3, [r2, #-1656]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
	ldr	r3, [r3, #8]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r1, [r2, #-1648]
	add	r2, sp, #2320
	add	r2, r2, #8
	ldr	r0, [r2, #-1656]
#APP
@ 554 "./arch/arm/include/asm/uaccess.h" 1
	adds r2, r1, r0; sbcccs r2, r2, r3; movcc r3, #0
@ 0 "" 2
	add	r1, sp, #2320
	add	r1, r1, #8
	str	r3, [r1, #-1660]
	add	r3, sp, #2320
	add	r3, r3, #8
	str	r2, [r3, #-1664]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1660]
	cmp	r3, #0
	bne	.L1547
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1648]
	str	r3, [r2, #-1668]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1652]
	str	r3, [r2, #-1672]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1656]
	str	r3, [r2, #-1676]
	mov	r3, sp
	bic	r3, r3, #16320
	bic	r3, r3, #63
#APP
@ 91 "./arch/arm/include/asm/domain.h" 1
	mrc	p15, 0, r3, c3, c0	@ get domain
@ 0 "" 2
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1680]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1680]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1684]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1684]
	bic	r3, r3, #12
	orr	r3, r3, #4
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1688]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1688]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1684]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1692]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r4, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r1, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r0, [r1, #-1668]
	ldr	r1, [r2, #-1672]
	ldr	r2, [r3, #-1676]
	bl	arm_copy_to_user
	str	r0, [r4, #-1676]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1692]
	str	r3, [r2, #-1696]
	add	r3, sp, #2320
	add	r3, r3, #8
	mov	r2, r3
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1696]
	str	r3, [r2, #-1700]
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1700]
#APP
@ 101 "./arch/arm/include/asm/domain.h" 1
	mcr	p15, 0, r3, c3, c0	@ set domain
@ 0 "" 2
@ 104 "./arch/arm/include/asm/domain.h" 1
	isb 
@ 0 "" 2
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1676]
	add	r2, sp, #2320
	add	r2, r2, #8
	str	r3, [r2, #-1656]
.L1547:
	add	r3, sp, #2320
	add	r3, r3, #8
	ldr	r3, [r3, #-1656]
	cmp	r3, #0
	beq	.L1553
	mvn	r3, #13
	b	.L1554
.L1553:
	mov	r0, r0	@ nop
.L1077:
	add	r3, sp, #6400
	add	r3, r3, #20
	ldr	r3, [r3]
.L1554:
	mov	r0, r3
	add	sp, sp, #6400
	add	sp, sp, #24
	@ sp needed
	ldmfd	sp!, {r4, pc}
	.fnend
	.size	qdma_ioctl, .-qdma_ioctl
	.global	qdma_fops
	.data
	.align	2
	.type	qdma_fops, %object
	.size	qdma_fops, 108
qdma_fops:
	.word	__this_module
	.space	28
	.word	qdma_ioctl
	.space	72
	.section	.rodata.str1.4
	.align	2
.LC55:
	.ascii	"%s: %s [%d]: QDMA Device destroy successful\012\000"
	.text
	.align	2
	.global	qdma_dev_destroy
	.type	qdma_dev_destroy, %function
qdma_dev_destroy:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #12
	sub	sp, sp, #12
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L1559
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r3, [r3]
	mov	r0, r3
	bl	cdev_del
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	mov	r2, #0
	str	r2, [r3]
.L1559:
	mov	r3, #124780544
	str	r3, [sp, #4]
	ldr	r0, [sp, #4]
	mov	r1, #1
	bl	unregister_chrdev_region
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrb	r3, [r3, #541]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1558
	movw	r0, #:lower16:.LC55
	movt	r0, #:upper16:.LC55
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L1561
	movw	r3, #3554
	bl	printk
.L1558:
	add	sp, sp, #12
	@ sp needed
	ldr	pc, [sp], #4
.L1562:
	.align	2
.L1561:
	.word	.LC4+60
	.fnend
	.size	qdma_dev_destroy, .-qdma_dev_destroy
	.align	2
	.global	qdma_dev_trtcm_cfg_init
	.type	qdma_dev_trtcm_cfg_init, %function
qdma_dev_trtcm_cfg_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	str	r3, [sp, #28]
	mov	r3, #16
	str	r3, [sp, #24]
	ldr	r3, [sp, #24]
	cmp	r3, #0
	beq	.L1564
	ldr	r0, [sp, #28]
	ldr	r1, [sp, #24]
	bl	__memzero
.L1564:
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	str	r3, [sp, #20]
	mov	r3, #16
	str	r3, [sp, #16]
	ldr	r3, [sp, #16]
	cmp	r3, #0
	beq	.L1565
	ldr	r0, [sp, #20]
	ldr	r1, [sp, #16]
	bl	__memzero
.L1565:
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	str	r3, [sp, #12]
	mov	r3, #16
	str	r3, [sp, #8]
	ldr	r3, [sp, #8]
	cmp	r3, #0
	beq	.L1566
	ldr	r0, [sp, #12]
	ldr	r1, [sp, #8]
	bl	__memzero
.L1566:
	ldr	r3, [sp, #4]
	add	r2, r3, #112
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	str	r2, [r3]
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	mov	r2, #1024
	str	r2, [r3]
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	mov	r2, #16
	str	r2, [r3]
	ldr	r3, [sp, #4]
	add	r3, r3, #4416
	add	r3, r3, #16
	movw	r2, #:lower16:trtcmCfgBase
	movt	r2, #:upper16:trtcmCfgBase
	str	r3, [r2, #4]
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	mov	r2, #1024
	str	r2, [r3, #4]
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	mov	r2, #16
	str	r2, [r3, #4]
	ldr	r3, [sp, #4]
	add	r3, r3, #4096
	add	r3, r3, #16
	movw	r2, #:lower16:trtcmCfgBase
	movt	r2, #:upper16:trtcmCfgBase
	str	r3, [r2, #8]
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	mov	r2, #1024
	str	r2, [r3, #8]
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	mov	r2, #16
	str	r2, [r3, #8]
	ldr	r3, [sp, #4]
	add	r2, r3, #4224
	movw	r3, #:lower16:trtcmCfgBase
	movt	r3, #:upper16:trtcmCfgBase
	str	r2, [r3, #12]
	movw	r3, #:lower16:trtcmBucketByteUnit
	movt	r3, #:upper16:trtcmBucketByteUnit
	mov	r2, #256
	str	r2, [r3, #12]
	movw	r3, #:lower16:trtcmBucketPacketUnit
	movt	r3, #:upper16:trtcmBucketPacketUnit
	mov	r2, #256
	str	r2, [r3, #12]
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dev_trtcm_cfg_init, .-qdma_dev_trtcm_cfg_init
	.align	2
	.global	qdma_dev_ratelimit_init
	.type	qdma_dev_ratelimit_init, %function
qdma_dev_ratelimit_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #12
	sub	sp, sp, #12
	str	r0, [sp, #4]
	mov	r0, #3
	mov	r1, #1
	bl	generalSetTrtcmRateEnable
	mov	r0, #3
	mov	r1, #25
	bl	generalSetTrtcmFastTick
	mov	r0, #3
	mov	r1, #40
	bl	generalSetTrtcmSlowTickRatio
	mov	r0, #2
	mov	r1, #1
	bl	generalSetTrtcmRateEnable
	mov	r0, #2
	mov	r1, #25
	bl	generalSetTrtcmFastTick
	mov	r0, #2
	mov	r1, #40
	bl	generalSetTrtcmSlowTickRatio
	mov	r0, #0
	mov	r1, #1
	bl	generalSetTrtcmRateEnable
	mov	r0, #0
	mov	r1, #125
	bl	generalSetTrtcmFastTick
	mov	r0, #0
	mov	r1, #8
	bl	generalSetTrtcmSlowTickRatio
	mov	r0, #1
	mov	r1, #1
	bl	generalSetTrtcmRateEnable
	mov	r0, #1
	mov	r1, #25
	bl	generalSetTrtcmFastTick
	mov	r0, #1
	mov	r1, #40
	bl	generalSetTrtcmSlowTickRatio
	mov	r0, #0
	mov	r1, #1
	bl	generalSetTrtcmMode
	bl	qdmaSetRxRatelimitDefaultConfig
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #12
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dev_ratelimit_init, .-qdma_dev_ratelimit_init
	.align	2
	.global	qdma_dev_aging_init
	.type	qdma_dev_aging_init, %function
qdma_dev_aging_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #28
	sub	sp, sp, #28
	str	r0, [sp, #4]
	ldr	r3, [sp, #4]
	add	r3, r3, #4224
	add	r3, r3, #60
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #20]
	ldr	r3, [sp, #4]
	add	r3, r3, #4224
	add	r3, r3, #60
	ldr	r2, [sp, #20]
	orr	r2, r2, #-2147483648
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #4224
	add	r3, r3, #60
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r3, [sp, #4]
	add	r3, r3, #4224
	add	r3, r3, #60
	ldr	r2, [sp, #16]
	bic	r2, r2, #1073741824
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #4224
	add	r3, r3, #60
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	add	r3, r3, #4224
	add	r3, r3, #60
	ldr	r2, [sp, #12]
	orr	r2, r2, #536870912
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #28
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dev_aging_init, .-qdma_dev_aging_init
	.align	2
	.global	qdma_dev_sdn_cntr_init
	.type	qdma_dev_sdn_cntr_init, %function
qdma_dev_sdn_cntr_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 72
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #76
	sub	sp, sp, #76
	str	r0, [sp, #4]
	add	r3, sp, #20
	str	r3, [sp, #68]
	mov	r3, #28
	str	r3, [sp, #64]
	ldr	r3, [sp, #64]
	cmp	r3, #0
	beq	.L1573
	ldr	r0, [sp, #68]
	ldr	r1, [sp, #64]
	bl	__memzero
.L1573:
	add	r3, sp, #12
	str	r3, [sp, #60]
	mov	r3, #8
	str	r3, [sp, #56]
	ldr	r3, [sp, #56]
	cmp	r3, #0
	beq	.L1574
	ldr	r0, [sp, #60]
	ldr	r1, [sp, #56]
	bl	__memzero
.L1574:
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #52]
	ldr	r3, [sp, #4]
	add	r2, r3, #2048
	ldr	r3, [sp, #52]
	orr	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r3, [sp, #4]
	add	r3, r3, #2048
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #48]
	ldr	r3, [sp, #4]
	add	r2, r3, #2048
	ldr	r3, [sp, #48]
	orr	r3, r3, #8
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
	strb	r3, [sp, #12]
	mov	r3, #63
	strb	r3, [sp, #13]
	mov	r3, #2
	str	r3, [sp, #16]
	add	r3, sp, #12
	str	r3, [sp, #28]
	add	r3, sp, #20
	mov	r0, r3
	bl	qdma_clear_flow_cntr_value
	mov	r3, #1
	strb	r3, [sp, #12]
	mov	r3, #31
	strb	r3, [sp, #13]
	mov	r3, #2
	str	r3, [sp, #16]
	add	r3, sp, #12
	str	r3, [sp, #28]
	add	r3, sp, #20
	mov	r0, r3
	bl	qdma_clear_flow_cntr_value
	mov	r3, #2
	strb	r3, [sp, #12]
	mov	r3, #127
	strb	r3, [sp, #13]
	mov	r3, #2
	str	r3, [sp, #16]
	add	r3, sp, #12
	str	r3, [sp, #28]
	add	r3, sp, #20
	mov	r0, r3
	bl	qdma_clear_flow_cntr_value
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #76
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dev_sdn_cntr_init, .-qdma_dev_sdn_cntr_init
	.align	2
	.global	qdma_dev_multicast_init
	.type	qdma_dev_multicast_init, %function
qdma_dev_multicast_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #36
	sub	sp, sp, #36
	str	r0, [sp, #4]
	mov	r3, #0
	str	r3, [sp, #28]
	mov	r3, #0
	str	r3, [sp, #28]
	b	.L1577
.L1580:
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r3, r3, #2176
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #24]
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r0, r3, #2176
	ldr	r3, [sp, #24]
	bic	r2, r3, #33292288
	bic	r2, r2, #196608
	movw	r3, #:lower16:MULTICAST_FORCE_PORT
	movt	r3, #:upper16:MULTICAST_FORCE_PORT
	ldr	r1, [sp, #28]
	ldr	r3, [r3, r1, asl #2]
	mov	r1, r3, asl #16
	mov	r3, #0
	movt	r3, 511
	and	r3, r3, r1
	orr	r3, r2, r3
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r3, r3, #2176
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #20]
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r0, r3, #2176
	ldr	r3, [sp, #20]
	mov	r3, r3, lsr #16
	mov	r3, r3, asl #16
	movw	r2, #:lower16:MULTICAST_SPECIAL_TAG
	movt	r2, #:upper16:MULTICAST_SPECIAL_TAG
	ldr	r1, [sp, #28]
	ldr	r2, [r2, r1, asl #2]
	uxth	r2, r2
	orr	r3, r3, r2
	mov	r1, r3
	bl	set_frame_engine_data
	movw	r3, #:lower16:MULTICAST_KEEP_SPTAG_HIFIELD
	movt	r3, #:upper16:MULTICAST_KEEP_SPTAG_HIFIELD
	ldr	r2, [sp, #28]
	ldr	r3, [r3, r2, asl #2]
	cmp	r3, #0
	beq	.L1578
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r3, r3, #2176
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #16]
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r2, r3, #2176
	ldr	r3, [sp, #16]
	orr	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L1579
.L1578:
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r3, r3, #2176
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r3, [sp, #28]
	mov	r3, r3, asl #2
	mov	r2, r3
	ldr	r3, [sp, #4]
	add	r3, r2, r3
	add	r2, r3, #2176
	ldr	r3, [sp, #12]
	bic	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L1579:
	ldr	r3, [sp, #28]
	add	r3, r3, #1
	str	r3, [sp, #28]
.L1577:
	ldr	r3, [sp, #28]
	cmp	r3, #15
	ble	.L1580
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #36
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dev_multicast_init, .-qdma_dev_multicast_init
	.align	2
	.global	qdma_dev_hqos_init
	.type	qdma_dev_hqos_init, %function
qdma_dev_hqos_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	.save {lr}
	.pad #20
	sub	sp, sp, #20
	str	r0, [sp, #4]
	movw	r3, #:lower16:qdmaLanHqosMode
	movt	r3, #:upper16:qdmaLanHqosMode
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L1583
	ldr	r3, [sp, #4]
	add	r3, r3, #144
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #12]
	ldr	r3, [sp, #4]
	add	r2, r3, #144
	ldr	r3, [sp, #12]
	orr	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	b	.L1584
.L1583:
	ldr	r3, [sp, #4]
	add	r3, r3, #144
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #8]
	ldr	r3, [sp, #4]
	add	r2, r3, #144
	ldr	r3, [sp, #8]
	bic	r3, r3, #-2147483648
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
.L1584:
	mov	r3, #0
	mov	r0, r3
	add	sp, sp, #20
	@ sp needed
	ldr	pc, [sp], #4
	.fnend
	.size	qdma_dev_hqos_init, .-qdma_dev_hqos_init
	.section	.rodata.str1.4
	.align	2
.LC56:
	.ascii	"%s: %s [%d]: Get the QDMA device number (register_c"
	.ascii	"hrdev_region()) failed\012\000"
	.align	2
.LC57:
	.ascii	"%s: %s [%d]: Alloc character device (cdev_alloc()) "
	.ascii	"failed\012\000"
	.align	2
.LC58:
	.ascii	"%s: %s [%d]: QDMA driver register failed\012\000"
	.align	2
.LC59:
	.ascii	"%s: %s [%d]: QDMA initialization successful\012\000"
	.text
	.align	2
	.global	qdma_dev_init
	.type	qdma_dev_init, %function
qdma_dev_init:
	.fnstart
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, lr}
	.save {r4, lr}
	.pad #168
	sub	sp, sp, #168
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldr	r3, [r3]
	str	r3, [sp, #144]
	mov	r3, #0
	str	r3, [sp, #164]
	mov	r3, #0
	str	r3, [sp, #160]
	mov	r3, #0
	str	r3, [sp, #156]
	mov	r3, #0
	str	r3, [sp, #152]
	mov	r3, #0
	str	r3, [sp, #148]
	ldr	r0, [sp, #144]
	bl	qdma_dev_trtcm_cfg_init
	movw	r3, #:lower16:qdma_vip_info
	movt	r3, #:upper16:qdma_vip_info
	str	r3, [sp, #140]
	mov	r3, #192
	str	r3, [sp, #136]
	ldr	r3, [sp, #136]
	cmp	r3, #0
	beq	.L1587
	ldr	r0, [sp, #140]
	ldr	r1, [sp, #136]
	bl	__memzero
.L1587:
	ldr	r3, [sp, #144]
	add	r3, r3, #32
	mov	r0, r3
	mvn	r1, #0
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #36
	mov	r0, r3
	mvn	r1, #0
	bl	set_frame_engine_data
	ldr	r0, [sp, #144]
	mov	r1, #1
	bl	qdmaSetIntBind
	ldr	r0, [sp, #144]
	mov	r1, #2
	bl	qdmaSetIntBind
	ldr	r0, [sp, #144]
	mov	r1, #3
	bl	qdmaSetIntBind
	ldr	r0, [sp, #144]
	mov	r1, #4
	bl	qdmaSetIntBind
	ldr	r0, [sp, #144]
	mov	r1, #1
	bl	qdmaSetIrqBind
	ldr	r0, [sp, #144]
	mov	r1, #2
	bl	qdmaSetIrqBind
	ldr	r3, [sp, #164]
	orr	r3, r3, #67108864
	str	r3, [sp, #164]
	ldr	r3, [sp, #164]
	orr	r3, r3, #32
	str	r3, [sp, #164]
	ldr	r3, [sp, #164]
	orr	r3, r3, #268435456
	str	r3, [sp, #164]
	ldr	r3, [sp, #164]
	orr	r3, r3, #1610612736
	str	r3, [sp, #164]
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrh	r3, [r3, #100]
	cmp	r3, #0
	beq	.L1588
	ldr	r3, [sp, #164]
	orr	r3, r3, #524288
	str	r3, [sp, #164]
.L1588:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrh	r3, [r3, #102]
	cmp	r3, #0
	beq	.L1589
	ldr	r3, [sp, #164]
	orr	r3, r3, #1048576
	str	r3, [sp, #164]
.L1589:
	ldr	r3, [sp, #164]
	orr	r3, r3, #-2147483648
	str	r3, [sp, #164]
	ldr	r3, [sp, #164]
	orr	r3, r3, #64
	str	r3, [sp, #164]
	ldr	r3, [sp, #164]
	orr	r3, r3, #35651584
	str	r3, [sp, #164]
	ldr	r3, [sp, #144]
	add	r3, r3, #4
	mov	r0, r3
	ldr	r1, [sp, #164]
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #32
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #132]
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #32
	ldr	r2, [sp, #132]
	bic	r2, r2, #-2147483648
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #32
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #128]
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #32
	ldr	r2, [sp, #128]
	orr	r2, r2, #8
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #124]
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	ldr	r2, [sp, #124]
	orr	r2, r2, #-2147483648
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #120]
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	ldr	r2, [sp, #120]
	orr	r2, r2, #131072
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #116]
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	ldr	r2, [sp, #116]
	orr	r2, r2, #126976
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #12
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #112]
	ldr	r3, [sp, #144]
	add	r2, r3, #4096
	add	r2, r2, #12
	ldr	r3, [sp, #112]
	mvn	r3, r3, lsr #11
	mvn	r3, r3, asl #11
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r0, [sp, #144]
	bl	qdma_dev_ratelimit_init
	ldr	r3, [sp, #144]
	add	r3, r3, #260
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #108]
	ldr	r3, [sp, #144]
	add	r2, r3, #260
	ldr	r3, [sp, #108]
	orr	r3, r3, #4
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	mov	r3, #0
	str	r3, [sp, #152]
	b	.L1590
.L1591:
	ldr	r3, [sp, #152]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #144]
	add	r3, r2, r3
	add	r3, r3, #260
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #104]
	ldr	r3, [sp, #152]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #144]
	add	r3, r2, r3
	add	r2, r3, #260
	ldr	r3, [sp, #104]
	bic	r3, r3, #2
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r3, [sp, #152]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #144]
	add	r3, r2, r3
	add	r3, r3, #260
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #100]
	ldr	r3, [sp, #152]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #144]
	add	r3, r2, r3
	add	r2, r3, #260
	ldr	r3, [sp, #100]
	bic	r3, r3, #1
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r3, [sp, #152]
	add	r3, r3, #1
	str	r3, [sp, #152]
.L1590:
	ldr	r3, [sp, #152]
	cmp	r3, #7
	bls	.L1591
	mov	r3, #0
	str	r3, [sp, #8]
	add	r3, sp, #8
	str	r3, [sp, #28]
	add	r3, sp, #20
	mov	r0, r3
	bl	qdma_set_txq_cngst_auto_config
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #96]
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	ldr	r2, [sp, #96]
	orr	r2, r2, #262144
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #92]
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	ldr	r2, [sp, #92]
	orr	r2, r2, #131072
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #88]
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	ldr	r2, [sp, #88]
	orr	r2, r2, #65536
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	ldr	r3, [sp, #144]
	add	r3, r3, #4224
	add	r3, r3, #32
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #84]
	ldr	r3, [sp, #144]
	add	r2, r3, #4224
	add	r2, r2, #32
	ldr	r3, [sp, #84]
	mov	r3, r3, lsr #16
	mov	r3, r3, asl #16
	orr	r3, r3, #250
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r0, [sp, #144]
	mov	r1, #0
	bl	qdmaSetDynCngstDeiThrhScale
	bl	qdma_set_dbg_cntr_default_config
	ldr	r0, [sp, #144]
	bl	qdma_dev_aging_init
	ldr	r0, [sp, #144]
	bl	qdma_dev_sdn_cntr_init
	ldr	r0, [sp, #144]
	bl	qdma_dev_multicast_init
	ldr	r0, [sp, #144]
	bl	qdma_dev_hqos_init
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #44
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #80]
	ldr	r3, [sp, #144]
	add	r3, r3, #4096
	add	r3, r3, #44
	ldr	r2, [sp, #80]
	orr	r2, r2, #128
	mov	r0, r3
	mov	r1, r2
	bl	set_frame_engine_data
	movw	r3, #:lower16:channel_limit_threshold
	movt	r3, #:upper16:channel_limit_threshold
	mov	r2, #65536
	str	r2, [r3]
	movw	r3, #:lower16:queue_limit_threshold
	movt	r3, #:upper16:queue_limit_threshold
	mov	r2, #128
	str	r2, [r3]
	mov	r3, #0
	str	r3, [sp, #160]
	b	.L1592
.L1609:
	mov	r3, #0
	str	r3, [sp, #4]
	ldr	r3, [sp, #160]
	mov	r2, r3, asl #2
	movw	r3, #:lower16:chnlLimit
	movt	r3, #:upper16:chnlLimit
	add	r3, r2, r3
	str	r3, [sp, #68]
	add	r3, sp, #4
	str	r3, [sp, #64]
	mov	r3, #4
	str	r3, [sp, #60]
	ldr	r3, [sp, #60]
	sub	r3, r3, #1
	cmp	r3, #7
	ldrls	pc, [pc, r3, asl #2]
	b	.L1593
.L1595:
	.word	.L1594
	.word	.L1596
	.word	.L1593
	.word	.L1597
	.word	.L1593
	.word	.L1593
	.word	.L1593
	.word	.L1598
.L1594:
	ldr	r3, [sp, #64]
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [sp, #68]
	strb	r2, [r3]
	b	.L1599
.L1596:
	ldr	r3, [sp, #64]
	ldrh	r2, [r3]
	ldr	r3, [sp, #68]
	strh	r2, [r3]	@ movhi
	b	.L1599
.L1597:
	ldr	r3, [sp, #64]
	ldr	r2, [r3]
	ldr	r3, [sp, #68]
	str	r2, [r3]
	b	.L1599
.L1598:
	ldr	r3, [sp, #64]
	ldrd	r2, [r3]
	ldr	r1, [sp, #68]
	strd	r2, [r1]
	b	.L1599
.L1593:
	ldr	r3, [sp, #60]
	ldr	r1, [sp, #68]
	ldr	r2, [sp, #64]
	mov	r0, r1
	mov	r1, r2
	mov	r2, r3
	bl	memcpy
.L1599:
	mov	r3, #0
	str	r3, [sp, #156]
	b	.L1600
.L1608:
	mov	r3, #0
	str	r3, [sp]
	ldr	r3, [sp, #160]
	mov	r2, r3, asl #3
	ldr	r3, [sp, #156]
	add	r3, r2, r3
	mov	r2, r3, asl #2
	movw	r3, #:lower16:queueLimit
	movt	r3, #:upper16:queueLimit
	add	r3, r2, r3
	str	r3, [sp, #56]
	mov	r3, sp
	str	r3, [sp, #52]
	mov	r3, #4
	str	r3, [sp, #48]
	ldr	r3, [sp, #48]
	sub	r3, r3, #1
	cmp	r3, #7
	ldrls	pc, [pc, r3, asl #2]
	b	.L1601
.L1603:
	.word	.L1602
	.word	.L1604
	.word	.L1601
	.word	.L1605
	.word	.L1601
	.word	.L1601
	.word	.L1601
	.word	.L1606
.L1602:
	ldr	r3, [sp, #52]
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [sp, #56]
	strb	r2, [r3]
	b	.L1607
.L1604:
	ldr	r3, [sp, #52]
	ldrh	r2, [r3]
	ldr	r3, [sp, #56]
	strh	r2, [r3]	@ movhi
	b	.L1607
.L1605:
	ldr	r3, [sp, #52]
	ldr	r2, [r3]
	ldr	r3, [sp, #56]
	str	r2, [r3]
	b	.L1607
.L1606:
	ldr	r3, [sp, #52]
	ldrd	r2, [r3]
	ldr	r1, [sp, #56]
	strd	r2, [r1]
	b	.L1607
.L1601:
	ldr	r3, [sp, #48]
	ldr	r1, [sp, #56]
	ldr	r2, [sp, #52]
	mov	r0, r1
	mov	r1, r2
	mov	r2, r3
	bl	memcpy
.L1607:
	ldr	r3, [sp, #156]
	add	r3, r3, #1
	str	r3, [sp, #156]
.L1600:
	ldr	r3, [sp, #156]
	cmp	r3, #7
	bls	.L1608
	ldr	r3, [sp, #160]
	add	r3, r3, #1
	str	r3, [sp, #160]
.L1592:
	ldr	r3, [sp, #160]
	cmp	r3, #31
	bls	.L1609
	mov	r3, #0
	str	r3, [sp, #152]
	b	.L1610
.L1611:
	ldr	r3, [sp, #152]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #144]
	add	r3, r2, r3
	add	r3, r3, #528
	mov	r0, r3
	bl	get_frame_engine_data
	mov	r3, r0
	str	r3, [sp, #76]
	ldr	r3, [sp, #152]
	mov	r2, r3, asl #5
	ldr	r3, [sp, #144]
	add	r3, r2, r3
	add	r2, r3, #528
	ldr	r3, [sp, #76]
	mov	r3, r3, lsr #16
	mov	r3, r3, asl #16
	mov	r0, r2
	mov	r1, r3
	bl	set_frame_engine_data
	ldr	r3, [sp, #152]
	add	r3, r3, #1
	str	r3, [sp, #152]
.L1610:
	ldr	r3, [sp, #152]
	cmp	r3, #15
	bls	.L1611
	mov	r3, #124780544
	str	r3, [sp, #72]
	ldr	r0, [sp, #72]
	mov	r1, #1
	movw	r2, #:lower16:.LC3
	movt	r2, #:upper16:.LC3
	bl	register_chrdev_region
	str	r0, [sp, #148]
	ldr	r3, [sp, #148]
	cmp	r3, #0
	bge	.L1612
	movw	r0, #:lower16:.LC56
	movt	r0, #:upper16:.LC56
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L1620
	movw	r3, #3922
	bl	printk
	ldr	r3, [sp, #148]
	b	.L1619
.L1612:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	add	r3, r3, #1472
	add	r3, r3, #4
	movw	r2, #:lower16:gpQdmaDev
	movt	r2, #:upper16:gpQdmaDev
	str	r3, [r2]
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r4, [r3]
	bl	cdev_alloc
	mov	r3, r0
	str	r3, [r4]
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1614
	movw	r0, #:lower16:.LC57
	movt	r0, #:upper16:.LC57
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L1620
	movw	r3, #3929
	bl	printk
	mvn	r3, #11
	str	r3, [sp, #148]
	b	.L1615
.L1614:
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r3, [r3]
	mov	r0, r3
	movw	r1, #:lower16:qdma_fops
	movt	r1, #:upper16:qdma_fops
	bl	cdev_init
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r2, [r3]
	movw	r3, #:lower16:__this_module
	movt	r3, #:upper16:__this_module
	str	r3, [r2, #36]
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r2, [r3]
	movw	r3, #:lower16:qdma_fops
	movt	r3, #:upper16:qdma_fops
	str	r3, [r2, #40]
	movw	r3, #:lower16:gpQdmaDev
	movt	r3, #:upper16:gpQdmaDev
	ldr	r3, [r3]
	ldr	r3, [r3]
	mov	r0, r3
	ldr	r1, [sp, #72]
	mov	r2, #1
	bl	cdev_add
	str	r0, [sp, #148]
	ldr	r3, [sp, #148]
	cmp	r3, #0
	bge	.L1616
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrb	r3, [r3, #541]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1617
	movw	r0, #:lower16:.LC58
	movt	r0, #:upper16:.LC58
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L1620
	movw	r3, #3939
	bl	printk
	b	.L1615
.L1617:
	b	.L1615
.L1616:
	movw	r3, #:lower16:gpQdmaPriv
	movt	r3, #:upper16:gpQdmaPriv
	ldr	r3, [r3]
	ldrb	r3, [r3, #541]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1618
	movw	r0, #:lower16:.LC59
	movt	r0, #:upper16:.LC59
	movw	r1, #:lower16:.LC3
	movt	r1, #:upper16:.LC3
	ldr	r2, .L1620
	movw	r3, #3943
	bl	printk
.L1618:
	mov	r3, #0
	b	.L1619
.L1615:
	bl	qdma_dev_destroy
	ldr	r3, [sp, #148]
.L1619:
	mov	r0, r3
	add	sp, sp, #168
	@ sp needed
	ldmfd	sp!, {r4, pc}
.L1621:
	.align	2
.L1620:
	.word	.LC4+60
	.fnend
	.size	qdma_dev_init, .-qdma_dev_init
	.local	i.52204
	.comm	i.52204,4,4
	.ident	"GCC: (Buildroot 2015.08.1-gd814875) 4.9.3"
	.section	.note.GNU-stack,"",%progbits