mirror of
https://github.com/physwizz/a155-U-u1.git
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340 lines
8.3 KiB
C
340 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// AMD ALSA SoC PCM Driver
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//
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//Copyright 2016 Advanced Micro Devices, Inc.
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <linux/dma-mapping.h>
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#include "acp3x.h"
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#define DRV_NAME "acp3x_i2s_playcap"
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static int acp3x_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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struct i2s_dev_data *adata;
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int mode;
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adata = snd_soc_dai_get_drvdata(cpu_dai);
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mode = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
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switch (mode) {
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case SND_SOC_DAIFMT_I2S:
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adata->tdm_mode = TDM_DISABLE;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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adata->tdm_mode = TDM_ENABLE;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai,
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u32 tx_mask, u32 rx_mask, int slots, int slot_width)
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{
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struct i2s_dev_data *adata;
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u32 frm_len;
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u16 slot_len;
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adata = snd_soc_dai_get_drvdata(cpu_dai);
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/* These values are as per Hardware Spec */
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switch (slot_width) {
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case SLOT_WIDTH_8:
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slot_len = 8;
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break;
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case SLOT_WIDTH_16:
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slot_len = 16;
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break;
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case SLOT_WIDTH_24:
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slot_len = 24;
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break;
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case SLOT_WIDTH_32:
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slot_len = 0;
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break;
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default:
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return -EINVAL;
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}
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frm_len = FRM_LEN | (slots << 15) | (slot_len << 18);
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adata->tdm_fmt = frm_len;
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return 0;
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}
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static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct i2s_stream_instance *rtd;
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struct snd_soc_pcm_runtime *prtd;
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struct snd_soc_card *card;
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struct acp3x_platform_info *pinfo;
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struct i2s_dev_data *adata;
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u32 val;
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u32 reg_val, frmt_reg;
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prtd = asoc_substream_to_rtd(substream);
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rtd = substream->runtime->private_data;
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card = prtd->card;
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adata = snd_soc_dai_get_drvdata(dai);
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pinfo = snd_soc_card_get_drvdata(card);
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if (pinfo) {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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rtd->i2s_instance = pinfo->play_i2s_instance;
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else
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rtd->i2s_instance = pinfo->cap_i2s_instance;
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}
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/* These values are as per Hardware Spec */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_U8:
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case SNDRV_PCM_FORMAT_S8:
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rtd->xfer_resolution = 0x0;
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break;
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case SNDRV_PCM_FORMAT_S16_LE:
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rtd->xfer_resolution = 0x02;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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rtd->xfer_resolution = 0x04;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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rtd->xfer_resolution = 0x05;
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break;
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default:
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return -EINVAL;
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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reg_val = mmACP_BTTDM_ITER;
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frmt_reg = mmACP_BTTDM_TXFRMT;
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_val = mmACP_I2STDM_ITER;
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frmt_reg = mmACP_I2STDM_TXFRMT;
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}
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} else {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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reg_val = mmACP_BTTDM_IRER;
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frmt_reg = mmACP_BTTDM_RXFRMT;
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_val = mmACP_I2STDM_IRER;
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frmt_reg = mmACP_I2STDM_RXFRMT;
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}
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}
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if (adata->tdm_mode) {
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val = rv_readl(rtd->acp3x_base + reg_val);
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rv_writel(val | 0x2, rtd->acp3x_base + reg_val);
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rv_writel(adata->tdm_fmt, rtd->acp3x_base + frmt_reg);
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}
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val = rv_readl(rtd->acp3x_base + reg_val);
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val &= ~ACP3x_ITER_IRER_SAMP_LEN_MASK;
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val = val | (rtd->xfer_resolution << 3);
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rv_writel(val, rtd->acp3x_base + reg_val);
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return 0;
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}
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static int acp3x_i2s_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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struct i2s_stream_instance *rtd;
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u32 ret, val, period_bytes, reg_val, ier_val, water_val;
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u32 buf_size, buf_reg;
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rtd = substream->runtime->private_data;
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period_bytes = frames_to_bytes(substream->runtime,
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substream->runtime->period_size);
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buf_size = frames_to_bytes(substream->runtime,
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substream->runtime->buffer_size);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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rtd->bytescount = acp_get_byte_count(rtd,
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substream->stream);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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water_val =
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mmACP_BT_TX_INTR_WATERMARK_SIZE;
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reg_val = mmACP_BTTDM_ITER;
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ier_val = mmACP_BTTDM_IER;
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buf_reg = mmACP_BT_TX_RINGBUFSIZE;
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break;
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case I2S_SP_INSTANCE:
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default:
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water_val =
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mmACP_I2S_TX_INTR_WATERMARK_SIZE;
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reg_val = mmACP_I2STDM_ITER;
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ier_val = mmACP_I2STDM_IER;
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buf_reg = mmACP_I2S_TX_RINGBUFSIZE;
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}
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} else {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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water_val =
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mmACP_BT_RX_INTR_WATERMARK_SIZE;
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reg_val = mmACP_BTTDM_IRER;
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ier_val = mmACP_BTTDM_IER;
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buf_reg = mmACP_BT_RX_RINGBUFSIZE;
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break;
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case I2S_SP_INSTANCE:
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default:
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water_val =
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mmACP_I2S_RX_INTR_WATERMARK_SIZE;
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reg_val = mmACP_I2STDM_IRER;
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ier_val = mmACP_I2STDM_IER;
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buf_reg = mmACP_I2S_RX_RINGBUFSIZE;
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}
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}
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rv_writel(period_bytes, rtd->acp3x_base + water_val);
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rv_writel(buf_size, rtd->acp3x_base + buf_reg);
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val = rv_readl(rtd->acp3x_base + reg_val);
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val = val | BIT(0);
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rv_writel(val, rtd->acp3x_base + reg_val);
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rv_writel(1, rtd->acp3x_base + ier_val);
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ret = 0;
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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reg_val = mmACP_BTTDM_ITER;
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_val = mmACP_I2STDM_ITER;
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}
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} else {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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reg_val = mmACP_BTTDM_IRER;
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_val = mmACP_I2STDM_IRER;
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}
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}
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val = rv_readl(rtd->acp3x_base + reg_val);
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val = val & ~BIT(0);
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rv_writel(val, rtd->acp3x_base + reg_val);
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if (!(rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER) & BIT(0)) &&
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!(rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER) & BIT(0)))
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rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER);
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if (!(rv_readl(rtd->acp3x_base + mmACP_I2STDM_ITER) & BIT(0)) &&
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!(rv_readl(rtd->acp3x_base + mmACP_I2STDM_IRER) & BIT(0)))
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rv_writel(0, rtd->acp3x_base + mmACP_I2STDM_IER);
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ret = 0;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static struct snd_soc_dai_ops acp3x_i2s_dai_ops = {
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.hw_params = acp3x_i2s_hwparams,
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.trigger = acp3x_i2s_trigger,
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.set_fmt = acp3x_i2s_set_fmt,
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.set_tdm_slot = acp3x_i2s_set_tdm_slot,
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};
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static const struct snd_soc_component_driver acp3x_dai_component = {
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.name = DRV_NAME,
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};
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static struct snd_soc_dai_driver acp3x_i2s_dai = {
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.playback = {
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &acp3x_i2s_dai_ops,
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};
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static int acp3x_dai_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct i2s_dev_data *adata;
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int ret;
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adata = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dev_data),
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GFP_KERNEL);
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if (!adata)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
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return -ENOMEM;
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}
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adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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if (!adata->acp3x_base)
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return -ENOMEM;
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adata->i2s_irq = res->start;
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dev_set_drvdata(&pdev->dev, adata);
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ret = devm_snd_soc_register_component(&pdev->dev,
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&acp3x_dai_component, &acp3x_i2s_dai, 1);
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if (ret) {
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dev_err(&pdev->dev, "Fail to register acp i2s dai\n");
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return -ENODEV;
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}
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return 0;
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}
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static int acp3x_dai_remove(struct platform_device *pdev)
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{
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/* As we use devm_ memory alloc there is nothing TBD here */
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return 0;
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}
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static struct platform_driver acp3x_dai_driver = {
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.probe = acp3x_dai_probe,
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.remove = acp3x_dai_remove,
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.driver = {
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.name = "acp3x_i2s_playcap",
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},
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};
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module_platform_driver(acp3x_dai_driver);
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MODULE_AUTHOR("Vishnuvardhanrao.Ravulapati@amd.com");
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MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:"DRV_NAME);
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