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255 lines
9.1 KiB
C
255 lines
9.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Device Tree defines for LCM settings
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#include "mtk_lcm_lk_settings.h"
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#ifndef MTK_LCM_SETTINGS_H
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#define MTK_LCM_SETTINGS_H
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#define MAX_UINT32 ((u32)~0U)
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#define MAX_INT32 ((s32)(MAX_UINT32 >> 1))
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#define MTK_PANEL_TABLE_OPS_COUNT 1024
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#define MTK_PANEL_COMPARE_ID_LENGTH 10
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#define MTK_PANEL_ATA_ID_LENGTH 10
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#define BL_PWM_MODE 0
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#define BL_I2C_MODE 1
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/* LCM PHY TYPE*/
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#define MTK_LCM_MIPI_DPHY 0
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#define MTK_LCM_MIPI_CPHY 1
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#define MTK_LCM_MIPI_PHY_COUNT (MTK_LCM_MIPI_CPHY + 1)
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/*redefine "mipi_dsi_pixel_format" from enum to macro for dts settings*/
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#define MTK_MIPI_DSI_FMT_RGB888 0
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#define MTK_MIPI_DSI_FMT_RGB666 1
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#define MTK_MIPI_DSI_FMT_RGB666_PACKED 2
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#define MTK_MIPI_DSI_FMT_RGB565 3
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/*redefine MTK_PANEL_OUTPUT_MODE from enum to macro for dts settings */
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#define MTK_LCM_PANEL_SINGLE_PORT 0
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#define MTK_LCM_PANEL_DSC_SINGLE_PORT 1
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#define MTK_LCM_PANEL_DUAL_PORT 2
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/*redefine "mtk_drm_color_mode" from enum to macro for dts settings*/
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#define MTK_LCM_COLOR_MODE_NATIVE 0
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#define MTK_LCM_COLOR_MODE_STANDARD_BT601_625 1
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#define MTK_LCM_COLOR_MODE_STANDARD_BT601_625_UNADJUSTED 2
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#define MTK_LCM_COLOR_MODE_STANDARD_BT601_525 3
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#define MTK_LCM_COLOR_MODE_STANDARD_BT601_525_UNADJUSTED 4
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#define MTK_LCM_COLOR_MODE_STANDARD_BT709 5
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#define MTK_LCM_COLOR_MODE_DCI_P3 6
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#define MTK_LCM_COLOR_MODE_SRGB 7
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#define MTK_LCM_COLOR_MODE_ADOBE_RGB 8
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#define MTK_LCM_COLOR_MODE_DISPLAY_P3 9
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/*redefine "MIPITX_PHY_LANE_SWAP" from enum to macro for dts settings*/
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#define LCM_LANE_0 0
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#define LCM_LANE_1 1
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#define LCM_LANE_2 2
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#define LCM_LANE_3 3
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#define LCM_LANE_CK 4
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#define LCM_LANE_RX 5
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/*redefine DSI mode flags to fix build error*/
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/*video mode */
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#define MTK_MIPI_DSI_MODE_VIDEO (1U << 0)
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/*video burst mode */
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#define MTK_MIPI_DSI_MODE_VIDEO_BURST (1U << 1)
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/*video pulse mode */
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#define MTK_MIPI_DSI_MODE_VIDEO_SYNC_PULSE (1U << 2)
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/*enable auto vertical count mode */
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#define MTK_MIPI_DSI_MODE_VIDEO_AUTO_VERT (1U << 3)
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/*enable hsync-end packets in vsync-pulse and v-porch area */
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#define MTK_MIPI_DSI_MODE_VIDEO_HSE (1U << 4)
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/*disable hfront-porch area */
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#define MTK_MIPI_DSI_MODE_VIDEO_HFP (1U << 5)
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/*disable hback-porch area */
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#define MTK_MIPI_DSI_MODE_VIDEO_HBP (1U << 6)
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/*disable hsync-active area */
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#define MTK_MIPI_DSI_MODE_VIDEO_HSA (1U << 7)
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/*flush display FIFO on vsync pulse */
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#define MTK_MIPI_DSI_MODE_VSYNC_FLUSH (1U << 8)
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/*disable EoT packets in HS mode */
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#define MTK_MIPI_DSI_MODE_EOT_PACKET (1U << 9)
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/*device supports non-continuous clock behavior (DSI spec 5.6.1) */
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#define MTK_MIPI_DSI_CLOCK_NON_CONTINUOUS (1U << 10)
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/*transmit data in low power */
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#define MTK_MIPI_DSI_MODE_LPM (1U << 11)
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/*disable BLLP area */
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#define MTK_MIPI_DSI_MODE_VIDEO_BLLP (1U << 12)
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/*disable EOF BLLP area */
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#define MTK_MIPI_DSI_MODE_VIDEO_EOF_BLLP (1U << 13)
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/* redefine enum TE_TYPE to macro for dts settings*/
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#define MTK_LCM_NORMAL_TE 0
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#define MTK_LCM_REQUEST_TE 1
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#define MTK_LCM_MULTI_TE 2
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#define MTK_LCM_TRIGGER_LEVEL_TE 4
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/* LCM_FUNC used for common operation */
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#define MTK_LCM_FUNC_DBI 0
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#define MTK_LCM_FUNC_DPI 1
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#define MTK_LCM_FUNC_DSI 2
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#define MTK_LCM_FUNC_END (MTK_LCM_FUNC_DSI + 1)
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/* 0~127: used for common panel operation
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* customer is forbidden to use common panel operation
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* for dtsi settings
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*/
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#define MTK_LCM_UTIL_TYPE_HEX_START 00
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#define MTK_LCM_UTIL_TYPE_HEX_RESET 01
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#define MTK_LCM_UTIL_TYPE_HEX_POWER_ON 02
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#define MTK_LCM_UTIL_TYPE_HEX_POWER_OFF 03
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#define MTK_LCM_UTIL_TYPE_HEX_POWER_VOLTAGE 04
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#define MTK_LCM_UTIL_TYPE_HEX_MDELAY 05
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#define MTK_LCM_UTIL_TYPE_HEX_UDELAY 06
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#define MTK_LCM_UTIL_TYPE_HEX_TDELAY 07
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#define MTK_LCM_UTIL_TYPE_HEX_END 0f
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#define MTK_LCM_CMD_TYPE_HEX_START 10
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#define MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 11
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#define MTK_LCM_CMD_TYPE_HEX_WRITE_CMD 12
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#define MTK_LCM_CMD_TYPE_HEX_READ_BUFFER 13
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#define MTK_LCM_CMD_TYPE_HEX_READ_CMD 14
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/*mipi dcs write by condition*/
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#define MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER_CONDITION 15
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/*mipi dcs write runtime input data*/
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#define MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER_RUNTIME_INPUT 16
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#define MTK_LCM_CMD_TYPE_HEX_END 1f
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#define MTK_LCM_CB_TYPE_HEX_START 20
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/*runtime executed in callback*/
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#define MTK_LCM_CB_TYPE_HEX_RUNTIME 21
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/*runtime executed with single input*/
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#define MTK_LCM_CB_TYPE_HEX_RUNTIME_INPUT 22
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/*runtime executed with multiple input*/
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#define MTK_LCM_CB_TYPE_HEX_RUNTIME_INPUT_MULTIPLE 23
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#define MTK_LCM_CB_TYPE_HEX_END 2f
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#define MTK_LCM_GPIO_TYPE_HEX_START 30
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#define MTK_LCM_GPIO_TYPE_HEX_MODE 31
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#define MTK_LCM_GPIO_TYPE_HEX_DIR_OUTPUT 32
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#define MTK_LCM_GPIO_TYPE_HEX_DIR_INPUT 33
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#define MTK_LCM_GPIO_TYPE_HEX_OUT 34
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#define MTK_LCM_GPIO_TYPE_HEX_END 3f
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#define MTK_LCM_LK_TYPE_HEX_START 40
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/*lk write dcs data w/ force update*/
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#define MTK_LCM_LK_TYPE_HEX_WRITE_PARAM 41
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/*lk dcs data count*/
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_COUNT 42
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/*lk fixed dcs data value of 32bit*/
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM 43
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/*lk fixed dcs data value of 8bit*/
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_FIX_BIT 44
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_X0_MSB_BIT 45
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_X0_LSB_BIT 46
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_X1_MSB_BIT 47
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_X1_LSB_BIT 48
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_Y0_MSB_BIT 49
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_Y0_LSB_BIT 4a
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_Y1_MSB_BIT 4b
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#define MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_Y1_LSB_BIT 4c
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#define MTK_LCM_LK_TYPE_HEX_WRITE_PARAM_UNFORCE 4d
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#define MTK_LCM_LK_TYPE_HEX_END 4f
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/* 128~223: used for customization panel operation
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* customer operation can add operation here
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*/
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#define MTK_LCM_CUST_TYPE_HEX_START 80
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#define MTK_LCM_CUST_TYPE_HEX_END df
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#define MTK_LCM_PHASE_TYPE_HEX_START f0
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#define MTK_LCM_PHASE_TYPE_HEX_END f1
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#define MTK_LCM_TYPE_HEX_END ff
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#define MTK_LCM_UTIL_RESET_LOW 00
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#define MTK_LCM_UTIL_RESET_HIGH 01
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#define MTK_LCM_PHASE_HEX_KERNEL 01
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#define MTK_LCM_PHASE_HEX_LK 02
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#define MTK_LCM_PHASE_HEX_LK_DISPLAY_ON_DELAY 04
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/*used for runtime input settings */
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#define MTK_LCM_INPUT_TYPE_HEX_READBACK 01
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#define MTK_LCM_INPUT_TYPE_HEX_CURRENT_FPS 02
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#define MTK_LCM_INPUT_TYPE_HEX_CURRENT_BACKLIGHT 03
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/* 0~127: used for common panel operation
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* customer is forbidden to use common panel operation
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* for source code
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*/
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#define MTK_LCM_UTIL_TYPE_START 0x00
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#define MTK_LCM_UTIL_TYPE_RESET 0x01
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#define MTK_LCM_UTIL_TYPE_POWER_ON 0x02
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#define MTK_LCM_UTIL_TYPE_POWER_OFF 0x03
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#define MTK_LCM_UTIL_TYPE_POWER_VOLTAGE 0x04
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#define MTK_LCM_UTIL_TYPE_MDELAY 0x05
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#define MTK_LCM_UTIL_TYPE_UDELAY 0x06
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#define MTK_LCM_UTIL_TYPE_TDELAY 0x07
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#define MTK_LCM_UTIL_TYPE_END 0x0f
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#define MTK_LCM_CMD_TYPE_START 0x10
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#define MTK_LCM_CMD_TYPE_WRITE_BUFFER 0x11
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#define MTK_LCM_CMD_TYPE_WRITE_CMD 0x12
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#define MTK_LCM_CMD_TYPE_READ_BUFFER 0x13
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#define MTK_LCM_CMD_TYPE_READ_CMD 0x14
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#define MTK_LCM_CMD_TYPE_WRITE_BUFFER_CONDITION 0x15
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#define MTK_LCM_CMD_TYPE_WRITE_BUFFER_RUNTIME_INPUT 0x16
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#define MTK_LCM_CMD_TYPE_END 0x1f
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#define MTK_LCM_CB_TYPE_START 0x20
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#define MTK_LCM_CB_TYPE_RUNTIME 0x21
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#define MTK_LCM_CB_TYPE_RUNTIME_INPUT 0x22
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#define MTK_LCM_CB_TYPE_RUNTIME_INPUT_MULTIPLE 0x23
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#define MTK_LCM_CB_TYPE_END 0x2f
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#define MTK_LCM_GPIO_TYPE_START 0x30
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#define MTK_LCM_GPIO_TYPE_MODE 0x31
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#define MTK_LCM_GPIO_TYPE_DIR_OUTPUT 0x32
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#define MTK_LCM_GPIO_TYPE_DIR_INPUT 0x33
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#define MTK_LCM_GPIO_TYPE_OUT 0x34
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#define MTK_LCM_GPIO_TYPE_END 0x3f
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#define MTK_LCM_LK_TYPE_START 0x40
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#define MTK_LCM_LK_TYPE_WRITE_PARAM 0x41
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_COUNT 0x42
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM 0x43
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_FIX_BIT 0x44
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_X0_MSB_BIT 0x45
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_X0_LSB_BIT 0x46
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_X1_MSB_BIT 0x47
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_X1_LSB_BIT 0x48
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_Y0_MSB_BIT 0x49
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_Y0_LSB_BIT 0x4a
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_Y1_MSB_BIT 0x4b
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#define MTK_LCM_LK_TYPE_PREPARE_PARAM_Y1_LSB_BIT 0x4c
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#define MTK_LCM_LK_TYPE_WRITE_PARAM_UNFORCE 0x4d
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#define MTK_LCM_LK_TYPE_END 0x4f
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/* 128~223: used for customization panel operation
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* customer operation can add operation here
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*/
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#define MTK_LCM_CUST_TYPE_START 0x80
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#define MTK_LCM_CUST_TYPE_END 0xdf
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#define MTK_LCM_PHASE_TYPE_START 0xf0
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#define MTK_LCM_PHASE_TYPE_END 0xf1
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#define MTK_LCM_TYPE_END 0xff
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#define MTK_LCM_PHASE_KERNEL 0x01
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#define MTK_LCM_PHASE_LK 0x02
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#define MTK_LCM_PHASE_LK_DISPLAY_ON_DELAY 0x04
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/*used for runtime input settings */
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#define MTK_LCM_INPUT_TYPE_READBACK 0x01
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#define MTK_LCM_INPUT_TYPE_CURRENT_FPS 0x02
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#define MTK_LCM_INPUT_TYPE_CURRENT_BACKLIGHT 0x03
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#endif
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