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https://github.com/physwizz/a155-U-u1.git
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51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020 MediaTek Inc.
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*/
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#ifndef _DT_BINDINGS_MT635X_AUXADC_H
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#define _DT_BINDINGS_MT635X_AUXADC_H
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/* PMIC MT635x AUXADC channels */
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#define AUXADC_BATADC 0x00
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#define AUXADC_ISENSE 0x01
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#define AUXADC_VCDT 0x02
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#define AUXADC_BAT_TEMP 0x03
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#define AUXADC_BATID 0x04
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#define AUXADC_CHIP_TEMP 0x05
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#define AUXADC_VCORE_TEMP 0x06
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#define AUXADC_VPROC_TEMP 0x07
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#define AUXADC_VGPU_TEMP 0x08
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#define AUXADC_ACCDET 0x09
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#define AUXADC_VDCXO 0x0a
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#define AUXADC_TSX_TEMP 0x0b
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#define AUXADC_HPOFS_CAL 0x0c
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#define AUXADC_DCXO_TEMP 0x0d
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#define AUXADC_VBIF 0x0e
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#define AUXADC_IMP 0x0f
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#define AUXADC_IMIX_R 0x10
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#define AUXADC_VTREF 0x11
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#define AUXADC_VSYSSNS 0x12
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#define AUXADC_VIN1 0x13
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#define AUXADC_VIN2 0x14
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#define AUXADC_VIN3 0x15
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#define AUXADC_VIN4 0x16
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#define AUXADC_VIN5 0x17
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#define AUXADC_VIN6 0x18
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#define AUXADC_VIN7 0x19
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#define AUXADC_CHAN_MIN AUXADC_BATADC
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#define AUXADC_CHAN_MAX AUXADC_VIN7
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#define ADC_PURES_100K (0)
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#define ADC_PURES_30K (1)
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#define ADC_PURES_400K (2)
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#define ADC_PURES_OPEN (3)
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#define ADC_PURES_100K_MASK (ADC_PURES_100K << 8)
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#define ADC_PURES_30K_MASK (ADC_PURES_30K << 8)
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#define ADC_PURES_400K_MASK (ADC_PURES_400K << 8)
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#define ADC_PURES_OPEN_MASK (ADC_PURES_OPEN << 8)
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#endif /* _DT_BINDINGS_MT635X_AUXADC_H */
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