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https://github.com/physwizz/a155-U-u1.git
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101 lines
1.9 KiB
C
101 lines
1.9 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/* QLogic qed NIC Driver
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* Copyright (c) 2015-2017 QLogic Corporation
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* Copyright (c) 2019-2020 Marvell International Ltd.
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*/
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#ifndef _QED_INIT_OPS_H
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#define _QED_INIT_OPS_H
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#include <linux/types.h>
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#include <linux/slab.h>
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#include "qed.h"
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/**
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* @brief qed_init_iro_array - init iro_arr.
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*
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*
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* @param cdev
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*/
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void qed_init_iro_array(struct qed_dev *cdev);
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/**
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* @brief qed_init_run - Run the init-sequence.
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*
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*
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* @param p_hwfn
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* @param p_ptt
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* @param phase
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* @param phase_id
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* @param modes
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* @return _qed_status_t
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*/
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int qed_init_run(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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int phase,
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int phase_id,
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int modes);
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/**
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* @brief qed_init_hwfn_allocate - Allocate RT array, Store 'values' ptrs.
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*
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*
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* @param p_hwfn
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*
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* @return _qed_status_t
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*/
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int qed_init_alloc(struct qed_hwfn *p_hwfn);
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/**
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* @brief qed_init_hwfn_deallocate
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*
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*
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* @param p_hwfn
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*/
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void qed_init_free(struct qed_hwfn *p_hwfn);
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/**
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* @brief qed_init_store_rt_reg - Store a configuration value in the RT array.
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*
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*
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* @param p_hwfn
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* @param rt_offset
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* @param val
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*/
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void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn,
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u32 rt_offset,
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u32 val);
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#define STORE_RT_REG(hwfn, offset, val) \
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qed_init_store_rt_reg(hwfn, offset, val)
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#define OVERWRITE_RT_REG(hwfn, offset, val) \
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qed_init_store_rt_reg(hwfn, offset, val)
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/**
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* @brief
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*
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*
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* @param p_hwfn
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* @param rt_offset
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* @param val
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* @param size
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*/
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void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn,
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u32 rt_offset,
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u32 *val,
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size_t size);
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#define STORE_RT_REG_AGG(hwfn, offset, val) \
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qed_init_store_rt_agg(hwfn, offset, (u32 *)&val, sizeof(val))
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/**
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* @brief
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* Initialize GTT global windows and set admin window
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* related params of GTT/PTT to default values.
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*
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* @param p_hwfn
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*/
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void qed_gtt_init(struct qed_hwfn *p_hwfn);
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#endif
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