mirror of
https://github.com/physwizz/a155-U-u1.git
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612 lines
19 KiB
C
612 lines
19 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_H_
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#define _ICE_H_
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/firmware.h>
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#include <linux/netdevice.h>
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#include <linux/compiler.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/cpumask.h>
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#include <linux/rtnetlink.h>
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#include <linux/if_vlan.h>
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#include <linux/dma-mapping.h>
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#include <linux/pci.h>
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#include <linux/workqueue.h>
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#include <linux/wait.h>
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#include <linux/aer.h>
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#include <linux/interrupt.h>
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#include <linux/ethtool.h>
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#include <linux/timer.h>
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#include <linux/delay.h>
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#include <linux/bitmap.h>
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#include <linux/log2.h>
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#include <linux/ip.h>
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#include <linux/sctp.h>
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#include <linux/ipv6.h>
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#include <linux/pkt_sched.h>
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#include <linux/if_bridge.h>
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#include <linux/ctype.h>
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#include <linux/bpf.h>
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#include <linux/avf/virtchnl.h>
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#include <linux/cpu_rmap.h>
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#include <net/devlink.h>
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#include <net/ipv6.h>
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#include <net/xdp_sock.h>
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#include <net/geneve.h>
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#include <net/gre.h>
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#include <net/udp_tunnel.h>
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#include <net/vxlan.h>
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#include "ice_devids.h"
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#include "ice_type.h"
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#include "ice_txrx.h"
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#include "ice_dcb.h"
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#include "ice_switch.h"
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#include "ice_common.h"
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#include "ice_sched.h"
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#include "ice_virtchnl_pf.h"
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#include "ice_sriov.h"
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#include "ice_fdir.h"
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#include "ice_xsk.h"
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#include "ice_arfs.h"
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#define ICE_BAR0 0
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#define ICE_REQ_DESC_MULTIPLE 32
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#define ICE_MIN_NUM_DESC 64
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#define ICE_MAX_NUM_DESC 8160
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#define ICE_DFLT_MIN_RX_DESC 512
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#define ICE_DFLT_NUM_TX_DESC 256
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#define ICE_DFLT_NUM_RX_DESC 2048
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#define ICE_DFLT_TRAFFIC_CLASS BIT(0)
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#define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
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#define ICE_AQ_LEN 64
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#define ICE_MBXSQ_LEN 64
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#define ICE_MIN_LAN_TXRX_MSIX 1
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#define ICE_MIN_LAN_OICR_MSIX 1
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#define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
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#define ICE_FDIR_MSIX 1
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#define ICE_NO_VSI 0xffff
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#define ICE_VSI_MAP_CONTIG 0
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#define ICE_VSI_MAP_SCATTER 1
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#define ICE_MAX_SCATTER_TXQS 16
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#define ICE_MAX_SCATTER_RXQS 16
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#define ICE_Q_WAIT_RETRY_LIMIT 10
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#define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
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#define ICE_MAX_LG_RSS_QS 256
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#define ICE_RES_VALID_BIT 0x8000
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#define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1)
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#define ICE_INVAL_Q_INDEX 0xffff
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#define ICE_INVAL_VFID 256
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#define ICE_MAX_RESET_WAIT 20
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#define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
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#define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
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#define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
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#define ICE_UP_TABLE_TRANSLATE(val, i) \
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(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
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ICE_AQ_VSI_UP_TABLE_UP##i##_M)
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#define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
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#define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
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#define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
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#define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
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/* Macro for each VSI in a PF */
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#define ice_for_each_vsi(pf, i) \
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for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
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/* Macros for each Tx/Rx ring in a VSI */
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#define ice_for_each_txq(vsi, i) \
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for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
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#define ice_for_each_rxq(vsi, i) \
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for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
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/* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
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#define ice_for_each_alloc_txq(vsi, i) \
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for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
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#define ice_for_each_alloc_rxq(vsi, i) \
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for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
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#define ice_for_each_q_vector(vsi, i) \
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for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
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#define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
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ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
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#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
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ICE_PROMISC_MCAST_TX | \
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ICE_PROMISC_UCAST_RX | \
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ICE_PROMISC_MCAST_RX | \
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ICE_PROMISC_VLAN_TX | \
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ICE_PROMISC_VLAN_RX)
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#define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
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#define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
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ICE_PROMISC_MCAST_RX | \
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ICE_PROMISC_VLAN_TX | \
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ICE_PROMISC_VLAN_RX)
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#define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
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struct ice_txq_meta {
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u32 q_teid; /* Tx-scheduler element identifier */
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u16 q_id; /* Entry in VSI's txq_map bitmap */
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u16 q_handle; /* Relative index of Tx queue within TC */
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u16 vsi_idx; /* VSI index that Tx queue belongs to */
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u8 tc; /* TC number that Tx queue belongs to */
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};
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struct ice_tc_info {
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u16 qoffset;
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u16 qcount_tx;
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u16 qcount_rx;
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u8 netdev_tc;
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};
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struct ice_tc_cfg {
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u8 numtc; /* Total number of enabled TCs */
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u8 ena_tc; /* Tx map */
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struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
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};
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struct ice_res_tracker {
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u16 num_entries;
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u16 end;
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u16 list[1];
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};
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struct ice_qs_cfg {
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struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
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unsigned long *pf_map;
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unsigned long pf_map_size;
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unsigned int q_count;
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unsigned int scatter_count;
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u16 *vsi_map;
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u16 vsi_map_offset;
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u8 mapping_mode;
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};
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struct ice_sw {
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struct ice_pf *pf;
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u16 sw_id; /* switch ID for this switch */
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u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
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struct ice_vsi *dflt_vsi; /* default VSI for this switch */
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u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */
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};
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enum ice_state {
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__ICE_TESTING,
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__ICE_DOWN,
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__ICE_NEEDS_RESTART,
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__ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
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__ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
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__ICE_PFR_REQ, /* set by driver and peers */
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__ICE_CORER_REQ, /* set by driver and peers */
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__ICE_GLOBR_REQ, /* set by driver and peers */
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__ICE_CORER_RECV, /* set by OICR handler */
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__ICE_GLOBR_RECV, /* set by OICR handler */
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__ICE_EMPR_RECV, /* set by OICR handler */
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__ICE_SUSPENDED, /* set on module remove path */
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__ICE_RESET_FAILED, /* set by reset/rebuild */
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/* When checking for the PF to be in a nominal operating state, the
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* bits that are grouped at the beginning of the list need to be
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* checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will
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* be checked. If you need to add a bit into consideration for nominal
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* operating state, it must be added before
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* __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
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* without appropriate consideration.
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*/
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__ICE_STATE_NOMINAL_CHECK_BITS,
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__ICE_ADMINQ_EVENT_PENDING,
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__ICE_MAILBOXQ_EVENT_PENDING,
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__ICE_MDD_EVENT_PENDING,
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__ICE_VFLR_EVENT_PENDING,
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__ICE_FLTR_OVERFLOW_PROMISC,
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__ICE_VF_DIS,
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__ICE_CFG_BUSY,
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__ICE_SERVICE_SCHED,
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__ICE_SERVICE_DIS,
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__ICE_FD_FLUSH_REQ,
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__ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
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__ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
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__ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
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__ICE_LINK_DEFAULT_OVERRIDE_PENDING,
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__ICE_PHY_INIT_COMPLETE,
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__ICE_STATE_NBITS /* must be last */
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};
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enum ice_vsi_flags {
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ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
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ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
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ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
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ICE_VSI_FLAG_PROMISC_CHANGED,
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ICE_VSI_FLAG_NBITS /* must be last */
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};
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/* struct that defines a VSI, associated with a dev */
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struct ice_vsi {
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struct net_device *netdev;
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struct ice_sw *vsw; /* switch this VSI is on */
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struct ice_pf *back; /* back pointer to PF */
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struct ice_port_info *port_info; /* back pointer to port_info */
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struct ice_ring **rx_rings; /* Rx ring array */
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struct ice_ring **tx_rings; /* Tx ring array */
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struct ice_q_vector **q_vectors; /* q_vector array */
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irqreturn_t (*irq_handler)(int irq, void *data);
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u64 tx_linearize;
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DECLARE_BITMAP(state, __ICE_STATE_NBITS);
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DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
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unsigned int current_netdev_flags;
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u32 tx_restart;
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u32 tx_busy;
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u32 rx_buf_failed;
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u32 rx_page_failed;
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u32 rx_gro_dropped;
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u16 num_q_vectors;
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u16 base_vector; /* IRQ base for OS reserved vectors */
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enum ice_vsi_type type;
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u16 vsi_num; /* HW (absolute) index of this VSI */
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u16 idx; /* software index in pf->vsi[] */
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s16 vf_id; /* VF ID for SR-IOV VSIs */
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u16 ethtype; /* Ethernet protocol for pause frame */
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u16 num_gfltr;
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u16 num_bfltr;
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/* RSS config */
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u16 rss_table_size; /* HW RSS table size */
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u16 rss_size; /* Allocated RSS queues */
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u8 *rss_hkey_user; /* User configured hash keys */
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u8 *rss_lut_user; /* User configured lookup table entries */
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u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
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/* aRFS members only allocated for the PF VSI */
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#define ICE_MAX_ARFS_LIST 1024
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#define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
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struct hlist_head *arfs_fltr_list;
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struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
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spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
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atomic_t *arfs_last_fltr_id;
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/* devlink port data */
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struct devlink_port devlink_port;
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bool devlink_port_registered;
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u16 max_frame;
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u16 rx_buf_len;
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struct ice_aqc_vsi_props info; /* VSI properties */
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/* VSI stats */
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struct rtnl_link_stats64 net_stats;
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struct ice_eth_stats eth_stats;
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struct ice_eth_stats eth_stats_prev;
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struct list_head tmp_sync_list; /* MAC filters to be synced */
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struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
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u8 irqs_ready:1;
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u8 current_isup:1; /* Sync 'link up' logging */
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u8 stat_offsets_loaded:1;
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u8 vlan_ena:1;
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u16 num_vlan;
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/* queue information */
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u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
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u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
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u16 *txq_map; /* index in pf->avail_txqs */
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u16 *rxq_map; /* index in pf->avail_rxqs */
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u16 alloc_txq; /* Allocated Tx queues */
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u16 num_txq; /* Used Tx queues */
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u16 alloc_rxq; /* Allocated Rx queues */
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u16 num_rxq; /* Used Rx queues */
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u16 req_txq; /* User requested Tx queues */
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u16 req_rxq; /* User requested Rx queues */
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u16 num_rx_desc;
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u16 num_tx_desc;
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struct ice_tc_cfg tc_cfg;
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struct bpf_prog *xdp_prog;
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struct ice_ring **xdp_rings; /* XDP ring array */
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u16 num_xdp_txq; /* Used XDP queues */
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u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
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struct xsk_buff_pool **xsk_pools;
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u16 num_xsk_pools_used;
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u16 num_xsk_pools;
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} ____cacheline_internodealigned_in_smp;
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/* struct that defines an interrupt vector */
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struct ice_q_vector {
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struct ice_vsi *vsi;
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u16 v_idx; /* index in the vsi->q_vector array. */
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u16 reg_idx;
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u8 num_ring_rx; /* total number of Rx rings in vector */
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u8 num_ring_tx; /* total number of Tx rings in vector */
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u8 itr_countdown; /* when 0 should adjust adaptive ITR */
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/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
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* value to the device
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*/
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u8 intrl;
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struct napi_struct napi;
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struct ice_ring_container rx;
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struct ice_ring_container tx;
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cpumask_t affinity_mask;
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struct irq_affinity_notify affinity_notify;
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char name[ICE_INT_NAME_STR_LEN];
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} ____cacheline_internodealigned_in_smp;
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enum ice_pf_flags {
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ICE_FLAG_FLTR_SYNC,
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ICE_FLAG_RSS_ENA,
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ICE_FLAG_SRIOV_ENA,
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ICE_FLAG_SRIOV_CAPABLE,
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ICE_FLAG_DCB_CAPABLE,
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ICE_FLAG_DCB_ENA,
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ICE_FLAG_FD_ENA,
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ICE_FLAG_ADV_FEATURES,
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ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
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ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
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ICE_FLAG_NO_MEDIA,
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ICE_FLAG_FW_LLDP_AGENT,
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ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
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ICE_FLAG_LEGACY_RX,
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ICE_FLAG_VF_TRUE_PROMISC_ENA,
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ICE_FLAG_MDD_AUTO_RESET_VF,
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ICE_FLAG_LINK_LENIENT_MODE_ENA,
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ICE_PF_FLAGS_NBITS /* must be last */
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};
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struct ice_pf {
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struct pci_dev *pdev;
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struct devlink_region *nvm_region;
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struct devlink_region *devcaps_region;
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/* OS reserved IRQ details */
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struct msix_entry *msix_entries;
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struct ice_res_tracker *irq_tracker;
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/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
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* number of MSIX vectors needed for all SR-IOV VFs from the number of
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* MSIX vectors allowed on this PF.
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*/
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u16 sriov_base_vector;
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u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
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struct ice_vsi **vsi; /* VSIs created by the driver */
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struct ice_sw *first_sw; /* first switch created by firmware */
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/* Virtchnl/SR-IOV config info */
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struct ice_vf *vf;
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u16 num_alloc_vfs; /* actual number of VFs allocated */
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u16 num_vfs_supported; /* num VFs supported for this PF */
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u16 num_qps_per_vf;
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u16 num_msix_per_vf;
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/* used to ratelimit the MDD event logging */
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unsigned long last_printed_mdd_jiffies;
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DECLARE_BITMAP(state, __ICE_STATE_NBITS);
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DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
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unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
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unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
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unsigned long serv_tmr_period;
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unsigned long serv_tmr_prev;
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struct timer_list serv_tmr;
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struct work_struct serv_task;
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struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
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struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
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struct mutex tc_mutex; /* lock to protect TC changes */
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u32 msg_enable;
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/* spinlock to protect the AdminQ wait list */
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spinlock_t aq_wait_lock;
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struct hlist_head aq_wait_list;
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wait_queue_head_t aq_wait_queue;
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u32 hw_csum_rx_error;
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u16 oicr_idx; /* Other interrupt cause MSIX vector index */
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u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */
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u16 max_pf_txqs; /* Total Tx queues PF wide */
|
|
u16 max_pf_rxqs; /* Total Rx queues PF wide */
|
|
u16 num_lan_msix; /* Total MSIX vectors for base driver */
|
|
u16 num_lan_tx; /* num LAN Tx queues setup */
|
|
u16 num_lan_rx; /* num LAN Rx queues setup */
|
|
u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
|
|
u16 num_alloc_vsi;
|
|
u16 corer_count; /* Core reset count */
|
|
u16 globr_count; /* Global reset count */
|
|
u16 empr_count; /* EMP reset count */
|
|
u16 pfr_count; /* PF reset count */
|
|
|
|
u8 wol_ena : 1; /* software state of WoL */
|
|
u32 wakeup_reason; /* last wakeup reason */
|
|
struct ice_hw_port_stats stats;
|
|
struct ice_hw_port_stats stats_prev;
|
|
struct ice_hw hw;
|
|
u8 stat_prev_loaded:1; /* has previous stats been loaded */
|
|
u16 dcbx_cap;
|
|
u32 tx_timeout_count;
|
|
unsigned long tx_timeout_last_recovery;
|
|
u32 tx_timeout_recovery_level;
|
|
char int_name[ICE_INT_NAME_STR_LEN];
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|
u32 sw_int_count;
|
|
|
|
__le64 nvm_phy_type_lo; /* NVM PHY type low */
|
|
__le64 nvm_phy_type_hi; /* NVM PHY type high */
|
|
struct ice_link_default_override_tlv link_dflt_override;
|
|
};
|
|
|
|
struct ice_netdev_priv {
|
|
struct ice_vsi *vsi;
|
|
};
|
|
|
|
/**
|
|
* ice_irq_dynamic_ena - Enable default interrupt generation settings
|
|
* @hw: pointer to HW struct
|
|
* @vsi: pointer to VSI struct, can be NULL
|
|
* @q_vector: pointer to q_vector, can be NULL
|
|
*/
|
|
static inline void
|
|
ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
|
|
struct ice_q_vector *q_vector)
|
|
{
|
|
u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
|
|
((struct ice_pf *)hw->back)->oicr_idx;
|
|
int itr = ICE_ITR_NONE;
|
|
u32 val;
|
|
|
|
/* clear the PBA here, as this function is meant to clean out all
|
|
* previous interrupts and enable the interrupt
|
|
*/
|
|
val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
|
|
(itr << GLINT_DYN_CTL_ITR_INDX_S);
|
|
if (vsi)
|
|
if (test_bit(__ICE_DOWN, vsi->state))
|
|
return;
|
|
wr32(hw, GLINT_DYN_CTL(vector), val);
|
|
}
|
|
|
|
/**
|
|
* ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
|
|
* @netdev: pointer to the netdev struct
|
|
*/
|
|
static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
|
|
{
|
|
struct ice_netdev_priv *np = netdev_priv(netdev);
|
|
|
|
return np->vsi->back;
|
|
}
|
|
|
|
static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
|
|
{
|
|
return !!READ_ONCE(vsi->xdp_prog);
|
|
}
|
|
|
|
static inline void ice_set_ring_xdp(struct ice_ring *ring)
|
|
{
|
|
ring->flags |= ICE_TX_FLAGS_RING_XDP;
|
|
}
|
|
|
|
/**
|
|
* ice_xsk_pool - get XSK buffer pool bound to a ring
|
|
* @ring: ring to use
|
|
*
|
|
* Returns a pointer to xdp_umem structure if there is a buffer pool present,
|
|
* NULL otherwise.
|
|
*/
|
|
static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring)
|
|
{
|
|
struct xsk_buff_pool **pools = ring->vsi->xsk_pools;
|
|
u16 qid = ring->q_index;
|
|
|
|
if (ice_ring_is_xdp(ring))
|
|
qid -= ring->vsi->num_xdp_txq;
|
|
|
|
if (qid >= ring->vsi->num_xsk_pools || !pools || !pools[qid] ||
|
|
!ice_is_xdp_ena_vsi(ring->vsi))
|
|
return NULL;
|
|
|
|
return pools[qid];
|
|
}
|
|
|
|
/**
|
|
* ice_get_main_vsi - Get the PF VSI
|
|
* @pf: PF instance
|
|
*
|
|
* returns pf->vsi[0], which by definition is the PF VSI
|
|
*/
|
|
static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
|
|
{
|
|
if (pf->vsi)
|
|
return pf->vsi[0];
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/**
|
|
* ice_get_ctrl_vsi - Get the control VSI
|
|
* @pf: PF instance
|
|
*/
|
|
static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
|
|
{
|
|
/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
|
|
if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
|
|
return NULL;
|
|
|
|
return pf->vsi[pf->ctrl_vsi_idx];
|
|
}
|
|
|
|
#define ICE_FD_STAT_CTR_BLOCK_COUNT 256
|
|
#define ICE_FD_STAT_PF_IDX(base_idx) \
|
|
((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
|
|
#define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
|
|
|
|
int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
|
|
int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
|
|
int ice_vsi_open_ctrl(struct ice_vsi *vsi);
|
|
void ice_set_ethtool_ops(struct net_device *netdev);
|
|
void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
|
|
u16 ice_get_avail_txq_count(struct ice_pf *pf);
|
|
u16 ice_get_avail_rxq_count(struct ice_pf *pf);
|
|
int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
|
|
void ice_update_vsi_stats(struct ice_vsi *vsi);
|
|
void ice_update_pf_stats(struct ice_pf *pf);
|
|
int ice_up(struct ice_vsi *vsi);
|
|
int ice_down(struct ice_vsi *vsi);
|
|
int ice_vsi_cfg(struct ice_vsi *vsi);
|
|
struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
|
|
int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
|
|
int ice_destroy_xdp_rings(struct ice_vsi *vsi);
|
|
int
|
|
ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
|
|
u32 flags);
|
|
int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
|
|
int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
|
|
void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
|
|
int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
|
|
void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
|
|
const char *ice_stat_str(enum ice_status stat_err);
|
|
const char *ice_aq_str(enum ice_aq_err aq_err);
|
|
bool ice_is_wol_supported(struct ice_hw *hw);
|
|
int
|
|
ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
|
|
bool is_tun);
|
|
void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
|
|
int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
|
|
int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
|
|
int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
|
|
int
|
|
ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
|
|
u32 *rule_locs);
|
|
void ice_fdir_release_flows(struct ice_hw *hw);
|
|
void ice_fdir_replay_flows(struct ice_hw *hw);
|
|
void ice_fdir_replay_fltrs(struct ice_pf *pf);
|
|
int ice_fdir_create_dflt_rules(struct ice_pf *pf);
|
|
int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
|
|
struct ice_rq_event_info *event);
|
|
int ice_open(struct net_device *netdev);
|
|
int ice_open_internal(struct net_device *netdev);
|
|
int ice_stop(struct net_device *netdev);
|
|
void ice_service_task_schedule(struct ice_pf *pf);
|
|
|
|
#endif /* _ICE_H_ */
|