mirror of
https://github.com/physwizz/a155-U-u1.git
synced 2024-11-19 13:27:49 +00:00
819 lines
22 KiB
C
819 lines
22 KiB
C
/* Broadcom NetXtreme-C/E network driver.
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*
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* Copyright (c) 2017 Broadcom Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/netdevice.h>
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#include <net/devlink.h>
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#include "bnxt_hsi.h"
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#include "bnxt.h"
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#include "bnxt_vfr.h"
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#include "bnxt_devlink.h"
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#include "bnxt_ethtool.h"
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static int
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bnxt_dl_flash_update(struct devlink *dl,
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struct devlink_flash_update_params *params,
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struct netlink_ext_ack *extack)
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{
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struct bnxt *bp = bnxt_get_bp_from_dl(dl);
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int rc;
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if (!BNXT_PF(bp)) {
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NL_SET_ERR_MSG_MOD(extack,
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"flash update not supported from a VF");
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return -EPERM;
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}
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devlink_flash_update_begin_notify(dl);
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devlink_flash_update_status_notify(dl, "Preparing to flash", NULL, 0, 0);
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rc = bnxt_flash_package_from_file(bp->dev, params->file_name, 0);
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if (!rc)
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devlink_flash_update_status_notify(dl, "Flashing done", NULL, 0, 0);
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else
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devlink_flash_update_status_notify(dl, "Flashing failed", NULL, 0, 0);
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devlink_flash_update_end_notify(dl);
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return rc;
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}
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static int bnxt_fw_reporter_diagnose(struct devlink_health_reporter *reporter,
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struct devlink_fmsg *fmsg,
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struct netlink_ext_ack *extack)
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{
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struct bnxt *bp = devlink_health_reporter_priv(reporter);
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u32 val, health_status;
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int rc;
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if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))
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return 0;
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val = bnxt_fw_health_readl(bp, BNXT_FW_HEALTH_REG);
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health_status = val & 0xffff;
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if (health_status < BNXT_FW_STATUS_HEALTHY) {
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rc = devlink_fmsg_string_pair_put(fmsg, "Description",
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"Not yet completed initialization");
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if (rc)
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return rc;
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} else if (health_status > BNXT_FW_STATUS_HEALTHY) {
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rc = devlink_fmsg_string_pair_put(fmsg, "Description",
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"Encountered fatal error and cannot recover");
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if (rc)
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return rc;
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}
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if (val >> 16) {
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rc = devlink_fmsg_u32_pair_put(fmsg, "Error code", val >> 16);
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if (rc)
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return rc;
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}
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val = bnxt_fw_health_readl(bp, BNXT_FW_RESET_CNT_REG);
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rc = devlink_fmsg_u32_pair_put(fmsg, "Reset count", val);
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if (rc)
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return rc;
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return 0;
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}
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static const struct devlink_health_reporter_ops bnxt_dl_fw_reporter_ops = {
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.name = "fw",
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.diagnose = bnxt_fw_reporter_diagnose,
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};
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static int bnxt_fw_reset_recover(struct devlink_health_reporter *reporter,
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void *priv_ctx,
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struct netlink_ext_ack *extack)
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{
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struct bnxt *bp = devlink_health_reporter_priv(reporter);
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if (!priv_ctx)
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return -EOPNOTSUPP;
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bnxt_fw_reset(bp);
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return -EINPROGRESS;
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}
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static const
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struct devlink_health_reporter_ops bnxt_dl_fw_reset_reporter_ops = {
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.name = "fw_reset",
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.recover = bnxt_fw_reset_recover,
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};
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static int bnxt_fw_fatal_recover(struct devlink_health_reporter *reporter,
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void *priv_ctx,
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struct netlink_ext_ack *extack)
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{
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struct bnxt *bp = devlink_health_reporter_priv(reporter);
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struct bnxt_fw_reporter_ctx *fw_reporter_ctx = priv_ctx;
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unsigned long event;
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if (!priv_ctx)
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return -EOPNOTSUPP;
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bp->fw_health->fatal = true;
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event = fw_reporter_ctx->sp_event;
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if (event == BNXT_FW_RESET_NOTIFY_SP_EVENT)
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bnxt_fw_reset(bp);
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else if (event == BNXT_FW_EXCEPTION_SP_EVENT)
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bnxt_fw_exception(bp);
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return -EINPROGRESS;
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}
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static const
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struct devlink_health_reporter_ops bnxt_dl_fw_fatal_reporter_ops = {
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.name = "fw_fatal",
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.recover = bnxt_fw_fatal_recover,
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};
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void bnxt_dl_fw_reporters_create(struct bnxt *bp)
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{
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struct bnxt_fw_health *health = bp->fw_health;
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if (!bp->dl || !health)
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return;
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if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET) || health->fw_reset_reporter)
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goto err_recovery;
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health->fw_reset_reporter =
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devlink_health_reporter_create(bp->dl,
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&bnxt_dl_fw_reset_reporter_ops,
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0, bp);
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if (IS_ERR(health->fw_reset_reporter)) {
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netdev_warn(bp->dev, "Failed to create FW fatal health reporter, rc = %ld\n",
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PTR_ERR(health->fw_reset_reporter));
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health->fw_reset_reporter = NULL;
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bp->fw_cap &= ~BNXT_FW_CAP_HOT_RESET;
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}
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err_recovery:
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if (!(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY))
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return;
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if (!health->fw_reporter) {
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health->fw_reporter =
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devlink_health_reporter_create(bp->dl,
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&bnxt_dl_fw_reporter_ops,
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0, bp);
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if (IS_ERR(health->fw_reporter)) {
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netdev_warn(bp->dev, "Failed to create FW health reporter, rc = %ld\n",
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PTR_ERR(health->fw_reporter));
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health->fw_reporter = NULL;
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bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY;
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return;
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}
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}
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if (health->fw_fatal_reporter)
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return;
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health->fw_fatal_reporter =
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devlink_health_reporter_create(bp->dl,
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&bnxt_dl_fw_fatal_reporter_ops,
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0, bp);
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if (IS_ERR(health->fw_fatal_reporter)) {
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netdev_warn(bp->dev, "Failed to create FW fatal health reporter, rc = %ld\n",
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PTR_ERR(health->fw_fatal_reporter));
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health->fw_fatal_reporter = NULL;
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bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY;
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}
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}
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void bnxt_dl_fw_reporters_destroy(struct bnxt *bp, bool all)
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{
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struct bnxt_fw_health *health = bp->fw_health;
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if (!bp->dl || !health)
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return;
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if ((all || !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) &&
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health->fw_reset_reporter) {
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devlink_health_reporter_destroy(health->fw_reset_reporter);
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health->fw_reset_reporter = NULL;
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}
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if ((bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) && !all)
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return;
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if (health->fw_reporter) {
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devlink_health_reporter_destroy(health->fw_reporter);
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health->fw_reporter = NULL;
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}
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if (health->fw_fatal_reporter) {
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devlink_health_reporter_destroy(health->fw_fatal_reporter);
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health->fw_fatal_reporter = NULL;
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}
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}
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void bnxt_devlink_health_report(struct bnxt *bp, unsigned long event)
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{
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struct bnxt_fw_health *fw_health = bp->fw_health;
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struct bnxt_fw_reporter_ctx fw_reporter_ctx;
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fw_reporter_ctx.sp_event = event;
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switch (event) {
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case BNXT_FW_RESET_NOTIFY_SP_EVENT:
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if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) {
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if (!fw_health->fw_fatal_reporter)
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return;
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devlink_health_report(fw_health->fw_fatal_reporter,
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"FW fatal async event received",
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&fw_reporter_ctx);
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return;
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}
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if (!fw_health->fw_reset_reporter)
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return;
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devlink_health_report(fw_health->fw_reset_reporter,
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"FW non-fatal reset event received",
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&fw_reporter_ctx);
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return;
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case BNXT_FW_EXCEPTION_SP_EVENT:
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if (!fw_health->fw_fatal_reporter)
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return;
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devlink_health_report(fw_health->fw_fatal_reporter,
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"FW fatal error reported",
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&fw_reporter_ctx);
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return;
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}
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}
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void bnxt_dl_health_status_update(struct bnxt *bp, bool healthy)
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{
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struct bnxt_fw_health *health = bp->fw_health;
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u8 state;
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if (healthy)
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state = DEVLINK_HEALTH_REPORTER_STATE_HEALTHY;
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else
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state = DEVLINK_HEALTH_REPORTER_STATE_ERROR;
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if (health->fatal)
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devlink_health_reporter_state_update(health->fw_fatal_reporter,
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state);
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else
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devlink_health_reporter_state_update(health->fw_reset_reporter,
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state);
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health->fatal = false;
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}
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void bnxt_dl_health_recovery_done(struct bnxt *bp)
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{
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struct bnxt_fw_health *hlth = bp->fw_health;
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if (hlth->fatal)
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devlink_health_reporter_recovery_done(hlth->fw_fatal_reporter);
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else
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devlink_health_reporter_recovery_done(hlth->fw_reset_reporter);
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}
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static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req,
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struct netlink_ext_ack *extack);
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static const struct devlink_ops bnxt_dl_ops = {
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#ifdef CONFIG_BNXT_SRIOV
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.eswitch_mode_set = bnxt_dl_eswitch_mode_set,
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.eswitch_mode_get = bnxt_dl_eswitch_mode_get,
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#endif /* CONFIG_BNXT_SRIOV */
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.info_get = bnxt_dl_info_get,
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.flash_update = bnxt_dl_flash_update,
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};
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static const struct devlink_ops bnxt_vf_dl_ops;
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enum bnxt_dl_param_id {
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BNXT_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
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BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,
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};
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static const struct bnxt_dl_nvm_param nvm_params[] = {
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{DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV, NVM_OFF_ENABLE_SRIOV,
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BNXT_NVM_SHARED_CFG, 1, 1},
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{DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI, NVM_OFF_IGNORE_ARI,
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BNXT_NVM_SHARED_CFG, 1, 1},
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{DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
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NVM_OFF_MSIX_VEC_PER_PF_MAX, BNXT_NVM_SHARED_CFG, 10, 4},
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{DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
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NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7, 4},
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{BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, NVM_OFF_DIS_GRE_VER_CHECK,
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BNXT_NVM_SHARED_CFG, 1, 1},
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};
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union bnxt_nvm_data {
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u8 val8;
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__le32 val32;
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};
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static void bnxt_copy_to_nvm_data(union bnxt_nvm_data *dst,
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union devlink_param_value *src,
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int nvm_num_bits, int dl_num_bytes)
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{
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u32 val32 = 0;
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if (nvm_num_bits == 1) {
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dst->val8 = src->vbool;
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return;
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}
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if (dl_num_bytes == 4)
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val32 = src->vu32;
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else if (dl_num_bytes == 2)
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val32 = (u32)src->vu16;
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else if (dl_num_bytes == 1)
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val32 = (u32)src->vu8;
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dst->val32 = cpu_to_le32(val32);
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}
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static void bnxt_copy_from_nvm_data(union devlink_param_value *dst,
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union bnxt_nvm_data *src,
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int nvm_num_bits, int dl_num_bytes)
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{
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u32 val32;
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if (nvm_num_bits == 1) {
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dst->vbool = src->val8;
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return;
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}
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val32 = le32_to_cpu(src->val32);
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if (dl_num_bytes == 4)
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dst->vu32 = val32;
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else if (dl_num_bytes == 2)
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dst->vu16 = (u16)val32;
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else if (dl_num_bytes == 1)
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dst->vu8 = (u8)val32;
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}
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static int bnxt_hwrm_get_nvm_cfg_ver(struct bnxt *bp,
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union devlink_param_value *nvm_cfg_ver)
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{
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struct hwrm_nvm_get_variable_input req = {0};
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union bnxt_nvm_data *data;
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dma_addr_t data_dma_addr;
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int rc;
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bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
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data = dma_alloc_coherent(&bp->pdev->dev, sizeof(*data),
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&data_dma_addr, GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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req.dest_data_addr = cpu_to_le64(data_dma_addr);
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req.data_len = cpu_to_le16(BNXT_NVM_CFG_VER_BITS);
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req.option_num = cpu_to_le16(NVM_OFF_NVM_CFG_VER);
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rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
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if (!rc)
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bnxt_copy_from_nvm_data(nvm_cfg_ver, data,
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BNXT_NVM_CFG_VER_BITS,
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BNXT_NVM_CFG_VER_BYTES);
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dma_free_coherent(&bp->pdev->dev, sizeof(*data), data, data_dma_addr);
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return rc;
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}
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static int bnxt_dl_info_put(struct bnxt *bp, struct devlink_info_req *req,
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enum bnxt_dl_version_type type, const char *key,
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char *buf)
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{
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if (!strlen(buf))
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return 0;
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if ((bp->flags & BNXT_FLAG_CHIP_P5) &&
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(!strcmp(key, DEVLINK_INFO_VERSION_GENERIC_FW_NCSI) ||
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!strcmp(key, DEVLINK_INFO_VERSION_GENERIC_FW_ROCE)))
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return 0;
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switch (type) {
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case BNXT_VERSION_FIXED:
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return devlink_info_version_fixed_put(req, key, buf);
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case BNXT_VERSION_RUNNING:
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return devlink_info_version_running_put(req, key, buf);
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case BNXT_VERSION_STORED:
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return devlink_info_version_stored_put(req, key, buf);
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}
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return 0;
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}
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#define HWRM_FW_VER_STR_LEN 16
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static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req,
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struct netlink_ext_ack *extack)
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{
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struct hwrm_nvm_get_dev_info_output nvm_dev_info;
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struct bnxt *bp = bnxt_get_bp_from_dl(dl);
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union devlink_param_value nvm_cfg_ver;
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struct hwrm_ver_get_output *ver_resp;
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char mgmt_ver[FW_VER_STR_LEN];
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char roce_ver[FW_VER_STR_LEN];
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char ncsi_ver[FW_VER_STR_LEN];
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char buf[32];
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int rc;
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rc = devlink_info_driver_name_put(req, DRV_MODULE_NAME);
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if (rc)
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return rc;
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if (BNXT_PF(bp) && (bp->flags & BNXT_FLAG_DSN_VALID)) {
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sprintf(buf, "%02X-%02X-%02X-%02X-%02X-%02X-%02X-%02X",
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bp->dsn[7], bp->dsn[6], bp->dsn[5], bp->dsn[4],
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bp->dsn[3], bp->dsn[2], bp->dsn[1], bp->dsn[0]);
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rc = devlink_info_serial_number_put(req, buf);
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if (rc)
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return rc;
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}
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if (strlen(bp->board_serialno)) {
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rc = devlink_info_board_serial_number_put(req, bp->board_serialno);
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if (rc)
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return rc;
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}
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rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_FIXED,
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DEVLINK_INFO_VERSION_GENERIC_BOARD_ID,
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bp->board_partno);
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if (rc)
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return rc;
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sprintf(buf, "%X", bp->chip_num);
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rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_FIXED,
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DEVLINK_INFO_VERSION_GENERIC_ASIC_ID, buf);
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if (rc)
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return rc;
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ver_resp = &bp->ver_resp;
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sprintf(buf, "%c%d", 'A' + ver_resp->chip_rev, ver_resp->chip_metal);
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rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_FIXED,
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DEVLINK_INFO_VERSION_GENERIC_ASIC_REV, buf);
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if (rc)
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return rc;
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rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_RUNNING,
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DEVLINK_INFO_VERSION_GENERIC_FW_PSID,
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bp->nvm_cfg_ver);
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if (rc)
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return rc;
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buf[0] = 0;
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strncat(buf, ver_resp->active_pkg_name, HWRM_FW_VER_STR_LEN);
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_RUNNING,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW, buf);
|
|
if (rc)
|
|
return rc;
|
|
|
|
if (BNXT_PF(bp) && !bnxt_hwrm_get_nvm_cfg_ver(bp, &nvm_cfg_ver)) {
|
|
u32 ver = nvm_cfg_ver.vu32;
|
|
|
|
sprintf(buf, "%d.%d.%d", (ver >> 16) & 0xff, (ver >> 8) & 0xff,
|
|
ver & 0xff);
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_STORED,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_PSID,
|
|
buf);
|
|
if (rc)
|
|
return rc;
|
|
}
|
|
|
|
if (ver_resp->flags & VER_GET_RESP_FLAGS_EXT_VER_AVAIL) {
|
|
snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
ver_resp->hwrm_fw_major, ver_resp->hwrm_fw_minor,
|
|
ver_resp->hwrm_fw_build, ver_resp->hwrm_fw_patch);
|
|
|
|
snprintf(ncsi_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
ver_resp->mgmt_fw_major, ver_resp->mgmt_fw_minor,
|
|
ver_resp->mgmt_fw_build, ver_resp->mgmt_fw_patch);
|
|
|
|
snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
ver_resp->roce_fw_major, ver_resp->roce_fw_minor,
|
|
ver_resp->roce_fw_build, ver_resp->roce_fw_patch);
|
|
} else {
|
|
snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
ver_resp->hwrm_fw_maj_8b, ver_resp->hwrm_fw_min_8b,
|
|
ver_resp->hwrm_fw_bld_8b, ver_resp->hwrm_fw_rsvd_8b);
|
|
|
|
snprintf(ncsi_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
ver_resp->mgmt_fw_maj_8b, ver_resp->mgmt_fw_min_8b,
|
|
ver_resp->mgmt_fw_bld_8b, ver_resp->mgmt_fw_rsvd_8b);
|
|
|
|
snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
ver_resp->roce_fw_maj_8b, ver_resp->roce_fw_min_8b,
|
|
ver_resp->roce_fw_bld_8b, ver_resp->roce_fw_rsvd_8b);
|
|
}
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_RUNNING,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_MGMT, mgmt_ver);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_RUNNING,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_MGMT_API,
|
|
bp->hwrm_ver_supp);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_RUNNING,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_NCSI, ncsi_ver);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_RUNNING,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_ROCE, roce_ver);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = bnxt_hwrm_nvm_get_dev_info(bp, &nvm_dev_info);
|
|
if (rc ||
|
|
!(nvm_dev_info.flags & NVM_GET_DEV_INFO_RESP_FLAGS_FW_VER_VALID))
|
|
return 0;
|
|
|
|
buf[0] = 0;
|
|
strncat(buf, nvm_dev_info.pkg_name, HWRM_FW_VER_STR_LEN);
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_STORED,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW, buf);
|
|
if (rc)
|
|
return rc;
|
|
|
|
snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
nvm_dev_info.hwrm_fw_major, nvm_dev_info.hwrm_fw_minor,
|
|
nvm_dev_info.hwrm_fw_build, nvm_dev_info.hwrm_fw_patch);
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_STORED,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_MGMT, mgmt_ver);
|
|
if (rc)
|
|
return rc;
|
|
|
|
snprintf(ncsi_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
nvm_dev_info.mgmt_fw_major, nvm_dev_info.mgmt_fw_minor,
|
|
nvm_dev_info.mgmt_fw_build, nvm_dev_info.mgmt_fw_patch);
|
|
rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_STORED,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_NCSI, ncsi_ver);
|
|
if (rc)
|
|
return rc;
|
|
|
|
snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
|
|
nvm_dev_info.roce_fw_major, nvm_dev_info.roce_fw_minor,
|
|
nvm_dev_info.roce_fw_build, nvm_dev_info.roce_fw_patch);
|
|
return bnxt_dl_info_put(bp, req, BNXT_VERSION_STORED,
|
|
DEVLINK_INFO_VERSION_GENERIC_FW_ROCE, roce_ver);
|
|
}
|
|
|
|
static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
|
|
int msg_len, union devlink_param_value *val)
|
|
{
|
|
struct hwrm_nvm_get_variable_input *req = msg;
|
|
struct bnxt_dl_nvm_param nvm_param;
|
|
union bnxt_nvm_data *data;
|
|
dma_addr_t data_dma_addr;
|
|
int idx = 0, rc, i;
|
|
|
|
/* Get/Set NVM CFG parameter is supported only on PFs */
|
|
if (BNXT_VF(bp))
|
|
return -EPERM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(nvm_params); i++) {
|
|
if (nvm_params[i].id == param_id) {
|
|
nvm_param = nvm_params[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (i == ARRAY_SIZE(nvm_params))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (nvm_param.dir_type == BNXT_NVM_PORT_CFG)
|
|
idx = bp->pf.port_id;
|
|
else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG)
|
|
idx = bp->pf.fw_fid - BNXT_FIRST_PF_FID;
|
|
|
|
data = dma_alloc_coherent(&bp->pdev->dev, sizeof(*data),
|
|
&data_dma_addr, GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
req->dest_data_addr = cpu_to_le64(data_dma_addr);
|
|
req->data_len = cpu_to_le16(nvm_param.nvm_num_bits);
|
|
req->option_num = cpu_to_le16(nvm_param.offset);
|
|
req->index_0 = cpu_to_le16(idx);
|
|
if (idx)
|
|
req->dimensions = cpu_to_le16(1);
|
|
|
|
if (req->req_type == cpu_to_le16(HWRM_NVM_SET_VARIABLE)) {
|
|
bnxt_copy_to_nvm_data(data, val, nvm_param.nvm_num_bits,
|
|
nvm_param.dl_num_bytes);
|
|
rc = hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
|
|
} else {
|
|
rc = hwrm_send_message_silent(bp, msg, msg_len,
|
|
HWRM_CMD_TIMEOUT);
|
|
if (!rc) {
|
|
bnxt_copy_from_nvm_data(val, data,
|
|
nvm_param.nvm_num_bits,
|
|
nvm_param.dl_num_bytes);
|
|
} else {
|
|
struct hwrm_err_output *resp = bp->hwrm_cmd_resp_addr;
|
|
|
|
if (resp->cmd_err ==
|
|
NVM_GET_VARIABLE_CMD_ERR_CODE_VAR_NOT_EXIST)
|
|
rc = -EOPNOTSUPP;
|
|
}
|
|
}
|
|
dma_free_coherent(&bp->pdev->dev, sizeof(*data), data, data_dma_addr);
|
|
if (rc == -EACCES)
|
|
netdev_err(bp->dev, "PF does not have admin privileges to modify NVM config\n");
|
|
return rc;
|
|
}
|
|
|
|
static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id,
|
|
struct devlink_param_gset_ctx *ctx)
|
|
{
|
|
struct hwrm_nvm_get_variable_input req = {0};
|
|
struct bnxt *bp = bnxt_get_bp_from_dl(dl);
|
|
int rc;
|
|
|
|
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
|
|
rc = bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
|
|
if (!rc)
|
|
if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
|
|
ctx->val.vbool = !ctx->val.vbool;
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
|
|
struct devlink_param_gset_ctx *ctx)
|
|
{
|
|
struct hwrm_nvm_set_variable_input req = {0};
|
|
struct bnxt *bp = bnxt_get_bp_from_dl(dl);
|
|
|
|
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_SET_VARIABLE, -1, -1);
|
|
|
|
if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
|
|
ctx->val.vbool = !ctx->val.vbool;
|
|
|
|
return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
|
|
}
|
|
|
|
static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,
|
|
union devlink_param_value val,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
int max_val = -1;
|
|
|
|
if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX)
|
|
max_val = BNXT_MSIX_VEC_MAX;
|
|
|
|
if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN)
|
|
max_val = BNXT_MSIX_VEC_MIN_MAX;
|
|
|
|
if (val.vu32 > max_val) {
|
|
NL_SET_ERR_MSG_MOD(extack, "MSIX value is exceeding the range");
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct devlink_param bnxt_dl_params[] = {
|
|
DEVLINK_PARAM_GENERIC(ENABLE_SRIOV,
|
|
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
|
|
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
|
|
NULL),
|
|
DEVLINK_PARAM_GENERIC(IGNORE_ARI,
|
|
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
|
|
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
|
|
NULL),
|
|
DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MAX,
|
|
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
|
|
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
|
|
bnxt_dl_msix_validate),
|
|
DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MIN,
|
|
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
|
|
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
|
|
bnxt_dl_msix_validate),
|
|
DEVLINK_PARAM_DRIVER(BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,
|
|
"gre_ver_check", DEVLINK_PARAM_TYPE_BOOL,
|
|
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
|
|
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
|
|
NULL),
|
|
};
|
|
|
|
static const struct devlink_param bnxt_dl_port_params[] = {
|
|
};
|
|
|
|
static int bnxt_dl_params_register(struct bnxt *bp)
|
|
{
|
|
int rc;
|
|
|
|
if (bp->hwrm_spec_code < 0x10600)
|
|
return 0;
|
|
|
|
rc = devlink_params_register(bp->dl, bnxt_dl_params,
|
|
ARRAY_SIZE(bnxt_dl_params));
|
|
if (rc) {
|
|
netdev_warn(bp->dev, "devlink_params_register failed. rc=%d\n",
|
|
rc);
|
|
return rc;
|
|
}
|
|
rc = devlink_port_params_register(&bp->dl_port, bnxt_dl_port_params,
|
|
ARRAY_SIZE(bnxt_dl_port_params));
|
|
if (rc) {
|
|
netdev_err(bp->dev, "devlink_port_params_register failed\n");
|
|
devlink_params_unregister(bp->dl, bnxt_dl_params,
|
|
ARRAY_SIZE(bnxt_dl_params));
|
|
return rc;
|
|
}
|
|
devlink_params_publish(bp->dl);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void bnxt_dl_params_unregister(struct bnxt *bp)
|
|
{
|
|
if (bp->hwrm_spec_code < 0x10600)
|
|
return;
|
|
|
|
devlink_params_unregister(bp->dl, bnxt_dl_params,
|
|
ARRAY_SIZE(bnxt_dl_params));
|
|
devlink_port_params_unregister(&bp->dl_port, bnxt_dl_port_params,
|
|
ARRAY_SIZE(bnxt_dl_port_params));
|
|
}
|
|
|
|
int bnxt_dl_register(struct bnxt *bp)
|
|
{
|
|
struct devlink_port_attrs attrs = {};
|
|
struct devlink *dl;
|
|
int rc;
|
|
|
|
if (BNXT_PF(bp))
|
|
dl = devlink_alloc(&bnxt_dl_ops, sizeof(struct bnxt_dl));
|
|
else
|
|
dl = devlink_alloc(&bnxt_vf_dl_ops, sizeof(struct bnxt_dl));
|
|
if (!dl) {
|
|
netdev_warn(bp->dev, "devlink_alloc failed\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
bnxt_link_bp_to_dl(bp, dl);
|
|
|
|
/* Add switchdev eswitch mode setting, if SRIOV supported */
|
|
if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV) &&
|
|
bp->hwrm_spec_code > 0x10803)
|
|
bp->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY;
|
|
|
|
rc = devlink_register(dl, &bp->pdev->dev);
|
|
if (rc) {
|
|
netdev_warn(bp->dev, "devlink_register failed. rc=%d\n", rc);
|
|
goto err_dl_free;
|
|
}
|
|
|
|
if (!BNXT_PF(bp))
|
|
return 0;
|
|
|
|
attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
|
|
attrs.phys.port_number = bp->pf.port_id;
|
|
memcpy(attrs.switch_id.id, bp->dsn, sizeof(bp->dsn));
|
|
attrs.switch_id.id_len = sizeof(bp->dsn);
|
|
devlink_port_attrs_set(&bp->dl_port, &attrs);
|
|
rc = devlink_port_register(dl, &bp->dl_port, bp->pf.port_id);
|
|
if (rc) {
|
|
netdev_err(bp->dev, "devlink_port_register failed\n");
|
|
goto err_dl_unreg;
|
|
}
|
|
|
|
rc = bnxt_dl_params_register(bp);
|
|
if (rc)
|
|
goto err_dl_port_unreg;
|
|
|
|
return 0;
|
|
|
|
err_dl_port_unreg:
|
|
devlink_port_unregister(&bp->dl_port);
|
|
err_dl_unreg:
|
|
devlink_unregister(dl);
|
|
err_dl_free:
|
|
bnxt_link_bp_to_dl(bp, NULL);
|
|
devlink_free(dl);
|
|
return rc;
|
|
}
|
|
|
|
void bnxt_dl_unregister(struct bnxt *bp)
|
|
{
|
|
struct devlink *dl = bp->dl;
|
|
|
|
if (!dl)
|
|
return;
|
|
|
|
if (BNXT_PF(bp)) {
|
|
bnxt_dl_params_unregister(bp);
|
|
devlink_port_unregister(&bp->dl_port);
|
|
}
|
|
devlink_unregister(dl);
|
|
devlink_free(dl);
|
|
}
|