mirror of
https://github.com/physwizz/a155-U-u1.git
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134 lines
3.0 KiB
C
134 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Atlantic Network Driver
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* Copyright (C) 2020 Marvell International Ltd.
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*/
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#ifndef AQ_MACSEC_H
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#define AQ_MACSEC_H
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#include <linux/netdevice.h>
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#if IS_ENABLED(CONFIG_MACSEC)
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#include "net/macsec.h"
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struct aq_nic_s;
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#define AQ_MACSEC_MAX_SC 32
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#define AQ_MACSEC_MAX_SA 32
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enum aq_macsec_sc_sa {
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aq_macsec_sa_sc_4sa_8sc,
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aq_macsec_sa_sc_not_used,
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aq_macsec_sa_sc_2sa_16sc,
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aq_macsec_sa_sc_1sa_32sc,
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};
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struct aq_macsec_common_stats {
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/* Ingress Common Counters */
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struct {
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u64 ctl_pkts;
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u64 tagged_miss_pkts;
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u64 untagged_miss_pkts;
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u64 notag_pkts;
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u64 untagged_pkts;
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u64 bad_tag_pkts;
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u64 no_sci_pkts;
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u64 unknown_sci_pkts;
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u64 ctrl_prt_pass_pkts;
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u64 unctrl_prt_pass_pkts;
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u64 ctrl_prt_fail_pkts;
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u64 unctrl_prt_fail_pkts;
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u64 too_long_pkts;
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u64 igpoc_ctl_pkts;
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u64 ecc_error_pkts;
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u64 unctrl_hit_drop_redir;
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} in;
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/* Egress Common Counters */
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struct {
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u64 ctl_pkts;
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u64 unknown_sa_pkts;
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u64 untagged_pkts;
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u64 too_long;
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u64 ecc_error_pkts;
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u64 unctrl_hit_drop_redir;
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} out;
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};
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/* Ingress SA Counters */
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struct aq_macsec_rx_sa_stats {
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u64 untagged_hit_pkts;
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u64 ctrl_hit_drop_redir_pkts;
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u64 not_using_sa;
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u64 unused_sa;
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u64 not_valid_pkts;
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u64 invalid_pkts;
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u64 ok_pkts;
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u64 late_pkts;
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u64 delayed_pkts;
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u64 unchecked_pkts;
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u64 validated_octets;
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u64 decrypted_octets;
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};
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/* Egress SA Counters */
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struct aq_macsec_tx_sa_stats {
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u64 sa_hit_drop_redirect;
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u64 sa_protected2_pkts;
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u64 sa_protected_pkts;
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u64 sa_encrypted_pkts;
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};
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/* Egress SC Counters */
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struct aq_macsec_tx_sc_stats {
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u64 sc_protected_pkts;
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u64 sc_encrypted_pkts;
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u64 sc_protected_octets;
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u64 sc_encrypted_octets;
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};
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struct aq_macsec_txsc {
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u32 hw_sc_idx;
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unsigned long tx_sa_idx_busy;
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const struct macsec_secy *sw_secy;
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u8 tx_sa_key[MACSEC_NUM_AN][MACSEC_MAX_KEY_LEN];
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struct aq_macsec_tx_sc_stats stats;
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struct aq_macsec_tx_sa_stats tx_sa_stats[MACSEC_NUM_AN];
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};
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struct aq_macsec_rxsc {
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u32 hw_sc_idx;
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unsigned long rx_sa_idx_busy;
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const struct macsec_secy *sw_secy;
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const struct macsec_rx_sc *sw_rxsc;
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u8 rx_sa_key[MACSEC_NUM_AN][MACSEC_MAX_KEY_LEN];
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struct aq_macsec_rx_sa_stats rx_sa_stats[MACSEC_NUM_AN];
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};
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struct aq_macsec_cfg {
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enum aq_macsec_sc_sa sc_sa;
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/* Egress channel configuration */
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unsigned long txsc_idx_busy;
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struct aq_macsec_txsc aq_txsc[AQ_MACSEC_MAX_SC];
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/* Ingress channel configuration */
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unsigned long rxsc_idx_busy;
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struct aq_macsec_rxsc aq_rxsc[AQ_MACSEC_MAX_SC];
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/* Statistics / counters */
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struct aq_macsec_common_stats stats;
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};
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extern const struct macsec_ops aq_macsec_ops;
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int aq_macsec_init(struct aq_nic_s *nic);
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void aq_macsec_free(struct aq_nic_s *nic);
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int aq_macsec_enable(struct aq_nic_s *nic);
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void aq_macsec_work(struct aq_nic_s *nic);
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u64 *aq_macsec_get_stats(struct aq_nic_s *nic, u64 *data);
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int aq_macsec_rx_sa_cnt(struct aq_nic_s *nic);
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int aq_macsec_tx_sc_cnt(struct aq_nic_s *nic);
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int aq_macsec_tx_sa_cnt(struct aq_nic_s *nic);
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#endif
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#endif /* AQ_MACSEC_H */
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