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47 lines
790 B
C
47 lines
790 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __MTK_QOS_SRAM_H__
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#define __MTK_QOS_SRAM_H__
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struct qos_sram_addr {
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int offset;
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bool valid;
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};
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enum {
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QOS_DEBUG_0,
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QOS_DEBUG_1,
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QOS_DEBUG_2,
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QOS_DEBUG_3,
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QOS_DEBUG_4,
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MM_SMI_VENC,
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MM_SMI_CAM,
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MM_SMI_IMG,
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MM_SMI_MDP,
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MM_SMI_CLK,
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MM_SMI_CLR,
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MM_SMI_EXE,
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MM_SMI_DUMP,
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APU_CLK,
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APU_BW_NORD,
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DVFSRC_TIMESTAMP_OFFSET,
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CM_STALL_RATIO_ID_0,
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CM_STALL_RATIO_ID_1,
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CM_STALL_RATIO_ID_2,
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CM_STALL_RATIO_ID_3,
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CM_STALL_RATIO_ID_4,
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CM_STALL_RATIO_ID_5,
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CM_STALL_RATIO_ID_6,
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CM_STALL_RATIO_ID_7,
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QOS_TOTAL_BW,
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QOS_SRAM_ID_MAX,
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};
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extern u32 qos_sram_read(u32 id);
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extern void qos_sram_write(u32 id, u32 val);
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extern void qos_sram_init(void __iomem *regs, unsigned int bound);
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#endif
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