mirror of
https://github.com/physwizz/a155-U-u1.git
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157 lines
3.1 KiB
C
157 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/kthread.h>
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#include <linux/io.h>
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#include "mtk_qos_ipi.h"
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#include "mtk_qos_sram.h"
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#include "mtk_qos_bound.h"
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#include "mtk_qos_sysfs.h"
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#include "mtk_qos_share.h"
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#include "mtk_qos_common.h"
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struct mtk_qos *m_qos;
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static void __iomem *qos_sram_base;
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static unsigned int qos_sram_bound;
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unsigned int mtk_qos_enable = 1;
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unsigned int is_mtk_qos_enable(void)
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{
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return mtk_qos_enable;
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}
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int qos_get_ipi_cmd(int idx)
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{
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int cmd;
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if (!m_qos)
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return -EACCES;
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if (m_qos->soc->ipi_pin[idx].valid == false)
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return -EPERM;
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cmd = m_qos->soc->ipi_pin[idx].id;
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return cmd;
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}
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EXPORT_SYMBOL_GPL(qos_get_ipi_cmd);
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u32 qos_sram_read(u32 id)
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{
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u32 offset;
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if (!m_qos)
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return 0;
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if (m_qos->soc->sram_pin[id].valid == false)
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return 0;
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if (id >= QOS_SRAM_ID_MAX)
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return 0;
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offset = m_qos->soc->sram_pin[id].offset;
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if (!qos_sram_base || offset >= qos_sram_bound)
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return 0;
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return readl(qos_sram_base + offset);
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}
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EXPORT_SYMBOL_GPL(qos_sram_read);
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void qos_sram_write(u32 id, u32 val)
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{
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u32 offset;
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if (!m_qos)
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return;
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if (m_qos->soc->sram_pin[id].valid == false)
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return;
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if (id >= QOS_SRAM_ID_MAX)
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return;
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offset = m_qos->soc->sram_pin[id].offset;
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if (!qos_sram_base || offset >= qos_sram_bound)
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return;
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writel(val, qos_sram_base + offset);
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}
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EXPORT_SYMBOL_GPL(qos_sram_write);
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void qos_sram_init(void __iomem *regs, unsigned int bound)
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{
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int i;
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qos_sram_base = regs;
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qos_sram_bound = bound;
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pr_info("qos_sram addr:0x%p len:%d\n",
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qos_sram_base, qos_sram_bound);
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for (i = 0; i < bound; i += 4)
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writel(0x0, qos_sram_base+i);
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}
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int mtk_qos_probe(struct platform_device *pdev,
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const struct mtk_qos_soc *soc)
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{
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struct resource *res;
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struct mtk_qos *qos;
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struct device_node *node = pdev->dev.of_node;
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int ret;
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qos = devm_kzalloc(&pdev->dev, sizeof(*qos), GFP_KERNEL);
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if (!qos)
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return -ENOMEM;
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qos->soc = of_device_get_match_data(&pdev->dev);
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if (!qos->soc)
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return -EINVAL;
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ret = of_property_read_u32(node,
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"mediatek,qos_enable", &mtk_qos_enable);
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if (!ret)
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pr_info("mtkqos: dts qos_enable = %d\n", mtk_qos_enable);
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else
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mtk_qos_enable = 1;
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qos->soc = soc;
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qos->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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qos->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(qos->regs))
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return PTR_ERR(qos->regs);
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qos_add_interface(&pdev->dev);
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if (mtk_qos_enable) {
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qos->regsize = (unsigned int) resource_size(res);
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m_qos = qos;
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qos_sram_init(qos->regs, qos->regsize);
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qos_ipi_init(qos);
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if (qos->soc->ipi_pin[QOS_IPI_QOS_BOUND].valid == true)
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qos_bound_init();
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qos_ipi_recv_init(qos);
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qos_init_rec_share();
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} else {
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m_qos = NULL;
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}
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platform_set_drvdata(pdev, qos);
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pr_info("mtkqos:%s done (enable=%d)\n", __func__, mtk_qos_enable);
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return 0;
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}
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("MediaTek QoS driver");
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