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https://github.com/physwizz/a155-U-u1.git
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231 lines
5.3 KiB
C
231 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 MediaTek Inc.
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*/
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#ifndef __MDEE_DUMPER_V5_H__
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#define __MDEE_DUMPER_V5_H__
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#include "ccci_fsm_internal.h"
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#define MD_HS1_FAIL_DUMP_SIZE (2048)/*(512)*/
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#define EE_BUF_LEN_UMOLY (0x700)
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#define AED_STR_LEN (2048)/* 0x800 */
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#define EE_BUF_LEN (256)/* 0x100 */
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#define MD_CORE_TOTAL_NUM (12)
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#define MIPS_VPE_NUM (12)
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#define MD_CORE_NAME_LEN (11)
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/* +1 for end '\0', +5 for 16, +16 for str TDD FDD */
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#define MD_CORE_NAME_DEBUG (MD_CORE_NAME_LEN + 1 + 5 + 16)
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#define EX_BRIEF_FATALERR_SIZE (276)
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struct ex_step_v5 {
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u32 step;
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u32 timestap;
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} __packed;
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struct ex_assert_v5 {
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char filepath[256];
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u32 line_number;
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u32 para1;
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u32 para2;
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u32 para3;
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u32 lr;
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} __packed;
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struct ex_fatal_v5 {
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u32 code1;
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u32 code2;
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u32 code3;
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char offender[8]; /* #define EX_UNIT_NAME_LEN 8 */
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u8 is_cadefa_supported;
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u8 is_filename_supported;
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u8 error_section;
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u8 is_valid_dispatch_arg;
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u8 pad[4];
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u32 error_status;
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u32 error_sp;
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u32 error_pc;
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u32 error_lr;
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u32 error_address;
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u32 error_cause;
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char filename[0];
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} __packed;
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union ex_main_content {
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struct ex_fatal_v5 fatalerr;
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struct ex_assert_v5 assert;
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} __packed;
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enum exception_class {
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MD_EX_CLASS_ASSET,
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MD_EX_CLASS_FATAL,
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MD_EX_CLASS_CUSTOM,
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MD_EX_CLASS_INVALID,
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}; /* EXCEPTION_CLASS*/
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struct ex_brief_maininfo_v5 {
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u16 ex_type;
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u8 e_type_format;
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u8 maincontent_type;
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u8 elm_status;
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u8 system_info1;/* vpe */
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u8 system_info2;/* tc */
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u8 pad;
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union ex_main_content info;
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} __packed EX_BRIEF_MAININFO_T_v5;
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struct ex_main_reason_v5 {
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char core_name[11];/* MD_CORE_NAME_LEN */
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u8 is_offender;
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} __packed;
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struct ex_overview_t {
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u32 overview_verno;
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u32 core_num;
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struct ex_main_reason_v5 main_reson[MD_CORE_TOTAL_NUM];
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struct ex_brief_maininfo_v5 ex_info;
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u32 mips_vpe_num;/* value == 7 */
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struct ex_step_v5 ex_step_logging[MIPS_VPE_NUM];
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u32 ect_status;
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u32 afound_buffer_offset;
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u32 afound_buffer_size;
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u8 usip_scq_offending_core;
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u8 sonic_offending_core;
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u8 mcu_exception_count[MD_CORE_TOTAL_NUM];
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u8 pad[30];
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u32 core_offset[MD_CORE_TOTAL_NUM];
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} __packed;
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enum {
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/* mips exception codes in cause[exccode] */
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INTERRUPT_EXCEPTION = 0x0,
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TLB_MOD_EXCEPTION = 0x1,
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TLB_MISS_LOAD_EXCEPTION = 0x2,
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TLB_MISS_STORE_EXCEPTION = 0x3,
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ADDRESS_ERROR_LOAD_EXCEPTION = 0x4,
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ADDRESS_ERROR_STORE_EXCEPTION = 0x5,
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INSTR_BUS_ERROR = 0x6,
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DATA_BUS_ERROR = 0x7,
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SYSTEM_CALL_EXCEPTION = 0x8,
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BREAKPOINT_EXCEPTION = 0x9,
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RESERVED_INSTRUCTION_EXCEPTION = 0xA,
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COPROCESSORS_UNUSABLE_EXCEPTION = 0xB,
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INTEGER_OVERFLOW_EXCEPTION = 0xC,
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TRAP_EXCEPTION = 0xD,
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MSA_FLOATING_POINT_EXCEPTION = 0xE,
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FLOATING_POINT_EXCEPTION = 0xF,
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COPROCESSOR_2_IS_1_EXCEPTION = 0x10,
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COR_EXTEND_UNUSABLE_EXCEPTION = 0x11,
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COPROCESSOR_2_EXCEPTION = 0x12,
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TLB_READ_INHIBIT_EXCEPTION = 0x13,
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TLB_EXECUTE_INHIBIT_EXCEPTION = 0x14,
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MSA_UNUSABLE_EXCEPTION = 0x15,
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MDMX_EXCEPTION = 0x16,
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WATCH_EXCEPTION = 0x17,
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MCHECK_EXCEPTION = 0x18,
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THREAD_EXCEPTION = 0x19,
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DSP_UNUSABLE_EXCEPTION = 0x1A,
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RESERVED_27_EXCEPTION = 0x1B,
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RESERVED_28_EXCEPTION = 0x1C,
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MPU_NOT_ALLOW = 0x1D,
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CACHE_ERROR_EXCEPTION_DBG_MODE = 0x1E,
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RESERVED_31_EXCEPTION = 0x1F,
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/* exception types for nmi and cache error exception vectors */
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NMI_EXCEPTION = 0x20,
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CACHE_ERROR_EXCEPTION = 0x21,
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/* These are used to replace TLB_MISS_LOAD/STORE_EXCEPTION
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* codes when using tlb refill exception vector.
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* TLB_MISS_LOAD/STORE_EXCEPTION code is used for tlb invalid
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*/
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TLB_REFILL_LOAD_EXCEPTION = 0x22,
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TLB_REFILL_STORE_EXCEPTION = 0x23,
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TLB_REFILL_MAX_NUM,
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END_CPU_EXCEPTION_TYPE = 0x2F,
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STACKACCESS_EXCEPTION = 0x30,
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SYS_FATALERR_EXT_TASK_EXCEPTION = 0x31,
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SYS_FATALERR_EXT_BUF_EXCEPTION = 0x32,
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SYS_FATALERR_MAX_NUM,
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/* Assertion */
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ASSERT_FAIL_EXCEPTION = 0x50,
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ASSERT_DUMP_EXTENDED_RECORD = 0x51,
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ASSERT_FAIL_NATIVE = 0x52,
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ASSERT_CUSTOM_ADDR = 0x53,
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ASSERT_CUSTOM_MODID = 0x54,
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ASSERT_CUSTOM_MOFID = 0x55,
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ASSERT_FAIL_MAX_NUM,
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/* cross core triggered */
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CC_INVALID_EXCEPTION = 0x60,
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CC_CS_EXCEPTION = 0x61,
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CC_MD32_EXCEPTION = 0x62,
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CC_C2K_EXCEPTION = 0x63,
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CC_VOLTE_EXCEPTION = 0x64,
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CC_USIP_EXCEPTION = 0x65,
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CC_SCQ_EXCEPTION = 0x66,
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CC_SONIC_EXCEPTION = 0x67,
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CC_EXCEPTION_MAX_NUM,
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/* HW triggered */
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EMI_MPU_VIOLATION_EXCEPTION = 0x70,
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MAX_EXCEPTION_NUM,
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END_EXCEPTION_TYPE = 0xFFFF,
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};/* exception_type */
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struct dump_info_assert {
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char file_name[256]; /* use pCore: file path, contain file name */
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int line_num;
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unsigned int parameters[3];
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};
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struct dump_info_fatal {
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int err_code1;
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int err_code2;
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int err_code3;
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unsigned int error_address;
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unsigned int error_pc;
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char *ExStr;
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char *err_sec;
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char offender[64];
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/*must be larger than struct ex_fatal_v5 filename:
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* pre-fix + fatal_fname
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*/
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char fatal_fname[EX_BRIEF_FATALERR_SIZE];
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};
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enum {
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MD_EE_DATA_IN_SMEM,
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MD_EE_DATA_IN_GPD,
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};
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struct debug_info_t {
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unsigned int type;
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unsigned int ex_type;
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u8 par_data_source;
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char core_name[MD_CORE_NAME_DEBUG];
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char *name;/* exception name */
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char *ELM_status;
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union {
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struct dump_info_assert dump_assert;
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struct dump_info_fatal dump_fatal;
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};
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void *ext_mem;
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size_t ext_size;
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};
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struct mdee_dumper_v5 {
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unsigned int more_info;
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struct debug_info_t debug_info;
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unsigned char ex_core_num;
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unsigned char ex_type;
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/* request by modem, change to 2k: include struct ex_PL_log*/
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unsigned char ex_pl_info[MD_HS1_FAIL_DUMP_SIZE];
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};
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#endif /* __MDEE_DUMPER_V5_H__ */
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