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https://github.com/physwizz/a155-U-u1.git
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129 lines
2.6 KiB
C
129 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include "adsp_reg.h"
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#include "adsp_core.h"
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#include "adsp_platform_driver.h"
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#include "adsp_platform.h"
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#ifdef ADSP_BASE
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#undef ADSP_BASE
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#endif
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#define ADSP_BASE mt_base
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#define SET_BITS(addr, mask) writel(readl(addr) | (mask), addr)
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#define CLR_BITS(addr, mask) writel(readl(addr) & ~(mask), addr)
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static void __iomem *mt_base;
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static u32 axibus_idle_val;
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/* below access adsp register necessary */
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void adsp_mt_set_swirq(u32 cid)
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{
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if (unlikely(cid >= get_adsp_core_total()))
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return;
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if (cid == ADSP_A_ID)
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writel(ADSP_A_SW_INT, ADSP_SW_INT_SET);
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else
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writel(ADSP_B_SW_INT, ADSP_SW_INT_SET);
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}
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u32 adsp_mt_check_swirq(u32 cid)
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{
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if (unlikely(cid >= get_adsp_core_total()))
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return 0;
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if (cid == ADSP_A_ID)
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return readl(ADSP_SW_INT_SET) & ADSP_A_SW_INT;
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else
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return readl(ADSP_SW_INT_SET) & ADSP_B_SW_INT;
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}
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void adsp_mt_clr_sysirq(u32 cid)
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{
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if (unlikely(cid >= get_adsp_core_total()))
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return;
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if (cid == ADSP_A_ID)
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writel(ADSP_A_2HOST_IRQ_BIT, ADSP_GENERAL_IRQ_CLR);
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else
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writel(ADSP_B_2HOST_IRQ_BIT, ADSP_GENERAL_IRQ_CLR);
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}
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EXPORT_SYMBOL(adsp_mt_clr_sysirq);
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void adsp_mt_clr_auidoirq(u32 cid)
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{
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if (unlikely(cid >= get_adsp_core_total()))
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return;
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/* just clear correct bits*/
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if (cid == ADSP_A_ID)
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writel(ADSP_A_AFE2HOST_IRQ_BIT, ADSP_GENERAL_IRQ_CLR);
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else
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writel(ADSP_B_AFE2HOST_IRQ_BIT, ADSP_GENERAL_IRQ_CLR);
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}
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EXPORT_SYMBOL(adsp_mt_clr_auidoirq);
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void adsp_mt_disable_wdt(u32 cid)
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{
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if (unlikely(cid >= get_adsp_core_total()))
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return;
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if (cid == ADSP_A_ID)
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CLR_BITS(ADSP_A_WDT_REG, WDT_EN_BIT);
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else
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CLR_BITS(ADSP_B_WDT_REG, WDT_EN_BIT);
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}
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EXPORT_SYMBOL(adsp_mt_disable_wdt);
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void adsp_mt_clr_spm(u32 cid)
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{
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if (unlikely(cid >= get_adsp_core_total()))
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return;
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if (cid == ADSP_A_ID)
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CLR_BITS(ADSP_A_SPM_WAKEUPSRC, ADSP_WAKEUP_SPM);
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else
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CLR_BITS(ADSP_B_SPM_WAKEUPSRC, ADSP_WAKEUP_SPM);
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}
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bool check_hifi_status(u32 mask)
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{
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return !!(readl(ADSP_SLEEP_STATUS_REG) & mask);
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}
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bool is_adsp_axibus_idle(void)
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{
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return (readl(ADSP_DBG_PEND_CNT) == axibus_idle_val);
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}
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bool is_infrabus_timeout(void)
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{
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return readl(ADSP_A_INTR_STATUS) & INFRABUS_TIMEOUT_IRQ;
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}
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void adsp_mt_toggle_semaphore(u32 bit)
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{
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writel((1 << bit), ADSP_SEMAPHORE);
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}
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u32 adsp_mt_get_semaphore(u32 bit)
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{
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return (readl(ADSP_SEMAPHORE) >> bit) & 0x1;
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}
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void adsp_hardware_init(struct adspsys_priv *adspsys)
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{
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if (unlikely(!adspsys))
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return;
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mt_base = adspsys->cfg;
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axibus_idle_val = adspsys->desc->axibus_idle_val;
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}
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