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https://github.com/physwizz/a155-U-u1.git
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355 lines
8.3 KiB
C
355 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
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* Copyright (C) 2015 Linaro Ltd.
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* Based on ARM MHU driver by Jassi Brar <jaswinder.singh@linaro.org>
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* Copyright (C) 2020 ARM Ltd.
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*/
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#include <linux/amba/bus.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#define INTR_STAT_OFS 0x0
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#define INTR_SET_OFS 0x8
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#define INTR_CLR_OFS 0x10
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#define MHU_LP_OFFSET 0x0
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#define MHU_HP_OFFSET 0x20
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#define MHU_SEC_OFFSET 0x200
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#define TX_REG_OFFSET 0x100
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#define MHU_CHANS 3 /* Secure, Non-Secure High and Low Priority */
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#define MHU_CHAN_MAX 20 /* Max channels to save on unused RAM */
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#define MHU_NUM_DOORBELLS 32
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struct mhu_db_link {
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unsigned int irq;
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void __iomem *tx_reg;
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void __iomem *rx_reg;
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};
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struct arm_mhu {
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void __iomem *base;
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struct mhu_db_link mlink[MHU_CHANS];
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struct mbox_controller mbox;
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struct device *dev;
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};
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/**
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* ARM MHU Mailbox allocated channel information
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*
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* @mhu: Pointer to parent mailbox device
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* @pchan: Physical channel within which this doorbell resides in
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* @doorbell: doorbell number pertaining to this channel
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*/
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struct mhu_db_channel {
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struct arm_mhu *mhu;
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unsigned int pchan;
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unsigned int doorbell;
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};
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static inline struct mbox_chan *
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mhu_db_mbox_to_channel(struct mbox_controller *mbox, unsigned int pchan,
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unsigned int doorbell)
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{
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int i;
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struct mhu_db_channel *chan_info;
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for (i = 0; i < mbox->num_chans; i++) {
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chan_info = mbox->chans[i].con_priv;
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if (chan_info && chan_info->pchan == pchan &&
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chan_info->doorbell == doorbell)
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return &mbox->chans[i];
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}
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return NULL;
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}
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static void mhu_db_mbox_clear_irq(struct mbox_chan *chan)
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{
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struct mhu_db_channel *chan_info = chan->con_priv;
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void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg;
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writel_relaxed(BIT(chan_info->doorbell), base + INTR_CLR_OFS);
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}
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static unsigned int mhu_db_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq)
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{
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unsigned int pchan;
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for (pchan = 0; pchan < MHU_CHANS; pchan++)
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if (mhu->mlink[pchan].irq == irq)
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break;
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return pchan;
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}
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static struct mbox_chan *
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mhu_db_mbox_irq_to_channel(struct arm_mhu *mhu, unsigned int pchan)
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{
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unsigned long bits;
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unsigned int doorbell;
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struct mbox_chan *chan = NULL;
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struct mbox_controller *mbox = &mhu->mbox;
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void __iomem *base = mhu->mlink[pchan].rx_reg;
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bits = readl_relaxed(base + INTR_STAT_OFS);
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if (!bits)
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/* No IRQs fired in specified physical channel */
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return NULL;
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/* An IRQ has fired, find the associated channel */
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for (doorbell = 0; bits; doorbell++) {
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if (!test_and_clear_bit(doorbell, &bits))
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continue;
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chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
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if (chan)
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break;
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dev_err(mbox->dev,
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"Channel not registered: pchan: %d doorbell: %d\n",
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pchan, doorbell);
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}
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return chan;
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}
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static irqreturn_t mhu_db_mbox_rx_handler(int irq, void *data)
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{
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struct mbox_chan *chan;
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struct arm_mhu *mhu = data;
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unsigned int pchan = mhu_db_mbox_irq_to_pchan_num(mhu, irq);
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while (NULL != (chan = mhu_db_mbox_irq_to_channel(mhu, pchan))) {
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mbox_chan_received_data(chan, NULL);
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mhu_db_mbox_clear_irq(chan);
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}
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return IRQ_HANDLED;
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}
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static bool mhu_db_last_tx_done(struct mbox_chan *chan)
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{
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struct mhu_db_channel *chan_info = chan->con_priv;
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void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
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if (readl_relaxed(base + INTR_STAT_OFS) & BIT(chan_info->doorbell))
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return false;
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return true;
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}
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static int mhu_db_send_data(struct mbox_chan *chan, void *data)
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{
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struct mhu_db_channel *chan_info = chan->con_priv;
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void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
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/* Send event to co-processor */
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writel_relaxed(BIT(chan_info->doorbell), base + INTR_SET_OFS);
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return 0;
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}
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static int mhu_db_startup(struct mbox_chan *chan)
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{
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mhu_db_mbox_clear_irq(chan);
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return 0;
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}
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static void mhu_db_shutdown(struct mbox_chan *chan)
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{
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struct mhu_db_channel *chan_info = chan->con_priv;
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struct mbox_controller *mbox = &chan_info->mhu->mbox;
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int i;
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for (i = 0; i < mbox->num_chans; i++)
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if (chan == &mbox->chans[i])
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break;
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if (mbox->num_chans == i) {
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dev_warn(mbox->dev, "Request to free non-existent channel\n");
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return;
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}
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/* Reset channel */
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mhu_db_mbox_clear_irq(chan);
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devm_kfree(mbox->dev, chan->con_priv);
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chan->con_priv = NULL;
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}
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static struct mbox_chan *mhu_db_mbox_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *spec)
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{
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struct arm_mhu *mhu = dev_get_drvdata(mbox->dev);
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struct mhu_db_channel *chan_info;
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struct mbox_chan *chan;
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unsigned int pchan = spec->args[0];
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unsigned int doorbell = spec->args[1];
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int i;
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/* Bounds checking */
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if (pchan >= MHU_CHANS || doorbell >= MHU_NUM_DOORBELLS) {
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dev_err(mbox->dev,
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"Invalid channel requested pchan: %d doorbell: %d\n",
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pchan, doorbell);
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return ERR_PTR(-EINVAL);
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}
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/* Is requested channel free? */
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chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
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if (chan) {
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dev_err(mbox->dev, "Channel in use: pchan: %d doorbell: %d\n",
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pchan, doorbell);
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return ERR_PTR(-EBUSY);
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}
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/* Find the first free slot */
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for (i = 0; i < mbox->num_chans; i++)
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if (!mbox->chans[i].con_priv)
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break;
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if (mbox->num_chans == i) {
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dev_err(mbox->dev, "No free channels left\n");
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return ERR_PTR(-EBUSY);
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}
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chan = &mbox->chans[i];
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chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL);
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if (!chan_info)
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return ERR_PTR(-ENOMEM);
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chan_info->mhu = mhu;
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chan_info->pchan = pchan;
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chan_info->doorbell = doorbell;
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chan->con_priv = chan_info;
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dev_dbg(mbox->dev, "mbox: created channel phys: %d doorbell: %d\n",
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pchan, doorbell);
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return chan;
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}
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static const struct mbox_chan_ops mhu_db_ops = {
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.send_data = mhu_db_send_data,
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.startup = mhu_db_startup,
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.shutdown = mhu_db_shutdown,
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.last_tx_done = mhu_db_last_tx_done,
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};
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static int mhu_db_probe(struct amba_device *adev, const struct amba_id *id)
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{
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u32 cell_count;
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int i, err, max_chans;
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struct arm_mhu *mhu;
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struct mbox_chan *chans;
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struct device *dev = &adev->dev;
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struct device_node *np = dev->of_node;
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int mhu_reg[MHU_CHANS] = {
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MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET,
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};
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if (!of_device_is_compatible(np, "arm,mhu-doorbell"))
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return -ENODEV;
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err = of_property_read_u32(np, "#mbox-cells", &cell_count);
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if (err) {
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dev_err(dev, "failed to read #mbox-cells in '%pOF'\n", np);
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return err;
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}
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if (cell_count == 2) {
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max_chans = MHU_CHAN_MAX;
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} else {
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dev_err(dev, "incorrect value of #mbox-cells in '%pOF'\n", np);
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return -EINVAL;
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}
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mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
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if (!mhu)
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return -ENOMEM;
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mhu->base = devm_ioremap_resource(dev, &adev->res);
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if (IS_ERR(mhu->base)) {
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dev_err(dev, "ioremap failed\n");
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return PTR_ERR(mhu->base);
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}
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chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL);
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if (!chans)
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return -ENOMEM;
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mhu->dev = dev;
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mhu->mbox.dev = dev;
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mhu->mbox.chans = chans;
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mhu->mbox.num_chans = max_chans;
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mhu->mbox.txdone_irq = false;
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mhu->mbox.txdone_poll = true;
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mhu->mbox.txpoll_period = 1;
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mhu->mbox.of_xlate = mhu_db_mbox_xlate;
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amba_set_drvdata(adev, mhu);
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mhu->mbox.ops = &mhu_db_ops;
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err = devm_mbox_controller_register(dev, &mhu->mbox);
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if (err) {
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dev_err(dev, "Failed to register mailboxes %d\n", err);
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return err;
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}
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for (i = 0; i < MHU_CHANS; i++) {
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int irq = mhu->mlink[i].irq = adev->irq[i];
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if (irq <= 0) {
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dev_dbg(dev, "No IRQ found for Channel %d\n", i);
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continue;
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}
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mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
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mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
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err = devm_request_threaded_irq(dev, irq, NULL,
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mhu_db_mbox_rx_handler,
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IRQF_ONESHOT, "mhu_db_link", mhu);
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if (err) {
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dev_err(dev, "Can't claim IRQ %d\n", irq);
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mbox_controller_unregister(&mhu->mbox);
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return err;
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}
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}
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dev_info(dev, "ARM MHU Doorbell mailbox registered\n");
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return 0;
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}
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static struct amba_id mhu_ids[] = {
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{
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.id = 0x1bb098,
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.mask = 0xffffff,
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},
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{ 0, 0 },
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};
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MODULE_DEVICE_TABLE(amba, mhu_ids);
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static struct amba_driver arm_mhu_db_driver = {
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.drv = {
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.name = "mhu-doorbell",
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},
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.id_table = mhu_ids,
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.probe = mhu_db_probe,
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};
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module_amba_driver(arm_mhu_db_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("ARM MHU Doorbell Driver");
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MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
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