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https://github.com/physwizz/a155-U-u1.git
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116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 MediaTek Inc.
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*/
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#ifndef __MTK_GPU_UTILITY_H__
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#define __MTK_GPU_UTILITY_H__
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#include <linux/types.h>
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#define MTK_GPU_DVFS_TYPE_LIST {\
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MTK_GPU_DVFS_TYPE_ITEM(NONE) \
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MTK_GPU_DVFS_TYPE_ITEM(SMARTBOOST) \
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MTK_GPU_DVFS_TYPE_ITEM(VSYNCBASED) \
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MTK_GPU_DVFS_TYPE_ITEM(FALLBACK) \
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MTK_GPU_DVFS_TYPE_ITEM(TIMERBASED) \
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MTK_GPU_DVFS_TYPE_ITEM(FASTDVFS) \
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MTK_GPU_DVFS_TYPE_ITEM(TOUCHBOOST) \
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MTK_GPU_DVFS_TYPE_ITEM(THERMAL) \
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MTK_GPU_DVFS_TYPE_ITEM(CUSTOMIZATION)}
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enum MTK_GPU_DVFS_TYPE
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#define MTK_GPU_DVFS_TYPE_ITEM(type) MTK_GPU_DVFS_TYPE_##type,
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MTK_GPU_DVFS_TYPE_LIST
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#undef MTK_GPU_DVFS_TYPE_ITEM
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;
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#define GT_MAKE_BIT(start_bit, index) ((index##u) << (start_bit))
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enum GPU_TUNER_FEATURE {
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MTK_GPU_TUNER_ANISOTROPIC_DISABLE = GT_MAKE_BIT(0, 1),
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MTK_GPU_TUNER_TRILINEAR_DISABLE = GT_MAKE_BIT(1, 1),
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};
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* returning false indicated no implement */
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/* unit: x bytes */
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bool mtk_get_gpu_memory_usage(unsigned int *pMemUsage);
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/* unit: 0~100 % */
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bool mtk_get_gpu_loading(unsigned int *pLoading);
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bool mtk_get_gpu_block(unsigned int *pBlock);
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bool mtk_get_gpu_idle(unsigned int *pIlde);
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bool mtk_set_bottom_gpu_freq(unsigned int ui32FreqLevel);
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/* ui32FreqLevel: 0=>lowest freq, count-1=>highest freq */
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bool mtk_custom_get_gpu_freq_level_count(unsigned int *pui32FreqLevelCount);
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bool mtk_custom_boost_gpu_freq(unsigned int ui32FreqLevel);
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bool mtk_get_custom_upbound_gpu_freq(unsigned long *pulFreq);
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bool mtk_get_custom_boost_gpu_freq(unsigned long *pulFreq);
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bool mtk_custom_upbound_gpu_freq(unsigned int ui32FreqLevel);
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bool mtk_dump_gpu_memory_usage(void);
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bool mtk_get_gpu_bottom_freq(unsigned long *pulFreq);
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/* unit: OPP index [0 : OPP_NUM-1] */
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bool mtk_get_gpu_floor_index(int *piIndex);
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bool mtk_get_gpu_ceiling_index(int *piIndex);
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/* unit: limiter [0 : LIMIT_NUM-1] */
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bool mtk_get_gpu_floor_limiter(unsigned int *puiLimiter);
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bool mtk_get_gpu_ceiling_limiter(unsigned int *puiLimiter);
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/* unit: frequency (MHz) */
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bool mtk_get_gpu_cur_freq(unsigned int *puiFreq);
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/* unit: OPP index [0 : OPP_NUM-1] */
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bool mtk_get_gpu_cur_oppidx(int *piIndex);
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bool mtk_dvfs_margin_value(int i32MarginValue);
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bool mtk_get_dvfs_margin_value(int *pi32MarginValue);
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bool mtk_loading_base_dvfs_step(int i32StepValue);
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bool mtk_get_loading_base_dvfs_step(int *pi32StepValue);
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bool mtk_timer_base_dvfs_margin(int i32MarginValue);
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bool mtk_get_timer_base_dvfs_margin(int *pi32MaginValue);
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bool mtk_dvfs_loading_mode(int i32LoadingMode);
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bool mtk_get_dvfs_loading_mode(unsigned int *pui32LoadingMode);
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bool mtk_set_fastdvfs_mode(unsigned int u32Mode);
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bool mtk_get_fastdvfs_mode(unsigned int *pui32Mode);
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bool mtk_set_gpu_idle(unsigned int val);
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/* GPU PMU should be implemented by GPU IP-dep code */
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struct GPU_PMU {
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int id;
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const char *name;
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unsigned int value;
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int overflow;
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};
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bool mtk_get_gpu_pmu_init(struct GPU_PMU *pmus, int pmu_size, int *ret_size);
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bool mtk_get_gpu_pmu_swapnreset(struct GPU_PMU *pmus, int pmu_size);
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bool mtk_get_gpu_pmu_deinit(void);
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bool mtk_get_gpu_pmu_swapnreset_stop(void);
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bool mtk_register_gpu_power_change(const char *name,
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void (*callback)(int power_on));
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bool mtk_unregister_gpu_power_change(const char *name);
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/* GPU POWER NOTIFY should be called by GPU only */
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void mtk_notify_gpu_power_change(int power_on);
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bool mtk_notify_gpu_freq_change(u32 clk_idx, u32 gpufreq);
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void mtk_gpu_fence_debug_dump(int fd, int pid, int type, int timeouts);
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#ifdef __cplusplus
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}
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#endif
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#endif
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