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https://github.com/physwizz/a155-U-u1.git
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128 lines
3.1 KiB
C
128 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#ifndef __MTK_DSI_H__
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#define __MTK_DSI_H__
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/clk.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_bridge.h>
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#include <video/videomode.h>
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#include "mtk_drm_crtc.h"
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#include "mtk_drm_ddp_comp.h"
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#include "mtk_panel_ext.h"
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#ifndef DRM_CMDQ_DISABLE
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#include <linux/soc/mediatek/mtk-cmdq-ext.h>
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#else
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#include "mtk-cmdq-ext.h"
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#endif
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struct t_condition_wq {
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wait_queue_head_t wq;
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atomic_t condition;
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};
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struct mtk_dsi_driver_data {
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const u32 reg_cmdq0_ofs;
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const u32 reg_cmdq1_ofs;
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const u32 reg_vm_cmd_con_ofs;
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const u32 reg_vm_cmd_data0_ofs;
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const u32 reg_vm_cmd_data10_ofs;
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const u32 reg_vm_cmd_data20_ofs;
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const u32 reg_vm_cmd_data30_ofs;
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s32 (*poll_for_idle)(struct mtk_dsi *dsi, struct cmdq_pkt *handle);
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irqreturn_t (*irq_handler)(int irq, void *dev_id);
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char *esd_eint_compat;
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bool support_shadow;
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bool need_bypass_shadow;
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bool need_wait_fifo;
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bool dsi_buffer;
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bool dsi_irq_ts_debug;
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bool dsi_new_trail;
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u32 max_vfp;
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unsigned int (*mmclk_by_datarate)(struct mtk_dsi *dsi,
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struct mtk_drm_crtc *mtk_crtc, unsigned int en);
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};
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struct mtk_dsi {
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struct mtk_ddp_comp ddp_comp;
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struct device *dev;
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struct mipi_dsi_host host;
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struct drm_encoder encoder;
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struct drm_connector conn;
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struct drm_panel *panel;
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struct mtk_panel_ext *ext;
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struct cmdq_pkt_buffer cmdq_buf;
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struct drm_bridge *bridge;
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struct phy *phy;
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bool is_slave;
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struct mtk_dsi *slave_dsi;
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struct mtk_dsi *master_dsi;
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void __iomem *regs;
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struct clk *engine_clk;
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struct clk *digital_clk;
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struct clk *hs_clk;
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u32 data_rate;
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u32 d_rate;
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unsigned long mode_flags;
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enum mipi_dsi_pixel_format format;
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unsigned int lanes;
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struct videomode vm;
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int clk_refcnt;
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bool output_en;
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bool doze_enabled;
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u32 irq_data;
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wait_queue_head_t irq_wait_queue;
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struct mtk_dsi_driver_data *driver_data;
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struct t_condition_wq enter_ulps_done;
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struct t_condition_wq exit_ulps_done;
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struct t_condition_wq te_rdy;
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struct t_condition_wq frame_done;
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unsigned int hs_trail;
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unsigned int hs_prpr;
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unsigned int hs_zero;
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unsigned int lpx;
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unsigned int ta_get;
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unsigned int ta_sure;
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unsigned int ta_go;
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unsigned int da_hs_exit;
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unsigned int cont_det;
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unsigned int clk_zero;
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unsigned int clk_hs_prpr;
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unsigned int clk_hs_exit;
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unsigned int clk_hs_post;
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unsigned int vsa;
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unsigned int vbp;
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unsigned int vfp;
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unsigned int hsa_byte;
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unsigned int hbp_byte;
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unsigned int hfp_byte;
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bool mipi_hopping_sta;
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bool panel_osc_hopping_sta;
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unsigned int data_phy_cycle;
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/* for Panel Master dcs read/write */
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struct mipi_dsi_device *dev_for_PM;
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};
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s32 mtk_dsi_poll_for_idle(struct mtk_dsi *dsi, struct cmdq_pkt *handle);
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irqreturn_t mtk_dsi_irq_status(int irq, void *dev_id);
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unsigned int mtk_dsi_set_mmclk_by_datarate_V1(struct mtk_dsi *dsi,
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struct mtk_drm_crtc *mtk_crtc, unsigned int en);
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unsigned int mtk_dsi_set_mmclk_by_datarate_V2(struct mtk_dsi *dsi,
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struct mtk_drm_crtc *mtk_crtc, unsigned int en);
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#endif
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