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https://github.com/physwizz/a155-U-u1.git
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421 lines
12 KiB
C
421 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* sun8i-ce-hash.c - hardware cryptographic offloader for
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* Allwinner H3/A64/H5/H2+/H6/R40 SoC
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*
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* Copyright (C) 2015-2020 Corentin Labbe <clabbe@baylibre.com>
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*
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* This file add support for MD5 and SHA1/SHA224/SHA256/SHA384/SHA512.
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*
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* You could find the datasheet in Documentation/arm/sunxi.rst
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*/
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#include <linux/bottom_half.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/scatterlist.h>
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#include <crypto/internal/hash.h>
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#include <crypto/sha.h>
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#include <crypto/md5.h>
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#include "sun8i-ce.h"
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int sun8i_ce_hash_crainit(struct crypto_tfm *tfm)
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{
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struct sun8i_ce_hash_tfm_ctx *op = crypto_tfm_ctx(tfm);
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg);
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struct sun8i_ce_alg_template *algt;
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int err;
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memset(op, 0, sizeof(struct sun8i_ce_hash_tfm_ctx));
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algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash);
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op->ce = algt->ce;
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op->enginectx.op.do_one_request = sun8i_ce_hash_run;
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op->enginectx.op.prepare_request = NULL;
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op->enginectx.op.unprepare_request = NULL;
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/* FALLBACK */
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op->fallback_tfm = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0,
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CRYPTO_ALG_NEED_FALLBACK);
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if (IS_ERR(op->fallback_tfm)) {
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dev_err(algt->ce->dev, "Fallback driver could no be loaded\n");
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return PTR_ERR(op->fallback_tfm);
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}
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if (algt->alg.hash.halg.statesize < crypto_ahash_statesize(op->fallback_tfm))
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algt->alg.hash.halg.statesize = crypto_ahash_statesize(op->fallback_tfm);
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crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
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sizeof(struct sun8i_ce_hash_reqctx) +
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crypto_ahash_reqsize(op->fallback_tfm));
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dev_info(op->ce->dev, "Fallback for %s is %s\n",
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crypto_tfm_alg_driver_name(tfm),
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crypto_tfm_alg_driver_name(&op->fallback_tfm->base));
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err = pm_runtime_get_sync(op->ce->dev);
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if (err < 0)
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goto error_pm;
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return 0;
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error_pm:
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pm_runtime_put_noidle(op->ce->dev);
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crypto_free_ahash(op->fallback_tfm);
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return err;
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}
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void sun8i_ce_hash_craexit(struct crypto_tfm *tfm)
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{
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_tfm_ctx(tfm);
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crypto_free_ahash(tfmctx->fallback_tfm);
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pm_runtime_put_sync_suspend(tfmctx->ce->dev);
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}
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int sun8i_ce_hash_init(struct ahash_request *areq)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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memset(rctx, 0, sizeof(struct sun8i_ce_hash_reqctx));
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_init(&rctx->fallback_req);
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}
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int sun8i_ce_hash_export(struct ahash_request *areq, void *out)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_export(&rctx->fallback_req, out);
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}
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int sun8i_ce_hash_import(struct ahash_request *areq, const void *in)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_import(&rctx->fallback_req, in);
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}
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int sun8i_ce_hash_final(struct ahash_request *areq)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg);
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struct sun8i_ce_alg_template *algt;
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#endif
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.result = areq->result;
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash);
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algt->stat_fb++;
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#endif
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return crypto_ahash_final(&rctx->fallback_req);
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}
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int sun8i_ce_hash_update(struct ahash_request *areq)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = areq->nbytes;
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rctx->fallback_req.src = areq->src;
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return crypto_ahash_update(&rctx->fallback_req);
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}
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int sun8i_ce_hash_finup(struct ahash_request *areq)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg);
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struct sun8i_ce_alg_template *algt;
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#endif
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = areq->nbytes;
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rctx->fallback_req.src = areq->src;
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rctx->fallback_req.result = areq->result;
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash);
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algt->stat_fb++;
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#endif
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return crypto_ahash_finup(&rctx->fallback_req);
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}
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static int sun8i_ce_hash_digest_fb(struct ahash_request *areq)
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{
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg);
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struct sun8i_ce_alg_template *algt;
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#endif
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ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
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rctx->fallback_req.base.flags = areq->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = areq->nbytes;
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rctx->fallback_req.src = areq->src;
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rctx->fallback_req.result = areq->result;
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash);
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algt->stat_fb++;
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#endif
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return crypto_ahash_digest(&rctx->fallback_req);
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}
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static bool sun8i_ce_hash_need_fallback(struct ahash_request *areq)
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{
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struct scatterlist *sg;
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if (areq->nbytes == 0)
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return true;
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/* we need to reserve one SG for padding one */
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if (sg_nents(areq->src) > MAX_SG - 1)
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return true;
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sg = areq->src;
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while (sg) {
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if (sg->length % 4 || !IS_ALIGNED(sg->offset, sizeof(u32)))
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return true;
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sg = sg_next(sg);
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}
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return false;
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}
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int sun8i_ce_hash_digest(struct ahash_request *areq)
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{
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg);
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct sun8i_ce_alg_template *algt;
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struct sun8i_ce_dev *ce;
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struct crypto_engine *engine;
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struct scatterlist *sg;
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int nr_sgs, e, i;
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if (sun8i_ce_hash_need_fallback(areq))
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return sun8i_ce_hash_digest_fb(areq);
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nr_sgs = sg_nents(areq->src);
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if (nr_sgs > MAX_SG - 1)
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return sun8i_ce_hash_digest_fb(areq);
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for_each_sg(areq->src, sg, nr_sgs, i) {
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if (sg->length % 4 || !IS_ALIGNED(sg->offset, sizeof(u32)))
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return sun8i_ce_hash_digest_fb(areq);
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}
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algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash);
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ce = algt->ce;
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e = sun8i_ce_get_engine_number(ce);
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rctx->flow = e;
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engine = ce->chanlist[e].engine;
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return crypto_transfer_hash_request_to_engine(engine, areq);
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}
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int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
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{
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struct ahash_request *areq = container_of(breq, struct ahash_request, base);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg);
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struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq);
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struct sun8i_ce_alg_template *algt;
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struct sun8i_ce_dev *ce;
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struct sun8i_ce_flow *chan;
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struct ce_task *cet;
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struct scatterlist *sg;
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int nr_sgs, flow, err;
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unsigned int len;
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u32 common;
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u64 byte_count;
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__le32 *bf;
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void *buf = NULL;
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int j, i, todo;
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int nbw = 0;
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u64 fill, min_fill;
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__be64 *bebits;
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__le64 *lebits;
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void *result = NULL;
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u64 bs;
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int digestsize;
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dma_addr_t addr_res, addr_pad;
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algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash);
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ce = algt->ce;
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bs = algt->alg.hash.halg.base.cra_blocksize;
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digestsize = algt->alg.hash.halg.digestsize;
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if (digestsize == SHA224_DIGEST_SIZE)
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digestsize = SHA256_DIGEST_SIZE;
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if (digestsize == SHA384_DIGEST_SIZE)
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digestsize = SHA512_DIGEST_SIZE;
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/* the padding could be up to two block. */
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buf = kzalloc(bs * 2, GFP_KERNEL | GFP_DMA);
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if (!buf) {
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err = -ENOMEM;
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goto theend;
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}
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bf = (__le32 *)buf;
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result = kzalloc(digestsize, GFP_KERNEL | GFP_DMA);
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if (!result) {
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err = -ENOMEM;
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goto theend;
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}
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flow = rctx->flow;
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chan = &ce->chanlist[flow];
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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algt->stat_req++;
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#endif
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dev_dbg(ce->dev, "%s %s len=%d\n", __func__, crypto_tfm_alg_name(areq->base.tfm), areq->nbytes);
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cet = chan->tl;
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memset(cet, 0, sizeof(struct ce_task));
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cet->t_id = cpu_to_le32(flow);
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common = ce->variant->alg_hash[algt->ce_algo_id];
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common |= CE_COMM_INT;
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cet->t_common_ctl = cpu_to_le32(common);
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cet->t_sym_ctl = 0;
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cet->t_asym_ctl = 0;
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nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE);
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if (nr_sgs <= 0 || nr_sgs > MAX_SG) {
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dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs);
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err = -EINVAL;
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goto theend;
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}
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len = areq->nbytes;
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for_each_sg(areq->src, sg, nr_sgs, i) {
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cet->t_src[i].addr = cpu_to_le32(sg_dma_address(sg));
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todo = min(len, sg_dma_len(sg));
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cet->t_src[i].len = cpu_to_le32(todo / 4);
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len -= todo;
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}
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if (len > 0) {
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dev_err(ce->dev, "remaining len %d\n", len);
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err = -EINVAL;
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goto theend;
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}
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addr_res = dma_map_single(ce->dev, result, digestsize, DMA_FROM_DEVICE);
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cet->t_dst[0].addr = cpu_to_le32(addr_res);
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cet->t_dst[0].len = cpu_to_le32(digestsize / 4);
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if (dma_mapping_error(ce->dev, addr_res)) {
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dev_err(ce->dev, "DMA map dest\n");
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err = -EINVAL;
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goto theend;
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}
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byte_count = areq->nbytes;
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j = 0;
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bf[j++] = cpu_to_le32(0x80);
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if (bs == 64) {
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fill = 64 - (byte_count % 64);
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min_fill = 2 * sizeof(u32) + (nbw ? 0 : sizeof(u32));
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} else {
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fill = 128 - (byte_count % 128);
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min_fill = 4 * sizeof(u32) + (nbw ? 0 : sizeof(u32));
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}
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if (fill < min_fill)
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fill += bs;
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j += (fill - min_fill) / sizeof(u32);
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switch (algt->ce_algo_id) {
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case CE_ID_HASH_MD5:
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lebits = (__le64 *)&bf[j];
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*lebits = cpu_to_le64(byte_count << 3);
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j += 2;
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break;
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case CE_ID_HASH_SHA1:
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case CE_ID_HASH_SHA224:
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case CE_ID_HASH_SHA256:
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bebits = (__be64 *)&bf[j];
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*bebits = cpu_to_be64(byte_count << 3);
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j += 2;
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break;
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case CE_ID_HASH_SHA384:
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case CE_ID_HASH_SHA512:
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bebits = (__be64 *)&bf[j];
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*bebits = cpu_to_be64(byte_count >> 61);
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j += 2;
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bebits = (__be64 *)&bf[j];
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*bebits = cpu_to_be64(byte_count << 3);
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j += 2;
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break;
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}
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addr_pad = dma_map_single(ce->dev, buf, j * 4, DMA_TO_DEVICE);
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cet->t_src[i].addr = cpu_to_le32(addr_pad);
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cet->t_src[i].len = cpu_to_le32(j);
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if (dma_mapping_error(ce->dev, addr_pad)) {
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dev_err(ce->dev, "DMA error on padding SG\n");
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err = -EINVAL;
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goto theend;
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}
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if (ce->variant->hash_t_dlen_in_bits)
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cet->t_dlen = cpu_to_le32((areq->nbytes + j * 4) * 8);
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else
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cet->t_dlen = cpu_to_le32(areq->nbytes / 4 + j);
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chan->timeout = areq->nbytes;
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err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(areq->base.tfm));
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dma_unmap_single(ce->dev, addr_pad, j * 4, DMA_TO_DEVICE);
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dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_TO_DEVICE);
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dma_unmap_single(ce->dev, addr_res, digestsize, DMA_FROM_DEVICE);
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memcpy(areq->result, result, algt->alg.hash.halg.digestsize);
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theend:
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kfree(buf);
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kfree(result);
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local_bh_disable();
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crypto_finalize_hash_request(engine, breq, err);
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local_bh_enable();
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return 0;
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}
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