mirror of
https://github.com/physwizz/a155-U-u1.git
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186 lines
4.2 KiB
C
186 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Owen Chen <owen.chen@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6789-clk.h>
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#define MT_CCF_BRINGUP 1
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/* Regular Number Definition */
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#define INV_OFS -1
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#define INV_BIT -1
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static const struct mtk_gate_regs vde20_cg_regs = {
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.set_ofs = 0x0,
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.clr_ofs = 0x4,
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.sta_ofs = 0x0,
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};
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static const struct mtk_gate_regs vde21_cg_regs = {
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.set_ofs = 0x190,
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.clr_ofs = 0x190,
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.sta_ofs = 0x190,
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};
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static const struct mtk_gate_regs vde22_cg_regs = {
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.set_ofs = 0x200,
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.clr_ofs = 0x204,
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.sta_ofs = 0x200,
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};
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static const struct mtk_gate_regs vde23_cg_regs = {
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.set_ofs = 0x8,
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.clr_ofs = 0xC,
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.sta_ofs = 0x8,
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};
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#define GATE_VDE20(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &vde20_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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#define GATE_VDE21(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &vde21_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr_inv, \
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}
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#define GATE_VDE22(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &vde22_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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#define GATE_VDE23(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &vde23_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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static const struct mtk_gate vde2_clks[] = {
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/* VDE20 */
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GATE_VDE20(CLK_VDE2_VDEC_CKEN, "vde2_vdec_cken",
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"vdec_ck"/* parent */, 0),
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GATE_VDE20(CLK_VDE2_VDEC_ACTIVE, "vde2_vdec_active",
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"vdec_ck"/* parent */, 4),
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GATE_VDE20(CLK_VDE2_VDEC_CKEN_ENG, "vde2_vdec_cken_eng",
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"vdec_ck"/* parent */, 8),
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/* VDE21 */
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GATE_VDE21(CLK_VDE2_MINI_MDP_CKEN_CFG_RG, "vde2_mini_mdp",
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"vdec_ck"/* parent */, 0),
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/* VDE22 */
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GATE_VDE22(CLK_VDE2_LAT_CKEN, "vde2_lat_cken",
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"vdec_ck"/* parent */, 0),
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GATE_VDE22(CLK_VDE2_LAT_ACTIVE, "vde2_lat_active",
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"vdec_ck"/* parent */, 4),
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GATE_VDE22(CLK_VDE2_LAT_CKEN_ENG, "vde2_lat_cken_eng",
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"vdec_ck"/* parent */, 8),
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/* VDE23 */
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GATE_VDE23(CLK_VDE2_LARB1_CKEN, "vde2_larb1_cken",
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"vdec_ck"/* parent */, 0),
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};
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static const struct mtk_clk_desc vde2_mcd = {
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.clks = vde2_clks,
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.num_clks = CLK_VDE2_NR_CLK,
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};
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static const struct mtk_gate_regs ven1_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_VEN1(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &ven1_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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static const struct mtk_gate ven1_clks[] = {
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GATE_VEN1(CLK_VEN1_CKE0_LARB, "ven1_cke0_larb",
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"venc_ck"/* parent */, 0),
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GATE_VEN1(CLK_VEN1_CKE1_VENC, "ven1_cke1_venc",
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"venc_ck"/* parent */, 4),
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GATE_VEN1(CLK_VEN1_CKE2_JPGENC, "ven1_cke2_jpgenc",
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"venc_ck"/* parent */, 8),
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GATE_VEN1(CLK_VEN1_CKE5_GALS, "ven1_cke5_gals",
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"venc_ck"/* parent */, 28),
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};
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static const struct mtk_clk_desc ven1_mcd = {
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.clks = ven1_clks,
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.num_clks = CLK_VEN1_NR_CLK,
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};
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static const struct of_device_id of_match_clk_mt6789_vcodec[] = {
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{
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.compatible = "mediatek,mt6789-vdecsys",
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.data = &vde2_mcd,
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}, {
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.compatible = "mediatek,mt6789-vencsys",
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.data = &ven1_mcd,
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}, {
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/* sentinel */
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}
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};
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static int clk_mt6789_vcodec_grp_probe(struct platform_device *pdev)
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{
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int r;
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init begin\n", __func__, pdev->name);
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#endif
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r = mtk_clk_simple_probe(pdev);
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if (r)
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dev_err(&pdev->dev,
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init end\n", __func__, pdev->name);
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#endif
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return r;
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}
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static struct platform_driver clk_mt6789_vcodec_drv = {
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.probe = clk_mt6789_vcodec_grp_probe,
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.driver = {
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.name = "clk-mt6789-vcodec",
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.of_match_table = of_match_clk_mt6789_vcodec,
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},
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};
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module_platform_driver(clk_mt6789_vcodec_drv);
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MODULE_LICENSE("GPL");
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