mirror of
https://github.com/physwizz/a155-U-u1.git
synced 2025-09-05 12:50:27 +00:00
193 lines
3.8 KiB
Plaintext
193 lines
3.8 KiB
Plaintext
#define SX9385 1
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#define SX9385_BUILT_IN 1
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#define SX9385_SUB 1
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#define SX9385_SUB_BUILT_IN 1
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#define SX9385_SUB2 1
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#define SX9385_SUB2_BUILT_IN 1
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#if SX9385
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&sw_i2c0 {
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gpios = <SEC_GPIO_REF(AP,pio,104) 0 /* sda */
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SEC_GPIO_REF(AP,pio,103) 0>; /* scl */
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pinctrl-0 = <&grip_i2c_sda
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&grip_i2c_scl
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>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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sx9385: sx9385-i2c@29 {
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compatible = "sx9385";
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reg = <0x29>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&grip_int
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#if 1
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&grip_ldo_en
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#endif
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>;
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interrupt-parent = <SEC_GPIO_TYPE(AP,pio,12)>;
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interrupts = <SEC_GPIO_NUM(AP,pio,12) 0 0>;
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#if 1
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sx9385,ldo_en = <SEC_GPIO_REF(AP,pio,84) 0>;
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#else
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sx9385,dvdd_vreg_name = "VDD_GRIP_3P3";
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#endif
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sx9385,nirq-gpio = <SEC_GPIO_REF(AP,pio,12) 0>;
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sx9385,unknown_sel = <3>;
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sx9385,main-phases = <0x14>;
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sx9385,ref-phases = <0xA>;
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sx9385,num_of_channels = <2>;
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sx9385,num_of_refs = <2>; /* lego! */
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};
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};
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&pio {
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grip_i2c_sda: grip-i2c-sda {
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GPIO_CONFIG_PUD_DRV(AP,pio,104, FUNC_INPUT, PULL_NONE, DRV_LV1);
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};
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grip_i2c_scl: grip-i2c-scl {
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GPIO_CONFIG_PUD_DRV(AP,pio,103, FUNC_INPUT, PULL_NONE, DRV_LV1);
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};
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};
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&pio {
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grip_int: grip-int {
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GPIO_CONFIG_PUD_DRV(AP,pio,12, FUNC_INPUT_WAKEUP, PULL_NONE, DRV_LV1);
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};
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};
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#if 1
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&pio {
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grip_ldo_en: grip-ldo-en {
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GPIO_CONFIG_PUD(AP,pio,84, FUNC_OUTPUT_HIGH, PULL_NONE);
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};
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};
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#endif
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#endif
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#if GRIP_NONE
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&${i2c_grip_sub} {
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gpios = <SEC_GPIO_REF(${gpio_grip_sub_i2c_sda}) 0 /* sda */
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SEC_GPIO_REF(${gpio_grip_sub_i2c_scl}) 0>; /* scl */
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pinctrl-0 = <&grip_sub_i2c_sda
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&grip_sub_i2c_scl
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>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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sx9385_sub: sx9385_sub-i2c@29 {
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compatible = "sx9385_sub";
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reg = <0x29>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&grip_sub_int
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#if 0
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&grip_sub_ldo_en
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#endif
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>;
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interrupt-parent = <SEC_GPIO_TYPE(${gpio_grip_sub_irq})>;
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interrupts = <SEC_GPIO_NUM(${gpio_grip_sub_irq}) 0 0>;
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#if 0
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sx9385,ldo_en = <SEC_GPIO_REF(${gpio_grip_sub_en}) 0>;
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#elif 0
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sx9385,dvdd_vreg_name = "VDD_GRIP_SUB_3P3";
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#endif
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sx9385,nirq-gpio = <SEC_GPIO_REF(${gpio_grip_sub_irq}) 0>;
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#if 1
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sx9385,unknown_sel = <3>;
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#endif
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sx9385,main-phases = <0x14>;
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sx9385,ref-phases = <0xA>;
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sx9385,num_of_channels = <1>;
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sx9385,num_of_refs = <2>; /* lego! */
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};
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};
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&${gpio_grip_sub_i2c_parent} {
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grip_sub_i2c_sda: grip-sub-i2c-sda {
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GPIO_CONFIG_PUD_DRV(${gpio_grip_sub_i2c_sda}, FUNC_INPUT, PULL_NONE, DRV_LV1);
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};
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grip_sub_i2c_scl: grip-sub-i2c-scl {
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GPIO_CONFIG_PUD_DRV(${gpio_grip_sub_i2c_scl}, FUNC_INPUT, PULL_NONE, DRV_LV1);
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};
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};
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&${gpio_grip_sub_irq_parent} {
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grip_sub_int: grip-sub-int {
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GPIO_CONFIG_PUD_DRV(${gpio_grip_sub_irq}, FUNC_INPUT_WAKEUP, PULL_NONE, DRV_LV1);
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};
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};
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#if 0
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&${gpio_grip_sub_en_parent} {
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grip_sub_ldo_en: grip-sub-ldo-en {
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GPIO_CONFIG_PUD(${gpio_grip_sub_en}, FUNC_OUTPUT_LOW, PULL_NONE);
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};
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};
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#endif
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#endif
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/* /home/dpi/qb5_8814/workspace/P4_1716/android/kernel/kmodule/sensors/sx9385/dts/sx9385.a15.dtsi */
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/delete-node/ &grip_ldo_en;
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&pio {
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grip_ldo_en: grip-ldo-en {
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GPIO_CONFIG_PUD_DRV(AP,pio,84, FUNC_INPUT, PULL_DOWN, DRV_LV1);
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};
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};
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&sx9385 {
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sx9385,reg-num = <41>;
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sx9385,reg-init = /bits/ 8 <
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0x02 0x00
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0x04 0x30
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0x05 0x18
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0x07 0xC0
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0x08 0x11
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0x0B 0x0A
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0x0D 0x06
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0x0E 0x66
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0x47 0x56
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0x4D 0x56
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0x54 0x46
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0x5A 0x46
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0x48 0x05
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0x4E 0x05
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0x55 0x04
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0x5B 0x04
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0x49 0x27
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0x4F 0x27
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0x56 0x3F
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0x5C 0x3F
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0x79 0x12
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0x7A 0x20
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0x80 0x20
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0x7B 0x60
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0x7D 0x35
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0x81 0x60
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0x7C 0x4A
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0x82 0x00
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0x83 0x35
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0x7E 0x14
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0x84 0x80
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0x7F 0x1B
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0x91 0x00
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0x92 0x00
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0x9E 0x00
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0x8C 0x00
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0x4A 0x40
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0x50 0x04
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0x57 0x10
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0x5D 0x01
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0x09 0x78 /*Must write at the end*/
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>;
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};
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