mirror of
https://github.com/physwizz/a155-U-u1.git
synced 2025-09-05 12:50:27 +00:00
596 lines
14 KiB
Plaintext
596 lines
14 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2020 MediaTek Inc. */
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/* CAMERA GPIO standardization */
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&pio {
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camera_pins_cam0_rst_0: cam0@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam0_rst_1: cam0@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam0_pnd_0: cam0@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam0_pnd_1: cam0@3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam1_rst_0: cam1@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO60__FUNC_GPIO60>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam1_rst_1: cam1@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO60__FUNC_GPIO60>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam1_pnd_0: cam1@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO60__FUNC_GPIO60>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam1_pnd_1: cam1@3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO60__FUNC_GPIO60>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_rst_0: cam2@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_rst_1: cam2@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_pnd_0: cam2@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_pnd_1: cam2@3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam4_rst_0: cam4@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam4_rst_1: cam4@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam4_pnd_0: cam4@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam4_pnd_1: cam4@3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam0_vcamd_0: cam0@vcam0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO82__FUNC_GPIO82>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam0_vcamd_1: cam0@vcam1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO82__FUNC_GPIO82>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam0_vcama_0: cam0@vcam2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO80__FUNC_GPIO80>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam0_vcama_1: cam0@vcam3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO80__FUNC_GPIO80>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam1_vcamd_0: cam1@vcam0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam1_vcamd_1: cam1@vcam1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam1_vcama_0: cam1@vcam2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam1_vcama_1: cam1@vcam3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_vcamd_0: cam2@vcam0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_vcamd_1: cam2@vcam1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_vcama_0: cam2@vcam2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO94__FUNC_GPIO94>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_vcama_1: cam2@vcam3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO94__FUNC_GPIO94>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam4_vcamd_0: cam4@vcam0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam4_vcamd_1: cam4@vcam1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam4_vcama_0: cam4@vcam2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam4_vcama_1: cam4@vcam3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam0_mclk_off: camera_pins_cam0_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO50__FUNC_GPIO50>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam0_mclk_2ma: camera_pins_cam0_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO50__FUNC_CMMCLK1>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam0_mclk_4ma: camera_pins_cam0_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO50__FUNC_CMMCLK1>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam0_mclk_6ma: camera_pins_cam0_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO50__FUNC_CMMCLK1>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam0_mclk_8ma: camera_pins_cam0_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO50__FUNC_CMMCLK1>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam1_mclk_off: camera_pins_cam1_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO52__FUNC_GPIO52>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam1_mclk_2ma: camera_pins_cam1_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO52__FUNC_CMMCLK3>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam1_mclk_4ma: camera_pins_cam1_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO52__FUNC_CMMCLK3>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam1_mclk_6ma: camera_pins_cam1_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO52__FUNC_CMMCLK3>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam1_mclk_8ma: camera_pins_cam1_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO52__FUNC_CMMCLK3>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam2_mclk_off: camera_pins_cam2_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO49__FUNC_GPIO49>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam2_mclk_2ma: camera_pins_cam2_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO49__FUNC_CMMCLK0>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam2_mclk_4ma: camera_pins_cam2_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO49__FUNC_CMMCLK0>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam2_mclk_6ma: camera_pins_cam2_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO49__FUNC_CMMCLK0>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam2_mclk_8ma: camera_pins_cam2_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO49__FUNC_CMMCLK0>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam4_mclk_off: camera_pins_cam4_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO51__FUNC_GPIO51>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam4_mclk_2ma: camera_pins_cam4_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO51__FUNC_CMMCLK2>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam4_mclk_4ma: camera_pins_cam4_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO51__FUNC_CMMCLK2>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam4_mclk_6ma: camera_pins_cam4_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO51__FUNC_CMMCLK2>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam4_mclk_8ma: camera_pins_cam4_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO51__FUNC_CMMCLK2>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam_mipi_switch_en_1: mipi_en@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO131__FUNC_GPIO131>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam_mipi_switch_en_0: mipi_en@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO131__FUNC_GPIO131>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam_mipi_switch_sel_1: mipi_sel@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO140__FUNC_GPIO140>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam_mipi_switch_sel_0: mipi_sel@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO140__FUNC_GPIO140>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_default: camdefault {
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};
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};
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&kd_camera_hw1 {
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pinctrl-names = "default",
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"cam0_rst0", "cam0_rst1",
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"cam0_pnd0", "cam0_pnd1",
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"cam1_rst0", "cam1_rst1",
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"cam1_pnd0", "cam1_pnd1",
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"cam2_rst0", "cam2_rst1",
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"cam2_pnd0", "cam2_pnd1",
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"cam4_rst0", "cam4_rst1",
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"cam4_pnd0", "cam4_pnd1",
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"cam0_ldo_vcamd_0", "cam0_ldo_vcamd_1",
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"cam0_ldo_vcama_0", "cam0_ldo_vcama_1",
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"cam1_ldo_vcamd_0", "cam1_ldo_vcamd_1",
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"cam1_ldo_vcama_0", "cam1_ldo_vcama_1",
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"cam2_ldo_vcamd_0", "cam2_ldo_vcamd_1",
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"cam2_ldo_vcama_0", "cam2_ldo_vcama_1",
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"cam4_ldo_vcamd_0", "cam4_ldo_vcamd_1",
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"cam4_ldo_vcama_0", "cam4_ldo_vcama_1",
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"cam0_mclk_off",
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"cam0_mclk_2mA", "cam0_mclk_4mA",
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"cam0_mclk_6mA", "cam0_mclk_8mA",
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"cam1_mclk_off",
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"cam1_mclk_2mA", "cam1_mclk_4mA",
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"cam1_mclk_6mA", "cam1_mclk_8mA",
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"cam2_mclk_off",
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"cam2_mclk_2mA", "cam2_mclk_4mA",
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"cam2_mclk_6mA", "cam2_mclk_8mA",
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"cam4_mclk_off",
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"cam4_mclk_2mA", "cam4_mclk_4mA",
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"cam4_mclk_6mA", "cam4_mclk_8mA",
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"cam_mipi_switch_en_1", "cam_mipi_switch_en_0",
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"cam_mipi_switch_sel_1", "cam_mipi_switch_sel_0";
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pinctrl-0 = <&camera_pins_default>;
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pinctrl-1 = <&camera_pins_cam0_rst_0>;
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pinctrl-2 = <&camera_pins_cam0_rst_1>;
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pinctrl-3 = <&camera_pins_cam0_pnd_0>;
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pinctrl-4 = <&camera_pins_cam0_pnd_1>;
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pinctrl-5 = <&camera_pins_cam1_rst_0>;
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pinctrl-6 = <&camera_pins_cam1_rst_1>;
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pinctrl-7 = <&camera_pins_cam1_pnd_0>;
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pinctrl-8 = <&camera_pins_cam1_pnd_1>;
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pinctrl-9 = <&camera_pins_cam2_rst_0>;
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pinctrl-10 = <&camera_pins_cam2_rst_1>;
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pinctrl-11 = <&camera_pins_cam2_pnd_0>;
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pinctrl-12 = <&camera_pins_cam2_pnd_1>;
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pinctrl-13 = <&camera_pins_cam4_rst_0>;
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pinctrl-14 = <&camera_pins_cam4_rst_1>;
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pinctrl-15 = <&camera_pins_cam4_pnd_0>;
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pinctrl-16 = <&camera_pins_cam4_pnd_1>;
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pinctrl-17 = <&camera_pins_cam0_vcamd_0>;
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pinctrl-18 = <&camera_pins_cam0_vcamd_1>;
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pinctrl-19 = <&camera_pins_cam0_vcama_0>;
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pinctrl-20 = <&camera_pins_cam0_vcama_1>;
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pinctrl-21 = <&camera_pins_cam1_vcamd_0>;
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pinctrl-22 = <&camera_pins_cam1_vcamd_1>;
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pinctrl-23 = <&camera_pins_cam1_vcama_0>;
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pinctrl-24 = <&camera_pins_cam1_vcama_1>;
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pinctrl-25 = <&camera_pins_cam2_vcamd_0>;
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pinctrl-26 = <&camera_pins_cam2_vcamd_1>;
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pinctrl-27 = <&camera_pins_cam2_vcama_0>;
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pinctrl-28 = <&camera_pins_cam2_vcama_1>;
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pinctrl-29 = <&camera_pins_cam4_vcamd_0>;
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pinctrl-30 = <&camera_pins_cam4_vcamd_1>;
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pinctrl-31 = <&camera_pins_cam4_vcama_0>;
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pinctrl-32 = <&camera_pins_cam4_vcama_1>;
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pinctrl-33 = <&camera_pins_cam0_mclk_off>;
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pinctrl-34 = <&camera_pins_cam0_mclk_2ma>;
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pinctrl-35 = <&camera_pins_cam0_mclk_4ma>;
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pinctrl-36 = <&camera_pins_cam0_mclk_6ma>;
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pinctrl-37 = <&camera_pins_cam0_mclk_8ma>;
|
|
pinctrl-38 = <&camera_pins_cam1_mclk_off>;
|
|
pinctrl-39 = <&camera_pins_cam1_mclk_2ma>;
|
|
pinctrl-40 = <&camera_pins_cam1_mclk_4ma>;
|
|
pinctrl-41 = <&camera_pins_cam1_mclk_6ma>;
|
|
pinctrl-42 = <&camera_pins_cam1_mclk_8ma>;
|
|
pinctrl-43 = <&camera_pins_cam2_mclk_off>;
|
|
pinctrl-44 = <&camera_pins_cam2_mclk_2ma>;
|
|
pinctrl-45 = <&camera_pins_cam2_mclk_4ma>;
|
|
pinctrl-46 = <&camera_pins_cam2_mclk_6ma>;
|
|
pinctrl-47 = <&camera_pins_cam2_mclk_8ma>;
|
|
pinctrl-48 = <&camera_pins_cam4_mclk_off>;
|
|
pinctrl-49 = <&camera_pins_cam4_mclk_2ma>;
|
|
pinctrl-50 = <&camera_pins_cam4_mclk_4ma>;
|
|
pinctrl-51 = <&camera_pins_cam4_mclk_6ma>;
|
|
pinctrl-52 = <&camera_pins_cam4_mclk_8ma>;
|
|
pinctrl-53 = <&camera_pins_cam_mipi_switch_en_1>;
|
|
pinctrl-54 = <&camera_pins_cam_mipi_switch_en_0>;
|
|
pinctrl-55 = <&camera_pins_cam_mipi_switch_sel_1>;
|
|
pinctrl-56 = <&camera_pins_cam_mipi_switch_sel_0>;
|
|
|
|
cam0_vcamio-supply = <&mt6359p_vcamio_reg>;
|
|
cam1_vcamio-supply = <&mt6359p_vcamio_reg>;
|
|
cam2_vcamio-supply = <&mt6359p_vcamio_reg>;
|
|
cam4_vcamio-supply = <&mt6359p_vcamio_reg>;
|
|
|
|
cam0_pin_mclk = "mclk";
|
|
cam0_pin_pdn = "gpio";
|
|
cam0_pin_rst = "gpio";
|
|
cam0_pin_vcama = "gpio";
|
|
cam0_pin_vcamd = "gpio";
|
|
cam0_pin_vcamio = "regulator";
|
|
cam1_pin_mclk = "mclk";
|
|
cam1_pin_pdn = "gpio";
|
|
cam1_pin_rst = "gpio";
|
|
cam1_pin_vcama = "gpio";
|
|
cam1_pin_vcamd = "gpio";
|
|
cam1_pin_vcamio = "regulator";
|
|
cam1_pin_mipi_switch_en = "gpio";
|
|
cam1_pin_mipi_switch_sel = "gpio";
|
|
cam2_pin_mclk = "mclk";
|
|
cam2_pin_pdn = "gpio";
|
|
cam2_pin_rst = "gpio";
|
|
cam2_pin_vcama = "gpio";
|
|
cam2_pin_vcamd = "gpio";
|
|
cam2_pin_vcamio = "regulator";
|
|
cam3_pin_mclk = "mclk";
|
|
cam3_pin_pdn = "gpio";
|
|
cam3_pin_rst = "gpio";
|
|
cam3_pin_vcama = "gpio";
|
|
cam3_pin_vcamd = "gpio";
|
|
cam3_pin_vcamio = "regulator";
|
|
cam4_pin_mclk = "mclk";
|
|
cam4_pin_pdn = "gpio";
|
|
cam4_pin_rst = "gpio";
|
|
cam4_pin_vcama = "gpio";
|
|
cam4_pin_vcamd = "gpio";
|
|
cam4_pin_vcamio = "regulator";
|
|
cam4_pin_mipi_switch_en = "gpio";
|
|
cam4_pin_mipi_switch_sel = "gpio";
|
|
|
|
status = "okay";
|
|
};
|
|
/* CAMERA GPIO end */
|
|
|
|
/* CAMERA EEPROM */
|
|
&i2c2 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
mtk_camera_eeprom2:camera_eeprom2@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
camera_main_two_mtk:camera_main_two@10 {
|
|
compatible = "mediatek,camera_main_two";
|
|
#thermal-sensor-cells = <0>;
|
|
reg = <0x10>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
&i2c4 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
mtk_camera_eeprom1:camera_eeprom1@51 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x51>;
|
|
status = "okay";
|
|
};
|
|
mtk_camera_eeprom4:camera_eeprom4@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
camera_sub_mtk:camera_sub@1a {
|
|
compatible = "mediatek,camera_sub";
|
|
#thermal-sensor-cells = <0>;
|
|
reg = <0x1a>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
&i2c8 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
mtk_camera_eeprom0:camera_eeprom0@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
camera_main_mtk:camera_main@1a {
|
|
compatible = "mediatek,camera_main";
|
|
#thermal-sensor-cells = <0>;
|
|
reg = <0x1a>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
/* CAMERA EEPROM end */
|
|
|
|
/* CAMERA AF */
|
|
&i2c2 {
|
|
camera_main_two_af_mtk:camera_main_two_af@0c {
|
|
compatible = "mediatek,camera_main_two_af";
|
|
reg = <0x0c>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
&i2c8 {
|
|
camera_main_af_mtk:camera_main_af@72 {
|
|
compatible = "mediatek,camera_main_af";
|
|
reg = <0x72>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
&i2c9 {
|
|
camera_main_three_af_mtk:camera_main_three_af@0c {
|
|
compatible = "mediatek,camera_main_three_af";
|
|
reg = <0x0c>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
/* CAMERA AF end */
|