a155-U-u1/kernel-5.10/arch/arm64/boot/dts/mediatek/cust_mt6789_msdc.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2022 MediaTek Inc.
 */
/********************************************
 * MT6789 MSDC DTSI File
 ********************************************/
#include <dt-bindings/gpio/gpio.h>

&mmc0 {
	host-index = <0>;
	status = "okay";
	pinctrl-names = "default", "state_uhs", "pull_down";
	pinctrl-0 = <&mmc0_pins_default>;
	pinctrl-1 = <&mmc0_pins_uhs>;
	pinctrl-2 = <&mmc0_pins_pull_down>;
	bus-width = <8>;
	max-frequency = <200000000>;
	ocr-voltage = <0x00030000>;
	cap-mmc-highspeed;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	//cap-mmc-hw-reset;
	no-sdio;
	no-sd;
	hs400-ds-delay = <0x12814>;
	vmmc-supply = <&mt6358_vemc_reg>;
	non-removable;
	supports-cqe;
	dvfsrc-vcore-supply = <&dvfsrc_vcore>;
	req-vcore = <650000>;
};

&mmc1 {
	host-index = <1>;
	status = "okay";
	pinctrl-names = "default", "state_uhs", "pull_down";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_uhs>;
	pinctrl-2 = <&mmc1_pins_pull_down>;
	bus-width = <4>;
	max-frequency = <200000000>;
	ocr-voltage = <0x00030000>;
	cap-sd-highspeed;
	sd-uhs-sdr12;
	sd-uhs-sdr25;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	sd-uhs-ddr50;
	cd-debounce-delay-ms = <0>;
	cd-gpios = <&pio 7 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&mt6358_vmch_eint_low>;
	vqmmc-supply = <&mt6358_vmc_reg>;
	no-mmc;
	no-sdio;
	dvfsrc-vcore-supply = <&dvfsrc_vcore>;
	req-vcore = <650000>;
};

&pio {
	mmc0_pins_default: mmc0default {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO58__FUNC_MSDC0_DAT0>,
				<PINMUX_GPIO59__FUNC_MSDC0_DAT1>,
				<PINMUX_GPIO60__FUNC_MSDC0_DAT2>,
				<PINMUX_GPIO61__FUNC_MSDC0_DAT3>,
				<PINMUX_GPIO62__FUNC_MSDC0_DAT4>,
				<PINMUX_GPIO63__FUNC_MSDC0_DAT5>,
				<PINMUX_GPIO64__FUNC_MSDC0_DAT6>,
				<PINMUX_GPIO65__FUNC_MSDC0_DAT7>,
				<PINMUX_GPIO56__FUNC_MSDC0_CMD>;
			input-enable;
			drive-strength = <4>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
		pins_clk {
			pinmux = <PINMUX_GPIO55__FUNC_MSDC0_CLK>;
			drive-strength = <4>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
		pins_rst {
			pinmux = <PINMUX_GPIO57__FUNC_MSDC0_RSTB>;
			drive-strength = <4>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
		};
	};
	mmc0_pins_uhs: mmc0@0{
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO58__FUNC_MSDC0_DAT0>,
				<PINMUX_GPIO59__FUNC_MSDC0_DAT1>,
				<PINMUX_GPIO60__FUNC_MSDC0_DAT2>,
				<PINMUX_GPIO61__FUNC_MSDC0_DAT3>,
				<PINMUX_GPIO62__FUNC_MSDC0_DAT4>,
				<PINMUX_GPIO63__FUNC_MSDC0_DAT5>,
				<PINMUX_GPIO64__FUNC_MSDC0_DAT6>,
				<PINMUX_GPIO65__FUNC_MSDC0_DAT7>,
				<PINMUX_GPIO56__FUNC_MSDC0_CMD>;
			input-enable;
			drive-strength = <4>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
		pins_clk {
			pinmux = <PINMUX_GPIO55__FUNC_MSDC0_CLK>;
			drive-strength = <4>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
		pins_ds {
			pinmux = <PINMUX_GPIO54__FUNC_MSDC0_DSL>;
			drive-strength = <4>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
		pins_rst {
			pinmux = <PINMUX_GPIO57__FUNC_MSDC0_RSTB>;
			drive-strength = <4>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
		};
	};
	mmc0_pins_pull_down: mmc0@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO58__FUNC_MSDC0_DAT0>,
				<PINMUX_GPIO59__FUNC_MSDC0_DAT1>,
				<PINMUX_GPIO60__FUNC_MSDC0_DAT2>,
				<PINMUX_GPIO61__FUNC_MSDC0_DAT3>,
				<PINMUX_GPIO62__FUNC_MSDC0_DAT4>,
				<PINMUX_GPIO63__FUNC_MSDC0_DAT5>,
				<PINMUX_GPIO64__FUNC_MSDC0_DAT6>,
				<PINMUX_GPIO65__FUNC_MSDC0_DAT7>,
				<PINMUX_GPIO56__FUNC_MSDC0_CMD>;
			input-enable;
			drive-strength = <4>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
		pins_clk {
			pinmux = <PINMUX_GPIO55__FUNC_MSDC0_CLK>;
			drive-strength = <4>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
		pins_rst {
			pinmux = <PINMUX_GPIO57__FUNC_MSDC0_RSTB>;
			drive-strength = <4>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
		};
	};
	mmc1_pins_default: mmc1default {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO73__FUNC_MSDC1_DAT0>,
				<PINMUX_GPIO74__FUNC_MSDC1_DAT1>,
				<PINMUX_GPIO75__FUNC_MSDC1_DAT2>,
				<PINMUX_GPIO76__FUNC_MSDC1_DAT3>,
				<PINMUX_GPIO72__FUNC_MSDC1_CMD>;
			input-enable;
			drive-strength = <3>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins_clk {
			pinmux = <PINMUX_GPIO71__FUNC_MSDC1_CLK>;
			drive-strength = <3>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};
	mmc1_pins_uhs: mmc1@0{
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO73__FUNC_MSDC1_DAT0>,
				<PINMUX_GPIO74__FUNC_MSDC1_DAT1>,
				<PINMUX_GPIO75__FUNC_MSDC1_DAT2>,
				<PINMUX_GPIO76__FUNC_MSDC1_DAT3>,
				<PINMUX_GPIO72__FUNC_MSDC1_CMD>;
			input-enable;
			drive-strength = <3>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins_clk {
			pinmux = <PINMUX_GPIO71__FUNC_MSDC1_CLK>;
			drive-strength = <3>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};
	mmc1_pins_pull_down: mmc1@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO73__FUNC_MSDC1_DAT0>,
				<PINMUX_GPIO74__FUNC_MSDC1_DAT1>,
				<PINMUX_GPIO75__FUNC_MSDC1_DAT2>,
				<PINMUX_GPIO76__FUNC_MSDC1_DAT3>,
				<PINMUX_GPIO72__FUNC_MSDC1_CMD>;
			input-enable;
			drive-strength = <3>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins_clk {
			pinmux = <PINMUX_GPIO71__FUNC_MSDC1_CLK>;
			drive-strength = <3>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};

};