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a155-U-u1/kernel-5.10/arch/arm64/boot/dts/mediatek/cust_mt6789_camera.dtsi
physwizz 99537be4e2 first
2024-03-11 06:53:12 +11:00

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// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) 2020 MediaTek Inc. */
/* CAMERA GPIO standardization */
&pio {
camera_pins_cam0_rst_0: cam0@0 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO20__FUNC_GPIO20>;
slew-rate = <1>;
output-low;
};
};
camera_pins_cam0_rst_1: cam0@1 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO20__FUNC_GPIO20>;
slew-rate = <1>;
output-high;
};
};
camera_pins_cam1_rst_0: cam1@0 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO16__FUNC_GPIO16>;
slew-rate = <1>;
output-low;
};
};
camera_pins_cam1_rst_1: cam1@1 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO16__FUNC_GPIO16>;
slew-rate = <1>;
output-high;
};
};
camera_pins_cam2_rst_0: cam2@0 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO22__FUNC_GPIO22>;
slew-rate = <1>;
output-low;
};
};
camera_pins_cam2_rst_1: cam2@1 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO22__FUNC_GPIO22>;
slew-rate = <1>;
output-high;
};
};
camera_pins_cam0_mclk_off: camera_pins_cam0_mclk_off {
pins_cmd_dat {
pinmux = <PINMUX_GPIO128__FUNC_GPIO128>;
drive-strength = <1>;
};
};
camera_pins_cam0_mclk_2ma: camera_pins_cam0_mclk_2ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO128__FUNC_CMMCLK2>;
drive-strength = <0>;
};
};
camera_pins_cam0_mclk_4ma: camera_pins_cam0_mclk_4ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO128__FUNC_CMMCLK2>;
drive-strength = <1>;
};
};
camera_pins_cam0_mclk_6ma: camera_pins_cam0_mclk_6ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO128__FUNC_CMMCLK2>;
drive-strength = <2>;
};
};
camera_pins_cam0_mclk_8ma: camera_pins_cam0_mclk_8ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO128__FUNC_CMMCLK2>;
drive-strength = <3>;
};
};
camera_pins_cam1_mclk_off: camera_pins_cam1_mclk_off {
pins_cmd_dat {
pinmux = <PINMUX_GPIO126__FUNC_GPIO126>;
drive-strength = <1>;
};
};
camera_pins_cam1_mclk_2ma: camera_pins_cam1_mclk_2ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO126__FUNC_CMMCLK0>;
drive-strength = <0>;
};
};
camera_pins_cam1_mclk_4ma: camera_pins_cam1_mclk_4ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO126__FUNC_CMMCLK0>;
drive-strength = <1>;
};
};
camera_pins_cam1_mclk_6ma: camera_pins_cam1_mclk_6ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO126__FUNC_CMMCLK0>;
drive-strength = <2>;
};
};
camera_pins_cam1_mclk_8ma: camera_pins_cam1_mclk_8ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO126__FUNC_CMMCLK0>;
drive-strength = <3>;
};
};
camera_pins_cam2_mclk_off: camera_pins_cam2_mclk_off {
pins_cmd_dat {
pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
drive-strength = <1>;
};
};
camera_pins_cam2_mclk_2ma: camera_pins_cam2_mclk_2ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO129__FUNC_CMMCLK3>;
drive-strength = <0>;
};
};
camera_pins_cam2_mclk_4ma: camera_pins_cam2_mclk_4ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO129__FUNC_CMMCLK3>;
drive-strength = <1>;
};
};
camera_pins_cam2_mclk_6ma: camera_pins_cam2_mclk_6ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO129__FUNC_CMMCLK3>;
drive-strength = <2>;
};
};
camera_pins_cam2_mclk_8ma: camera_pins_cam2_mclk_8ma {
pins_cmd_dat {
pinmux = <PINMUX_GPIO129__FUNC_CMMCLK3>;
drive-strength = <3>;
};
};
camera_pins_default: camdefault {
};
};
&kd_camera_hw1 {
pinctrl-names = "default",
"cam0_rst0", "cam0_rst1",
"cam1_rst0", "cam1_rst1",
"cam2_rst0", "cam2_rst1",
"cam0_mclk_off",
"cam0_mclk_2mA", "cam0_mclk_4mA",
"cam0_mclk_6mA", "cam0_mclk_8mA",
"cam1_mclk_off",
"cam1_mclk_2mA", "cam1_mclk_4mA",
"cam1_mclk_6mA", "cam1_mclk_8mA",
"cam2_mclk_off",
"cam2_mclk_2mA", "cam2_mclk_4mA",
"cam2_mclk_6mA", "cam2_mclk_8mA";
pinctrl-0 = <&camera_pins_default>;
pinctrl-1 = <&camera_pins_cam0_rst_0>;
pinctrl-2 = <&camera_pins_cam0_rst_1>;
pinctrl-3 = <&camera_pins_cam1_rst_0>;
pinctrl-4 = <&camera_pins_cam1_rst_1>;
pinctrl-5 = <&camera_pins_cam2_rst_0>;
pinctrl-6 = <&camera_pins_cam2_rst_1>;
pinctrl-7 = <&camera_pins_cam0_mclk_off>;
pinctrl-8 = <&camera_pins_cam0_mclk_2ma>;
pinctrl-9 = <&camera_pins_cam0_mclk_4ma>;
pinctrl-10 = <&camera_pins_cam0_mclk_6ma>;
pinctrl-11 = <&camera_pins_cam0_mclk_8ma>;
pinctrl-12 = <&camera_pins_cam1_mclk_off>;
pinctrl-13 = <&camera_pins_cam1_mclk_2ma>;
pinctrl-14 = <&camera_pins_cam1_mclk_4ma>;
pinctrl-15 = <&camera_pins_cam1_mclk_6ma>;
pinctrl-16 = <&camera_pins_cam1_mclk_8ma>;
pinctrl-17 = <&camera_pins_cam2_mclk_off>;
pinctrl-18 = <&camera_pins_cam2_mclk_2ma>;
pinctrl-19 = <&camera_pins_cam2_mclk_4ma>;
pinctrl-20 = <&camera_pins_cam2_mclk_6ma>;
pinctrl-21 = <&camera_pins_cam2_mclk_8ma>;
/* main (wide)*/
cam0_vcama-supply = <&rt5133_ldo4>;
cam0_vcamio-supply = <&rt5133_ldo1>;
cam0_vcamd-supply = <&rt5133_ldo8>;
cam0_vcama1-supply = <&rt5133_ldo5>;
cam0_vcamaf-supply = <&rt5133_ldo3>;
/* front*/
cam1_vcama-supply = <&rt5133_ldo6>;
cam1_vcamio-supply = <&rt5133_ldo1>;
cam1_vcamd-supply = <&rt5133_ldo7>;
cam1_vcama1-supply = <&rt5133_ldo5>;
cam1_vcamaf-supply = <&rt5133_ldo2>;
/* main2 (Ultra Wide)*/
cam2_vcama-supply = <&rt5133_gpio2>;
cam2_vcamio-supply = <&rt5133_ldo1>;
cam2_vcamd-supply = <&rt5133_ldo7>;
cam2_vcama1-supply = <&rt5133_ldo5>;
cam2_vcamaf-supply = <&rt5133_gpio1>;
cam0_pin_mclk = "mclk";
cam0_pin_rst = "gpio";
cam0_pin_vcama = "regulator";
cam0_pin_vcamio = "regulator";
cam0_pin_vcamd = "regulator";
cam0_pin_vcama1 = "regulator";
cam0_pin_vcamaf = "regulator";
cam1_pin_mclk = "mclk";
cam1_pin_rst = "gpio";
cam1_pin_vcama = "regulator";
cam1_pin_vcamio = "regulator";
cam1_pin_vcamd = "regulator";
cam1_pin_vcama1 = "regulator";
cam1_pin_vcamaf = "regulator";
cam2_pin_mclk = "mclk";
cam2_pin_rst = "gpio";
cam2_pin_vcama = "regulator";
cam2_pin_vcamio = "regulator";
cam2_pin_vcamd = "regulator";
cam2_pin_vcama1 = "regulator";
cam2_pin_vcamaf = "gpio";
status = "okay";
};
/* CAMERA GPIO end */
/* CAMERA EEPROM */
&i2c2 {
status = "okay";
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
mtk_camera_eeprom2:camera_eeprom2@51 {
compatible = "mediatek,camera_eeprom";
reg = <0x51>;
status = "okay";
};
camera_main_two_mtk:camera_main_two@10 {
compatible = "mediatek,camera_main_two";
#thermal-sensor-cells = <0>;
reg = <0x10>;
status = "okay";
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
mtk_camera_eeprom1:camera_eeprom1@51 {
compatible = "mediatek,camera_eeprom";
reg = <0x51>;
status = "okay";
};
camera_sub_mtk:camera_sub@1a {
compatible = "mediatek,camera_sub";
#thermal-sensor-cells = <0>;
reg = <0x1a>;
status = "okay";
};
};
&i2c8 {
status = "okay";
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
mtk_camera_eeprom0:camera_eeprom0@50 {
compatible = "mediatek,camera_eeprom";
reg = <0x50>;
status = "okay";
};
camera_main_mtk:camera_main@1a {
compatible = "mediatek,camera_main";
#thermal-sensor-cells = <0>;
reg = <0x1a>;
status = "okay";
};
};
/* CAMERA EEPROM end */
/* CAMERA TZ config */
&thermal_zones {
camera_main: camera_main {
polling-delay = <1000>; /* milliseconds */
polling-delay-passive = <0>; /* milliseconds */
thermal-sensors = <&camera_main_mtk>;
};
camera_sub: camera_sub {
polling-delay = <1000>; /* milliseconds */
polling-delay-passive = <0>; /* milliseconds */
thermal-sensors = <&camera_sub_mtk>;
};
camera_main_two: camera_main_two {
polling-delay = <1000>; /* milliseconds */
polling-delay-passive = <0>; /* milliseconds */
thermal-sensors = <&camera_main_two_mtk>;
};
};
/* CAMERA TZ config end */