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https://github.com/libretro/Lakka-LibreELEC.git
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143 lines
4.8 KiB
Diff
143 lines
4.8 KiB
Diff
From e29ff40f91293fa328007a5619276acd9d3ed517 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sat, 23 Mar 2024 20:30:02 +0100
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Subject: [PATCH 20/58] FROMGIT(6.14): iio: adc: consistently use bool and enum
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in struct meson_sar_adc_param
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Consistently use bool for any register bit that enables/disables
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functionality and enum for register values where there's a choice
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between different settings. The aim is to make the code easier to read
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and understand by being more consistent. No functional changes intended.
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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drivers/iio/adc/meson_saradc.c | 47 +++++++++++++++++++---------------
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1 file changed, 27 insertions(+), 20 deletions(-)
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diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
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index 4fe0688cb4d1..83849c2320e1 100644
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--- a/drivers/iio/adc/meson_saradc.c
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+++ b/drivers/iio/adc/meson_saradc.c
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@@ -156,9 +156,9 @@
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#define MESON_SAR_ADC_REG11 0x2c
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#define MESON_SAR_ADC_REG11_BANDGAP_EN BIT(13)
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#define MESON_SAR_ADC_REG11_CMV_SEL BIT(6)
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- #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5)
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- #define MESON_SAR_ADC_REG11_EOC BIT(1)
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- #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0)
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+ #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5)
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+ #define MESON_SAR_ADC_REG11_EOC BIT(1)
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+ #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0)
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#define MESON_SAR_ADC_REG13 0x34
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#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8)
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@@ -224,6 +224,11 @@ enum meson_sar_adc_vref_sel {
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VREF_VDDA = 1,
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};
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+enum meson_sar_adc_vref_voltage {
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+ VREF_VOLTAGE_0V9 = 0,
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+ VREF_VOLTAGE_1V8 = 1,
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+};
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+
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enum meson_sar_adc_avg_mode {
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NO_AVERAGING = 0x0,
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MEAN_AVERAGING = 0x1,
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@@ -321,13 +326,13 @@ struct meson_sar_adc_param {
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u8 temperature_trimming_bits;
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unsigned int temperature_multiplier;
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unsigned int temperature_divider;
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- u8 disable_ring_counter;
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+ bool disable_ring_counter;
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bool has_reg11;
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bool has_vref_select;
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- u8 vref_select;
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- u8 cmv_select;
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- u8 adc_eoc;
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- enum meson_sar_adc_vref_sel vref_voltage;
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+ bool cmv_select;
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+ bool adc_eoc;
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+ enum meson_sar_adc_vref_sel vref_select;
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+ enum meson_sar_adc_vref_voltage vref_voltage;
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};
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struct meson_sar_adc_data {
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@@ -970,14 +975,16 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
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MESON_SAR_ADC_DELTA_10_TS_REVE0);
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}
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- regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
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- priv->param->disable_ring_counter);
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+ if (priv->param->disable_ring_counter)
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+ regval = MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN;
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+ else
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+ regval = 0;
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
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MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
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regval);
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if (priv->param->has_reg11) {
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- regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc);
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+ regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0;
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
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MESON_SAR_ADC_REG11_EOC, regval);
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@@ -993,8 +1000,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
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MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval);
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- regval = FIELD_PREP(MESON_SAR_ADC_REG11_CMV_SEL,
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- priv->param->cmv_select);
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+ regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0;
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
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MESON_SAR_ADC_REG11_CMV_SEL, regval);
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}
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@@ -1212,8 +1218,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 10,
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.has_reg11 = true,
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- .vref_voltage = 1,
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- .cmv_select = 1,
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+ .vref_voltage = VREF_VOLTAGE_1V8,
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+ .cmv_select = true,
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};
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static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
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@@ -1224,8 +1230,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
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.resolution = 12,
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.disable_ring_counter = 1,
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.has_reg11 = true,
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- .vref_voltage = 1,
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- .cmv_select = 1,
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+ .vref_voltage = VREF_VOLTAGE_1V8,
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+ .cmv_select = true,
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};
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static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
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@@ -1236,10 +1242,10 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
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.resolution = 12,
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.disable_ring_counter = 1,
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.has_reg11 = true,
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- .vref_voltage = 1,
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+ .vref_voltage = VREF_VOLTAGE_1V8,
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.has_vref_select = true,
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.vref_select = VREF_VDDA,
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- .cmv_select = 1,
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+ .cmv_select = true,
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};
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static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
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@@ -1250,7 +1256,8 @@ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
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.resolution = 12,
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.disable_ring_counter = 1,
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.has_reg11 = true,
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- .adc_eoc = 1,
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+ .vref_voltage = VREF_VOLTAGE_0V9,
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+ .adc_eoc = true,
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.has_vref_select = true,
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.vref_select = VREF_VDDA,
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};
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--
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2.34.1
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