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https://github.com/libretro/Lakka-LibreELEC.git
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77 lines
2.4 KiB
Diff
77 lines
2.4 KiB
Diff
From e6298e5601c435f4b847271bfcf33044a343ec6a Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Fri, 27 Dec 2024 22:25:13 +0100
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Subject: [PATCH 17/58] FROMGIT(6.14): arm64: dts: amlogic: axg: switch to the
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new PWM controller binding
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Use the new PWM controller binding which now relies on passing all
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clock inputs available on the SoC (instead of passing the "wanted"
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clock input for a given board).
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 24 ++++++++++++++++++----
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1 file changed, 20 insertions(+), 4 deletions(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
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index e9b22868983d..a6924d246bb1 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
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@@ -1693,8 +1693,12 @@ sec_AO: ao-secure@140 {
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};
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pwm_AO_cd: pwm@2000 {
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- compatible = "amlogic,meson-axg-ao-pwm";
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+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x02000 0x0 0x20>;
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+ clocks = <&xtal>,
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+ <&clkc_AO CLKID_AO_CLK81>,
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+ <&clkc CLKID_FCLK_DIV4>,
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+ <&clkc CLKID_FCLK_DIV5>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -1728,8 +1732,12 @@ i2c_AO: i2c@5000 {
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};
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pwm_AO_ab: pwm@7000 {
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- compatible = "amlogic,meson-axg-ao-pwm";
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+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x07000 0x0 0x20>;
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+ clocks = <&xtal>,
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+ <&clkc_AO CLKID_AO_CLK81>,
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+ <&clkc CLKID_FCLK_DIV4>,
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+ <&clkc CLKID_FCLK_DIV5>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -1806,15 +1814,23 @@ watchdog@f0d0 {
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};
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pwm_ab: pwm@1b000 {
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- compatible = "amlogic,meson-axg-ee-pwm";
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+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x1b000 0x0 0x20>;
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+ clocks = <&xtal>,
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+ <&clkc CLKID_FCLK_DIV5>,
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+ <&clkc CLKID_FCLK_DIV4>,
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+ <&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@1a000 {
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- compatible = "amlogic,meson-axg-ee-pwm";
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+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x1a000 0x0 0x20>;
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+ clocks = <&xtal>,
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+ <&clkc CLKID_FCLK_DIV5>,
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+ <&clkc CLKID_FCLK_DIV4>,
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+ <&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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--
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2.34.1
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